* [U-Boot] Bottleneck of NAND copy speed
@ 2011-09-12 11:21 Simon Schwarz
2011-09-12 11:43 ` Wolfgang Denk
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Simon Schwarz @ 2011-09-12 11:21 UTC (permalink / raw)
To: u-boot
Hi List,
ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in
my SPL.
I?m searching for the speed bottleneck of the MT29F1G16ABBHC-ET
NAND-Flash on the devkit8000 (OMAP3).
From the timings I set on the GPMC I calced a max. speed of around 26
MiB/s. In my measurements I have a speed of around 10 MiB/s.
Here is the image of my the calculation:
https://docs.google.com/leaf?id=0B_wpO5K0MQSlYTcxMWVlOGEtY2FmYy00ODMyLWE1MTUtN2ZiZGViOWVhMzYw&hl=en_US
tcmd: The time for the initial read command
twr: time to write the address
tDn: Time for a 16bit read of Data
Does anyone has an idea where the bottleneck could be? Is my calculation
wrong?
(ecc is done parallel to the DMA transfer).
Regards
Simon
^ permalink raw reply [flat|nested] 6+ messages in thread* [U-Boot] Bottleneck of NAND copy speed
2011-09-12 11:21 [U-Boot] Bottleneck of NAND copy speed Simon Schwarz
@ 2011-09-12 11:43 ` Wolfgang Denk
2011-09-13 13:13 ` Simon Schwarz
2011-09-12 12:55 ` Nick Thompson
2011-09-13 19:53 ` Scott Wood
2 siblings, 1 reply; 6+ messages in thread
From: Wolfgang Denk @ 2011-09-12 11:43 UTC (permalink / raw)
To: u-boot
Dear Simon Schwarz,
In message <4E6DEB26.4020409@gmail.com> you wrote:
>
> ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in
> my SPL.
...
> Does anyone has an idea where the bottleneck could be? Is my calculation
> wrong?
Caches still turned off?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"Anyone attempting to generate random numbers by deterministic means
is, of course, living in a state of sin." - John Von Neumann
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] Bottleneck of NAND copy speed
2011-09-12 11:43 ` Wolfgang Denk
@ 2011-09-13 13:13 ` Simon Schwarz
0 siblings, 0 replies; 6+ messages in thread
From: Simon Schwarz @ 2011-09-13 13:13 UTC (permalink / raw)
To: u-boot
Dear Wolfgang,
caches are on.
Regards
Simon
On 09/12/2011 01:43 PM, Wolfgang Denk wrote:
> Dear Simon Schwarz,
>
> In message<4E6DEB26.4020409@gmail.com> you wrote:
>>
>> ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in
>> my SPL.
> ...
>> Does anyone has an idea where the bottleneck could be? Is my calculation
>> wrong?
>
> Caches still turned off?
>
> Best regards,
>
> Wolfgang Denk
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] Bottleneck of NAND copy speed
2011-09-12 11:21 [U-Boot] Bottleneck of NAND copy speed Simon Schwarz
2011-09-12 11:43 ` Wolfgang Denk
@ 2011-09-12 12:55 ` Nick Thompson
2011-09-13 13:18 ` Simon Schwarz
2011-09-13 19:53 ` Scott Wood
2 siblings, 1 reply; 6+ messages in thread
From: Nick Thompson @ 2011-09-12 12:55 UTC (permalink / raw)
To: u-boot
On 12/09/11 12:21, Simon Schwarz wrote:
> Hi List,
>
> ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in
> my SPL.
>
> I?m searching for the speed bottleneck of the MT29F1G16ABBHC-ET
> NAND-Flash on the devkit8000 (OMAP3).
>
> From the timings I set on the GPMC I calced a max. speed of around 26
> MiB/s. In my measurements I have a speed of around 10 MiB/s.
>
> Here is the image of my the calculation:
> https://docs.google.com/leaf?id=0B_wpO5K0MQSlYTcxMWVlOGEtY2FmYy00ODMyLWE1MTUtN2ZiZGViOWVhMzYw&hl=en_US
>
> tcmd: The time for the initial read command
> twr: time to write the address
> tDn: Time for a 16bit read of Data
>
> Does anyone has an idea where the bottleneck could be? Is my calculation
> wrong?
> (ecc is done parallel to the DMA transfer).
I only had a quick look at your calculation, but didn't notice anything to account
for the NAND copy to read cache (data ready) time of the NAND device.
Nick.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] Bottleneck of NAND copy speed
2011-09-12 12:55 ` Nick Thompson
@ 2011-09-13 13:18 ` Simon Schwarz
0 siblings, 0 replies; 6+ messages in thread
From: Simon Schwarz @ 2011-09-13 13:18 UTC (permalink / raw)
To: u-boot
On 09/12/2011 02:55 PM, Nick Thompson wrote:
> On 12/09/11 12:21, Simon Schwarz wrote:
>> Hi List,
>>
>> ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in
>> my SPL.
>>
>> I?m searching for the speed bottleneck of the MT29F1G16ABBHC-ET
>> NAND-Flash on the devkit8000 (OMAP3).
>>
>> From the timings I set on the GPMC I calced a max. speed of around 26
>> MiB/s. In my measurements I have a speed of around 10 MiB/s.
>>
>> Here is the image of my the calculation:
>> https://docs.google.com/leaf?id=0B_wpO5K0MQSlYTcxMWVlOGEtY2FmYy00ODMyLWE1MTUtN2ZiZGViOWVhMzYw&hl=en_US
>>
>> tcmd: The time for the initial read command
>> twr: time to write the address
>> tDn: Time for a 16bit read of Data
>>
>> Does anyone has an idea where the bottleneck could be? Is my calculation
>> wrong?
>> (ecc is done parallel to the DMA transfer).
>
> I only had a quick look at your calculation, but didn't notice anything to account
> for the NAND copy to read cache (data ready) time of the NAND device.
>
> Nick.
Ahh you mean t_R (Page read time) right?
Taking this into account I would expect something around 19,45 MiB/s.
Thank you!
Simon
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] Bottleneck of NAND copy speed
2011-09-12 11:21 [U-Boot] Bottleneck of NAND copy speed Simon Schwarz
2011-09-12 11:43 ` Wolfgang Denk
2011-09-12 12:55 ` Nick Thompson
@ 2011-09-13 19:53 ` Scott Wood
2 siblings, 0 replies; 6+ messages in thread
From: Scott Wood @ 2011-09-13 19:53 UTC (permalink / raw)
To: u-boot
On 09/12/2011 06:21 AM, Simon Schwarz wrote:
> Hi List,
>
> ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in
> my SPL.
>
> I?m searching for the speed bottleneck of the MT29F1G16ABBHC-ET
> NAND-Flash on the devkit8000 (OMAP3).
>
> From the timings I set on the GPMC I calced a max. speed of around 26
> MiB/s. In my measurements I have a speed of around 10 MiB/s.
>
> Here is the image of my the calculation:
> https://docs.google.com/leaf?id=0B_wpO5K0MQSlYTcxMWVlOGEtY2FmYy00ODMyLWE1MTUtN2ZiZGViOWVhMzYw&hl=en_US
>
> tcmd: The time for the initial read command
> twr: time to write the address
> tDn: Time for a 16bit read of Data
>
> Does anyone has an idea where the bottleneck could be? Is my calculation
> wrong?
> (ecc is done parallel to the DMA transfer).
Have you measured how much time is taken in software between each
operation -- time when the NAND chip is idle and software is either
processing the results of the last transaction or preparing for the next
one?
-Scott
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2011-09-13 19:53 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-09-12 11:21 [U-Boot] Bottleneck of NAND copy speed Simon Schwarz
2011-09-12 11:43 ` Wolfgang Denk
2011-09-13 13:13 ` Simon Schwarz
2011-09-12 12:55 ` Nick Thompson
2011-09-13 13:18 ` Simon Schwarz
2011-09-13 19:53 ` Scott Wood
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