From: "Shankar, Uma" <uma.shankar@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 10/20] drm/i915: Add gamma/degamma readout for bdw+
Date: Thu, 17 Sep 2020 20:15:20 +0000 [thread overview]
Message-ID: <4af5606d8f3f4e088a1a88c0908de875@intel.com> (raw)
In-Reply-To: <20200717211345.26851-11-ville.syrjala@linux.intel.com>
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Saturday, July 18, 2020 2:44 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 10/20] drm/i915: Add gamma/degamma readout for
> bdw+
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Read out the gamme/degamma LUT on bdw+. Not entirely complete as we need
s/gamme/gamma
With this,
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> a bit more special sauce to handle the split gamma mode.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 27 ++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> b/drivers/gpu/drm/i915/display/intel_color.c
> index 6842f5c0356d..5742ac1af862 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -1991,6 +1991,32 @@ static struct drm_property_blob
> *bdw_read_lut_10(struct intel_crtc *crtc,
> return blob;
> }
>
> +static void bdw_read_luts(struct intel_crtc_state *crtc_state) {
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct drm_property_blob **blob =
> + crtc_state->csc_mode & CSC_POSITION_BEFORE_GAMMA ?
> + &crtc_state->hw.gamma_lut : &crtc_state->hw.degamma_lut;
> +
> + if (!crtc_state->gamma_enable)
> + return;
> +
> + switch (crtc_state->gamma_mode) {
> + case GAMMA_MODE_MODE_8BIT:
> + *blob = ilk_read_lut_8(crtc);
> + break;
> + case GAMMA_MODE_MODE_SPLIT:
> + /* FIXME */
> + break;
> + case GAMMA_MODE_MODE_10BIT:
> + *blob = bdw_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0));
> + break;
> + default:
> + MISSING_CASE(crtc_state->gamma_mode);
> + break;
> + }
> +}
> +
> static struct drm_property_blob *glk_read_degamma_lut(struct intel_crtc *crtc)
> {
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -2154,6
> +2180,7 @@ void intel_color_init(struct intel_crtc *crtc)
> dev_priv->display.read_luts = glk_read_luts;
> } else if (INTEL_GEN(dev_priv) >= 8) {
> dev_priv->display.load_luts = bdw_load_luts;
> + dev_priv->display.read_luts = bdw_read_luts;
> } else if (INTEL_GEN(dev_priv) >= 7) {
> dev_priv->display.load_luts = ivb_load_luts;
> } else {
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2020-09-17 20:15 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-17 21:13 [Intel-gfx] [PATCH 00/20] drm/i915: Finish (de)gamma readout Ville Syrjala
2020-07-17 21:13 ` [Intel-gfx] [PATCH 01/20] drm/i915: Fix state checker hw.active/hw.enable readout Ville Syrjala
2020-09-17 19:20 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 02/20] drm/i915: Move MST master transcoder dump earlier Ville Syrjala
2020-09-17 19:24 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 03/20] drm/i915: Include the LUT sizes in the state dump Ville Syrjala
2020-09-17 19:27 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 04/20] drm/i915: s/glk_read_lut_10/bdw_read_lut_10/ Ville Syrjala
2020-09-17 19:29 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 05/20] drm/i915: Reset glk degamma index after programming/readout Ville Syrjala
2020-09-17 19:39 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 06/20] drm/i915: Shuffle chv_cgm_gamma_pack() around a bit Ville Syrjala
2020-09-17 19:42 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 07/20] drm/i915: Relocate CHV CGM gamma masks Ville Syrjala
2020-09-17 19:46 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 08/20] drm/i915: Add glk+ degamma readout Ville Syrjala
2020-09-17 19:58 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 09/20] drm/i915: Read out CHV CGM degamma Ville Syrjala
2020-09-17 20:06 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 10/20] drm/i915: Add gamma/degamma readout for bdw+ Ville Syrjala
2020-09-17 20:15 ` Shankar, Uma [this message]
2020-07-17 21:13 ` [Intel-gfx] [PATCH 11/20] drm/i915: Do degamma+gamma readout in bdw+ split gamma mode Ville Syrjala
2020-09-17 20:40 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 12/20] drm/i915: Polish bdw_read_lut_10() a bit Ville Syrjala
2020-09-17 20:43 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 13/20] drm/i915: Add gamma/degamm readout for ivb/hsw Ville Syrjala
2020-09-17 20:46 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 14/20] drm/i915: Replace some gamma_mode ifs with switches Ville Syrjala
2020-09-17 20:52 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 15/20] drm/i915: Make ilk_load_luts() deal with degamma Ville Syrjala
2020-09-17 20:56 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 16/20] drm/i915: Make ilk_read_luts() capable of degamma readout Ville Syrjala
2020-09-17 20:58 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 17/20] drm/i915: Make .read_luts() mandatory Ville Syrjala
2020-09-17 21:00 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 18/20] drm/i915: Extract ilk_crtc_has_gamma() & co Ville Syrjala
2020-09-17 21:03 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 19/20] drm/i915: Complete the gamma/degamma state checking Ville Syrjala
2020-09-17 21:52 ` Shankar, Uma
2020-07-17 21:13 ` [Intel-gfx] [PATCH 20/20] drm/i915: Add 10bit gamma mode for gen2/3 Ville Syrjala
2020-09-21 19:40 ` Shankar, Uma
2020-07-17 21:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Finish (de)gamma readout Patchwork
2020-07-17 21:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-17 22:46 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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