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From: Zong Li <zong@andestech.com>
To: <palmer@sifive.com>, <albert@sifive.com>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<zong@andestech.com>, <zongbox@gmail.com>
Cc: <greentime@andestech.com>
Subject: [PATCH 03/11] RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
Date: Tue, 13 Mar 2018 16:35:08 +0800	[thread overview]
Message-ID: <51685b481586d18182aaa8753f56d524d8ad3ca9.1520928420.git.zong@andestech.com> (raw)
In-Reply-To: <cover.1520928420.git.zong@andestech.com>

For CALL_PLT, emit the plt entry only when offset is more than 32-bit.

For PCREL_LO12, it uses the location of corresponding HI20 to
get the address of external symbol. It should check the HI20 type
is the PCREL_HI20 or GOT_HI20, because sometime the location will
have two or more relocation types.
For example:
0:   00000797                auipc   a5,0x0
                     0: R_RISCV_ALIGN        *ABS*
                     0: R_RISCV_GOT_HI20     SYMBOL
4:   0007b783                ld      a5,0(a5) # 0 <SYMBOL>
                     4: R_RISCV_PCREL_LO12_I .L0
                     4: R_RISCV_RELAX        *ABS*

Signed-off-by: Zong Li <zong@andestech.com>
---
 arch/riscv/kernel/module.c | 61 ++++++++++++++++++++++++++++++++++++++--------
 1 file changed, 51 insertions(+), 10 deletions(-)

diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c
index e0f05034fc21..242d3a14c210 100644
--- a/arch/riscv/kernel/module.c
+++ b/arch/riscv/kernel/module.c
@@ -92,6 +92,28 @@ static int apply_r_riscv_pcrel_lo12_s_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_got_hi20_rela(struct module *me, u32 *location,
+				       Elf_Addr v)
+{
+	s64 offset = (void *)v - (void *)location;
+	s32 hi20;
+
+	/* Always emit the got entry */
+	if (IS_ENABLED(CONFIG_MODULE_SECTIONS)) {
+		offset = module_emit_got_entry(me, v);
+		offset = (void *)offset - (void *)location;
+	} else {
+		pr_err(
+		  "%s: can not generate the GOT entry for symbol = %016llx from PC = %p\n",
+		  me->name, v, location);
+		return -EINVAL;
+	}
+
+	hi20 = (offset + 0x800) & 0xfffff000;
+	*location = (*location & 0xfff) | hi20;
+	return 0;
+}
+
 static int apply_r_riscv_call_plt_rela(struct module *me, u32 *location,
 				       Elf_Addr v)
 {
@@ -100,10 +122,16 @@ static int apply_r_riscv_call_plt_rela(struct module *me, u32 *location,
 	u32 hi20, lo12;
 
 	if (offset != fill_v) {
-		pr_err(
-		  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
-		  me->name, v, location);
-		return -EINVAL;
+		/* Only emit the plt entry if offset over 32-bit range */
+		if (IS_ENABLED(CONFIG_MODULE_SECTIONS)) {
+			offset = module_emit_plt_entry(me, v);
+			offset = (void *)offset - (void *)location;
+		} else {
+			pr_err(
+			  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
+			  me->name, v, location);
+			return -EINVAL;
+		}
 	}
 
 	hi20 = (offset + 0x800) & 0xfffff000;
@@ -127,6 +155,7 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_PCREL_HI20]		= apply_r_riscv_pcrel_hi20_rela,
 	[R_RISCV_PCREL_LO12_I]		= apply_r_riscv_pcrel_lo12_i_rela,
 	[R_RISCV_PCREL_LO12_S]		= apply_r_riscv_pcrel_lo12_s_rela,
+	[R_RISCV_GOT_HI20]		= apply_r_riscv_got_hi20_rela,
 	[R_RISCV_CALL_PLT]		= apply_r_riscv_call_plt_rela,
 	[R_RISCV_RELAX]			= apply_r_riscv_relax_rela,
 };
@@ -184,25 +213,37 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
 				u64 hi20_loc =
 					sechdrs[sechdrs[relsec].sh_info].sh_addr
 					+ rel[j].r_offset;
-				/* Find the corresponding HI20 PC-relative relocation entry */
-				if (hi20_loc == sym->st_value) {
+				u32 hi20_type = ELF_RISCV_R_TYPE(rel[j].r_info);
+
+				/* Find the corresponding HI20 relocation entry */
+				if (hi20_loc == sym->st_value
+				    && (hi20_type == R_RISCV_PCREL_HI20
+					|| hi20_type == R_RISCV_GOT_HI20)) {
+					s32 hi20, lo12;
 					Elf_Sym *hi20_sym =
 						(Elf_Sym *)sechdrs[symindex].sh_addr
 						+ ELF_RISCV_R_SYM(rel[j].r_info);
 					u64 hi20_sym_val =
 						hi20_sym->st_value
 						+ rel[j].r_addend;
+
 					/* Calculate lo12 */
-					s64 offset = hi20_sym_val - hi20_loc;
-					s32 hi20 = (offset + 0x800) & 0xfffff000;
-					s32 lo12 = offset - hi20;
+					u64 offset = hi20_sym_val - hi20_loc;
+					if (hi20_type == R_RISCV_GOT_HI20) {
+						offset = module_emit_got_entry(
+							 me, hi20_sym_val);
+						offset = offset - hi20_loc;
+					}
+					hi20 = (offset + 0x800) & 0xfffff000;
+					lo12 = offset - hi20;
 					v = lo12;
+
 					break;
 				}
 			}
 			if (j == sechdrs[relsec].sh_size / sizeof(*rel)) {
 				pr_err(
-				  "%s: Can not find HI20 PC-relative relocation information\n",
+				  "%s: Can not find HI20 relocation information\n",
 				  me->name);
 				return -EINVAL;
 			}
-- 
2.16.1

WARNING: multiple messages have this Message-ID (diff)
From: zong@andestech.com (Zong Li)
To: linux-riscv@lists.infradead.org
Subject: [PATCH 03/11] RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
Date: Tue, 13 Mar 2018 16:35:08 +0800	[thread overview]
Message-ID: <51685b481586d18182aaa8753f56d524d8ad3ca9.1520928420.git.zong@andestech.com> (raw)
In-Reply-To: <cover.1520928420.git.zong@andestech.com>

For CALL_PLT, emit the plt entry only when offset is more than 32-bit.

For PCREL_LO12, it uses the location of corresponding HI20 to
get the address of external symbol. It should check the HI20 type
is the PCREL_HI20 or GOT_HI20, because sometime the location will
have two or more relocation types.
For example:
0:   00000797                auipc   a5,0x0
                     0: R_RISCV_ALIGN        *ABS*
                     0: R_RISCV_GOT_HI20     SYMBOL
4:   0007b783                ld      a5,0(a5) # 0 <SYMBOL>
                     4: R_RISCV_PCREL_LO12_I .L0
                     4: R_RISCV_RELAX        *ABS*

Signed-off-by: Zong Li <zong@andestech.com>
---
 arch/riscv/kernel/module.c | 61 ++++++++++++++++++++++++++++++++++++++--------
 1 file changed, 51 insertions(+), 10 deletions(-)

diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c
index e0f05034fc21..242d3a14c210 100644
--- a/arch/riscv/kernel/module.c
+++ b/arch/riscv/kernel/module.c
@@ -92,6 +92,28 @@ static int apply_r_riscv_pcrel_lo12_s_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_got_hi20_rela(struct module *me, u32 *location,
+				       Elf_Addr v)
+{
+	s64 offset = (void *)v - (void *)location;
+	s32 hi20;
+
+	/* Always emit the got entry */
+	if (IS_ENABLED(CONFIG_MODULE_SECTIONS)) {
+		offset = module_emit_got_entry(me, v);
+		offset = (void *)offset - (void *)location;
+	} else {
+		pr_err(
+		  "%s: can not generate the GOT entry for symbol = %016llx from PC = %p\n",
+		  me->name, v, location);
+		return -EINVAL;
+	}
+
+	hi20 = (offset + 0x800) & 0xfffff000;
+	*location = (*location & 0xfff) | hi20;
+	return 0;
+}
+
 static int apply_r_riscv_call_plt_rela(struct module *me, u32 *location,
 				       Elf_Addr v)
 {
@@ -100,10 +122,16 @@ static int apply_r_riscv_call_plt_rela(struct module *me, u32 *location,
 	u32 hi20, lo12;
 
 	if (offset != fill_v) {
-		pr_err(
-		  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
-		  me->name, v, location);
-		return -EINVAL;
+		/* Only emit the plt entry if offset over 32-bit range */
+		if (IS_ENABLED(CONFIG_MODULE_SECTIONS)) {
+			offset = module_emit_plt_entry(me, v);
+			offset = (void *)offset - (void *)location;
+		} else {
+			pr_err(
+			  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
+			  me->name, v, location);
+			return -EINVAL;
+		}
 	}
 
 	hi20 = (offset + 0x800) & 0xfffff000;
@@ -127,6 +155,7 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_PCREL_HI20]		= apply_r_riscv_pcrel_hi20_rela,
 	[R_RISCV_PCREL_LO12_I]		= apply_r_riscv_pcrel_lo12_i_rela,
 	[R_RISCV_PCREL_LO12_S]		= apply_r_riscv_pcrel_lo12_s_rela,
+	[R_RISCV_GOT_HI20]		= apply_r_riscv_got_hi20_rela,
 	[R_RISCV_CALL_PLT]		= apply_r_riscv_call_plt_rela,
 	[R_RISCV_RELAX]			= apply_r_riscv_relax_rela,
 };
@@ -184,25 +213,37 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
 				u64 hi20_loc =
 					sechdrs[sechdrs[relsec].sh_info].sh_addr
 					+ rel[j].r_offset;
-				/* Find the corresponding HI20 PC-relative relocation entry */
-				if (hi20_loc == sym->st_value) {
+				u32 hi20_type = ELF_RISCV_R_TYPE(rel[j].r_info);
+
+				/* Find the corresponding HI20 relocation entry */
+				if (hi20_loc == sym->st_value
+				    && (hi20_type == R_RISCV_PCREL_HI20
+					|| hi20_type == R_RISCV_GOT_HI20)) {
+					s32 hi20, lo12;
 					Elf_Sym *hi20_sym =
 						(Elf_Sym *)sechdrs[symindex].sh_addr
 						+ ELF_RISCV_R_SYM(rel[j].r_info);
 					u64 hi20_sym_val =
 						hi20_sym->st_value
 						+ rel[j].r_addend;
+
 					/* Calculate lo12 */
-					s64 offset = hi20_sym_val - hi20_loc;
-					s32 hi20 = (offset + 0x800) & 0xfffff000;
-					s32 lo12 = offset - hi20;
+					u64 offset = hi20_sym_val - hi20_loc;
+					if (hi20_type == R_RISCV_GOT_HI20) {
+						offset = module_emit_got_entry(
+							 me, hi20_sym_val);
+						offset = offset - hi20_loc;
+					}
+					hi20 = (offset + 0x800) & 0xfffff000;
+					lo12 = offset - hi20;
 					v = lo12;
+
 					break;
 				}
 			}
 			if (j == sechdrs[relsec].sh_size / sizeof(*rel)) {
 				pr_err(
-				  "%s: Can not find HI20 PC-relative relocation information\n",
+				  "%s: Can not find HI20 relocation information\n",
 				  me->name);
 				return -EINVAL;
 			}
-- 
2.16.1

  parent reply	other threads:[~2018-03-13  8:48 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-13  8:35 [PATCH 00/11] RISC-V: Resolve the issue of loadable module on 64-bit Zong Li
2018-03-13  8:35 ` Zong Li
2018-03-13  8:35 ` [PATCH 01/11] RISC-V: Add sections of PLT and GOT for kernel module Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-14 17:20   ` kbuild test robot
2018-03-14 17:20     ` kbuild test robot
2018-03-13  8:35 ` [PATCH 02/11] RISC-V: Add section of GOT.PLT " Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-14 17:34   ` kbuild test robot
2018-03-14 17:34     ` kbuild test robot
2018-03-15  9:35     ` Zong Li
2018-03-15  9:35       ` Zong Li
2018-03-13  8:35 ` Zong Li [this message]
2018-03-13  8:35   ` [PATCH 03/11] RISC-V: Support GOT_HI20/CALL_PLT relocation type in " Zong Li
2018-03-13  8:35 ` [PATCH 04/11] RISC-V: Support CALL " Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 05/11] RISC-V: Support HI20/LO12_I/LO12_S " Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 06/11] RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 07/11] RISC-V: Support ALIGN relocation type in kernel module Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 08/11] RISC-V: Support ADD32 " Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 09/11] RISC-V: Support SUB32 " Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 10/11] RISC-V: Enable module support in defconfig Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 11/11] RISC-V: Add definition of relocation types Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13 10:35 ` [PATCH 00/11] RISC-V: Resolve the issue of loadable module on 64-bit Zong Li
2018-03-13 10:35   ` Zong Li
2018-03-13 18:35 ` Palmer Dabbelt
2018-03-13 18:35   ` Palmer Dabbelt
2018-03-13 21:30   ` Shea Levy
2018-03-13 21:30     ` Shea Levy
2018-03-14  1:34     ` Zong Li
2018-03-14  1:34       ` Zong Li
2018-03-14  3:07       ` Palmer Dabbelt
2018-03-14  3:07         ` Palmer Dabbelt
2018-03-14 11:15         ` Zong Li
2018-03-14 11:15           ` Zong Li
2018-03-14 11:56           ` Shea Levy
2018-03-14 11:56             ` Shea Levy
2018-03-14 12:20             ` Zong Li
2018-03-14 12:20               ` Zong Li
2018-03-14 11:54         ` Shea Levy
2018-03-14 11:54           ` Shea Levy
2018-03-14 17:07           ` Palmer Dabbelt
2018-03-14 17:07             ` Palmer Dabbelt
2018-03-14  3:51     ` Palmer Dabbelt
2018-03-14  3:51       ` Palmer Dabbelt
2018-03-14 12:07       ` Shea Levy
2018-03-14 12:07         ` Shea Levy
2018-03-14 17:07         ` Palmer Dabbelt
2018-03-14 17:07           ` Palmer Dabbelt
2018-03-14 17:11           ` Shea Levy
2018-03-14 17:11             ` Shea Levy
2018-03-14 17:30             ` Palmer Dabbelt
2018-03-14 17:30               ` Palmer Dabbelt
2018-03-13 21:26 ` Shea Levy
2018-03-13 21:26   ` Shea Levy

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