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From: Zong Li <zong@andestech.com>
To: <palmer@sifive.com>, <albert@sifive.com>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<zong@andestech.com>, <zongbox@gmail.com>
Cc: <greentime@andestech.com>
Subject: [PATCH 06/11] RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
Date: Tue, 13 Mar 2018 16:35:11 +0800	[thread overview]
Message-ID: <9d8d903506742753f38158a7c995a61586f9b460.1520928420.git.zong@andestech.com> (raw)
In-Reply-To: <cover.1520928420.git.zong@andestech.com>

Signed-off-by: Zong Li <zong@andestech.com>
---
 arch/riscv/kernel/module.c | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c
index 654fe7dcd38d..e23c051dfc62 100644
--- a/arch/riscv/kernel/module.c
+++ b/arch/riscv/kernel/module.c
@@ -49,6 +49,39 @@ static int apply_r_riscv_jal_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_rcv_branch_rela(struct module *me, u32 *location,
+					 Elf_Addr v)
+{
+	s64 offset = (void *)v - (void *)location;
+	u16 imm8 = (offset & 0x100) << (12 - 8);
+	u16 imm7_6 = (offset & 0xc0) >> (6 - 5);
+	u16 imm5 = (offset & 0x20) >> (5 - 2);
+	u16 imm4_3 = (offset & 0x18) << (12 - 5);
+	u16 imm2_1 = (offset & 0x6) << (12 - 10);
+
+	*(u16 *)location = (*(u16 *)location & 0xe383) |
+		    imm8 | imm7_6 | imm5 | imm4_3 | imm2_1;
+	return 0;
+}
+
+static int apply_r_riscv_rvc_jump_rela(struct module *me, u32 *location,
+				       Elf_Addr v)
+{
+	s64 offset = (void *)v - (void *)location;
+	u16 imm11 = (offset & 0x800) << (12 - 11);
+	u16 imm10 = (offset & 0x400) >> (10 - 8);
+	u16 imm9_8 = (offset & 0x300) << (12 - 11);
+	u16 imm7 = (offset & 0x80) >> (7 - 6);
+	u16 imm6 = (offset & 0x40) << (12 - 11);
+	u16 imm5 = (offset & 0x20) >> (5 - 2);
+	u16 imm4 = (offset & 0x10) << (12 - 5);
+	u16 imm3_1 = (offset & 0xe) << (12 - 10);
+
+	*(u16 *)location = (*(u16 *)location & 0xe003) |
+		    imm11 | imm10 | imm9_8 | imm7 | imm6 | imm5 | imm4 | imm3_1;
+	return 0;
+}
+
 static int apply_r_riscv_pcrel_hi20_rela(struct module *me, u32 *location,
 					 Elf_Addr v)
 {
@@ -212,6 +245,8 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_64]			= apply_r_riscv_64_rela,
 	[R_RISCV_BRANCH]		= apply_r_riscv_branch_rela,
 	[R_RISCV_JAL]			= apply_r_riscv_jal_rela,
+	[R_RISCV_RVC_BRANCH]		= apply_r_riscv_rcv_branch_rela,
+	[R_RISCV_RVC_JUMP]		= apply_r_riscv_rvc_jump_rela,
 	[R_RISCV_PCREL_HI20]		= apply_r_riscv_pcrel_hi20_rela,
 	[R_RISCV_PCREL_LO12_I]		= apply_r_riscv_pcrel_lo12_i_rela,
 	[R_RISCV_PCREL_LO12_S]		= apply_r_riscv_pcrel_lo12_s_rela,
-- 
2.16.1

WARNING: multiple messages have this Message-ID (diff)
From: zong@andestech.com (Zong Li)
To: linux-riscv@lists.infradead.org
Subject: [PATCH 06/11] RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
Date: Tue, 13 Mar 2018 16:35:11 +0800	[thread overview]
Message-ID: <9d8d903506742753f38158a7c995a61586f9b460.1520928420.git.zong@andestech.com> (raw)
In-Reply-To: <cover.1520928420.git.zong@andestech.com>

Signed-off-by: Zong Li <zong@andestech.com>
---
 arch/riscv/kernel/module.c | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c
index 654fe7dcd38d..e23c051dfc62 100644
--- a/arch/riscv/kernel/module.c
+++ b/arch/riscv/kernel/module.c
@@ -49,6 +49,39 @@ static int apply_r_riscv_jal_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_rcv_branch_rela(struct module *me, u32 *location,
+					 Elf_Addr v)
+{
+	s64 offset = (void *)v - (void *)location;
+	u16 imm8 = (offset & 0x100) << (12 - 8);
+	u16 imm7_6 = (offset & 0xc0) >> (6 - 5);
+	u16 imm5 = (offset & 0x20) >> (5 - 2);
+	u16 imm4_3 = (offset & 0x18) << (12 - 5);
+	u16 imm2_1 = (offset & 0x6) << (12 - 10);
+
+	*(u16 *)location = (*(u16 *)location & 0xe383) |
+		    imm8 | imm7_6 | imm5 | imm4_3 | imm2_1;
+	return 0;
+}
+
+static int apply_r_riscv_rvc_jump_rela(struct module *me, u32 *location,
+				       Elf_Addr v)
+{
+	s64 offset = (void *)v - (void *)location;
+	u16 imm11 = (offset & 0x800) << (12 - 11);
+	u16 imm10 = (offset & 0x400) >> (10 - 8);
+	u16 imm9_8 = (offset & 0x300) << (12 - 11);
+	u16 imm7 = (offset & 0x80) >> (7 - 6);
+	u16 imm6 = (offset & 0x40) << (12 - 11);
+	u16 imm5 = (offset & 0x20) >> (5 - 2);
+	u16 imm4 = (offset & 0x10) << (12 - 5);
+	u16 imm3_1 = (offset & 0xe) << (12 - 10);
+
+	*(u16 *)location = (*(u16 *)location & 0xe003) |
+		    imm11 | imm10 | imm9_8 | imm7 | imm6 | imm5 | imm4 | imm3_1;
+	return 0;
+}
+
 static int apply_r_riscv_pcrel_hi20_rela(struct module *me, u32 *location,
 					 Elf_Addr v)
 {
@@ -212,6 +245,8 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_64]			= apply_r_riscv_64_rela,
 	[R_RISCV_BRANCH]		= apply_r_riscv_branch_rela,
 	[R_RISCV_JAL]			= apply_r_riscv_jal_rela,
+	[R_RISCV_RVC_BRANCH]		= apply_r_riscv_rcv_branch_rela,
+	[R_RISCV_RVC_JUMP]		= apply_r_riscv_rvc_jump_rela,
 	[R_RISCV_PCREL_HI20]		= apply_r_riscv_pcrel_hi20_rela,
 	[R_RISCV_PCREL_LO12_I]		= apply_r_riscv_pcrel_lo12_i_rela,
 	[R_RISCV_PCREL_LO12_S]		= apply_r_riscv_pcrel_lo12_s_rela,
-- 
2.16.1

  parent reply	other threads:[~2018-03-13  8:51 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-13  8:35 [PATCH 00/11] RISC-V: Resolve the issue of loadable module on 64-bit Zong Li
2018-03-13  8:35 ` Zong Li
2018-03-13  8:35 ` [PATCH 01/11] RISC-V: Add sections of PLT and GOT for kernel module Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-14 17:20   ` kbuild test robot
2018-03-14 17:20     ` kbuild test robot
2018-03-13  8:35 ` [PATCH 02/11] RISC-V: Add section of GOT.PLT " Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-14 17:34   ` kbuild test robot
2018-03-14 17:34     ` kbuild test robot
2018-03-15  9:35     ` Zong Li
2018-03-15  9:35       ` Zong Li
2018-03-13  8:35 ` [PATCH 03/11] RISC-V: Support GOT_HI20/CALL_PLT relocation type in " Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 04/11] RISC-V: Support CALL " Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 05/11] RISC-V: Support HI20/LO12_I/LO12_S " Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` Zong Li [this message]
2018-03-13  8:35   ` [PATCH 06/11] RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq Zong Li
2018-03-13  8:35 ` [PATCH 07/11] RISC-V: Support ALIGN relocation type in kernel module Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 08/11] RISC-V: Support ADD32 " Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 09/11] RISC-V: Support SUB32 " Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 10/11] RISC-V: Enable module support in defconfig Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13  8:35 ` [PATCH 11/11] RISC-V: Add definition of relocation types Zong Li
2018-03-13  8:35   ` Zong Li
2018-03-13 10:35 ` [PATCH 00/11] RISC-V: Resolve the issue of loadable module on 64-bit Zong Li
2018-03-13 10:35   ` Zong Li
2018-03-13 18:35 ` Palmer Dabbelt
2018-03-13 18:35   ` Palmer Dabbelt
2018-03-13 21:30   ` Shea Levy
2018-03-13 21:30     ` Shea Levy
2018-03-14  1:34     ` Zong Li
2018-03-14  1:34       ` Zong Li
2018-03-14  3:07       ` Palmer Dabbelt
2018-03-14  3:07         ` Palmer Dabbelt
2018-03-14 11:15         ` Zong Li
2018-03-14 11:15           ` Zong Li
2018-03-14 11:56           ` Shea Levy
2018-03-14 11:56             ` Shea Levy
2018-03-14 12:20             ` Zong Li
2018-03-14 12:20               ` Zong Li
2018-03-14 11:54         ` Shea Levy
2018-03-14 11:54           ` Shea Levy
2018-03-14 17:07           ` Palmer Dabbelt
2018-03-14 17:07             ` Palmer Dabbelt
2018-03-14  3:51     ` Palmer Dabbelt
2018-03-14  3:51       ` Palmer Dabbelt
2018-03-14 12:07       ` Shea Levy
2018-03-14 12:07         ` Shea Levy
2018-03-14 17:07         ` Palmer Dabbelt
2018-03-14 17:07           ` Palmer Dabbelt
2018-03-14 17:11           ` Shea Levy
2018-03-14 17:11             ` Shea Levy
2018-03-14 17:30             ` Palmer Dabbelt
2018-03-14 17:30               ` Palmer Dabbelt
2018-03-13 21:26 ` Shea Levy
2018-03-13 21:26   ` Shea Levy

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