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From: James Hogan <james.hogan@imgtec.com>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>,
	Saravana Kannan <skannan@codeaurora.org>,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 04/14] clk: Add set_rate_and_parent() op
Date: Fri, 9 Aug 2013 10:11:56 +0100	[thread overview]
Message-ID: <5204B25C.70102@imgtec.com> (raw)
In-Reply-To: <1374713022-6049-5-git-send-email-sboyd@codeaurora.org>

Hi Stephen,

On 25/07/13 01:43, Stephen Boyd wrote:
> Some of Qualcomm's clocks can change their parent and rate at the
> same time with a single register write. Add support for this
> hardware to the common clock framework by adding a new
> set_rate_and_parent() op. When the clock framework determines
> that both the parent and the rate are going to change during
> clk_set_rate() it will call the .set_rate_and_parent() op if
> available and fall back to calling .set_parent() followed by
> .set_rate() otherwise.
> 
> Cc: James Hogan <james.hogan@imgtec.com>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

Aside from the nit below, I can't see anything wrong with this patch.
Reviewed-by: James Hogan <james.hogan@imgtec.com>

> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
> index 484f8ad..1f7eabb 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -108,6 +108,18 @@ struct clk_hw;
>   *		which is likely helpful for most .set_rate implementation.
>   *		Returns 0 on success, -EERROR otherwise.
>   *
> + * @set_rate_and_parent: Change the rate and the parent of this clock. The
> + *		requested rate is specified by the second argument, which
> + *		should typically be the return of .round_rate call.  The
> + *		third argument gives the parent rate which is likely helpful
> + *		for most .set_rate_and_parent implementation. The fourth
> + *		argument gives the parent index. It is optional (and

nit: s/It/This callback/ or add newline or something - I completely
misread it the first time, thinking you were referring to the parent
index argument :)

> + *		unnecessary) for clocks with 0 or 1 parents as well as
> + *		for clocks that can tolerate switching the rate and the parent
> + *		separately via calls to .set_parent and .set_rate.
> + *		Returns 0 on success, -EERROR otherwise.
> + *
> + *
>   * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
>   * implementations to split any work between atomic (enable) and sleepable
>   * (prepare) contexts.  If enabling a clock requires code that might sleep,

Thanks
James

WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@imgtec.com>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>,
	Saravana Kannan <skannan@codeaurora.org>,
	<linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v1 04/14] clk: Add set_rate_and_parent() op
Date: Fri, 9 Aug 2013 10:11:56 +0100	[thread overview]
Message-ID: <5204B25C.70102@imgtec.com> (raw)
In-Reply-To: <1374713022-6049-5-git-send-email-sboyd@codeaurora.org>

Hi Stephen,

On 25/07/13 01:43, Stephen Boyd wrote:
> Some of Qualcomm's clocks can change their parent and rate at the
> same time with a single register write. Add support for this
> hardware to the common clock framework by adding a new
> set_rate_and_parent() op. When the clock framework determines
> that both the parent and the rate are going to change during
> clk_set_rate() it will call the .set_rate_and_parent() op if
> available and fall back to calling .set_parent() followed by
> .set_rate() otherwise.
> 
> Cc: James Hogan <james.hogan@imgtec.com>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

Aside from the nit below, I can't see anything wrong with this patch.
Reviewed-by: James Hogan <james.hogan@imgtec.com>

> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
> index 484f8ad..1f7eabb 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -108,6 +108,18 @@ struct clk_hw;
>   *		which is likely helpful for most .set_rate implementation.
>   *		Returns 0 on success, -EERROR otherwise.
>   *
> + * @set_rate_and_parent: Change the rate and the parent of this clock. The
> + *		requested rate is specified by the second argument, which
> + *		should typically be the return of .round_rate call.  The
> + *		third argument gives the parent rate which is likely helpful
> + *		for most .set_rate_and_parent implementation. The fourth
> + *		argument gives the parent index. It is optional (and

nit: s/It/This callback/ or add newline or something - I completely
misread it the first time, thinking you were referring to the parent
index argument :)

> + *		unnecessary) for clocks with 0 or 1 parents as well as
> + *		for clocks that can tolerate switching the rate and the parent
> + *		separately via calls to .set_parent and .set_rate.
> + *		Returns 0 on success, -EERROR otherwise.
> + *
> + *
>   * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
>   * implementations to split any work between atomic (enable) and sleepable
>   * (prepare) contexts.  If enabling a clock requires code that might sleep,

Thanks
James


WARNING: multiple messages have this Message-ID (diff)
From: james.hogan@imgtec.com (James Hogan)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v1 04/14] clk: Add set_rate_and_parent() op
Date: Fri, 9 Aug 2013 10:11:56 +0100	[thread overview]
Message-ID: <5204B25C.70102@imgtec.com> (raw)
In-Reply-To: <1374713022-6049-5-git-send-email-sboyd@codeaurora.org>

Hi Stephen,

On 25/07/13 01:43, Stephen Boyd wrote:
> Some of Qualcomm's clocks can change their parent and rate at the
> same time with a single register write. Add support for this
> hardware to the common clock framework by adding a new
> set_rate_and_parent() op. When the clock framework determines
> that both the parent and the rate are going to change during
> clk_set_rate() it will call the .set_rate_and_parent() op if
> available and fall back to calling .set_parent() followed by
> .set_rate() otherwise.
> 
> Cc: James Hogan <james.hogan@imgtec.com>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

Aside from the nit below, I can't see anything wrong with this patch.
Reviewed-by: James Hogan <james.hogan@imgtec.com>

> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
> index 484f8ad..1f7eabb 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -108,6 +108,18 @@ struct clk_hw;
>   *		which is likely helpful for most .set_rate implementation.
>   *		Returns 0 on success, -EERROR otherwise.
>   *
> + * @set_rate_and_parent: Change the rate and the parent of this clock. The
> + *		requested rate is specified by the second argument, which
> + *		should typically be the return of .round_rate call.  The
> + *		third argument gives the parent rate which is likely helpful
> + *		for most .set_rate_and_parent implementation. The fourth
> + *		argument gives the parent index. It is optional (and

nit: s/It/This callback/ or add newline or something - I completely
misread it the first time, thinking you were referring to the parent
index argument :)

> + *		unnecessary) for clocks with 0 or 1 parents as well as
> + *		for clocks that can tolerate switching the rate and the parent
> + *		separately via calls to .set_parent and .set_rate.
> + *		Returns 0 on success, -EERROR otherwise.
> + *
> + *
>   * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
>   * implementations to split any work between atomic (enable) and sleepable
>   * (prepare) contexts.  If enabling a clock requires code that might sleep,

Thanks
James

  parent reply	other threads:[~2013-08-09  9:12 UTC|newest]

Thread overview: 90+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-07-25  0:43 [PATCH v1 00/14] Add support for MSM's mmio clocks Stephen Boyd
2013-07-25  0:43 ` Stephen Boyd
2013-07-25  0:43 ` [PATCH v1 01/14] clk: fixed-rate: Export clk_fixed_rate_register() Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-08-03  3:32   ` Mike Turquette
2013-08-03  3:32     ` Mike Turquette
2013-07-25  0:43 ` [PATCH v1 02/14] clk: Add of_init_clk_data() to parse common clock bindings Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-07-25  8:21   ` Tomasz Figa
2013-07-25  8:21     ` Tomasz Figa
2013-07-25 16:36     ` Stephen Boyd
2013-07-25 16:36       ` Stephen Boyd
2013-08-03  1:06       ` Mike Turquette
2013-08-03  1:06         ` Mike Turquette
2013-07-25  0:43 ` [PATCH v1 03/14] clk: Add of_clk_match() for device drivers Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-07-25  8:12   ` Tomasz Figa
2013-07-25  8:12     ` Tomasz Figa
2013-07-25 16:36     ` Stephen Boyd
2013-07-25 16:36       ` Stephen Boyd
2013-08-12 20:23   ` Mike Turquette
2013-08-12 20:23     ` Mike Turquette
2013-08-13  5:48     ` Stephen Boyd
2013-08-13  5:48       ` Stephen Boyd
2013-08-15  5:02       ` Mike Turquette
2013-08-15  5:02         ` Mike Turquette
2013-08-16  1:31         ` Stephen Boyd
2013-08-16  1:31           ` Stephen Boyd
2013-08-16  3:44           ` Mike Turquette
2013-08-16  3:44             ` Mike Turquette
2013-08-16 16:43         ` Kumar Gala
2013-08-16 16:43           ` Kumar Gala
2013-08-16 17:16           ` Kumar Gala
2013-08-16 17:16             ` Kumar Gala
2013-07-25  0:43 ` [PATCH v1 04/14] clk: Add set_rate_and_parent() op Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-07-25  8:26   ` Tomasz Figa
2013-07-25  8:26     ` Tomasz Figa
2013-07-25  8:26     ` Tomasz Figa
2013-07-25 16:45     ` Stephen Boyd
2013-07-25 16:45       ` Stephen Boyd
2013-08-09  5:32       ` Mike Turquette
2013-08-09  5:32         ` Mike Turquette
2013-08-09  9:11   ` James Hogan [this message]
2013-08-09  9:11     ` James Hogan
2013-08-09  9:11     ` James Hogan
2013-07-25  0:43 ` [PATCH v1 05/14] clk: msm: Add support for phase locked loops (PLLs) Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-07-25  8:29   ` Tomasz Figa
2013-07-25  8:29     ` Tomasz Figa
2013-07-25 16:37     ` Stephen Boyd
2013-07-25 16:37       ` Stephen Boyd
2013-07-25  0:43 ` [PATCH v1 06/14] clk: msm: Add support for root clock generators (RCGs) Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-07-25  0:43 ` [PATCH v1 07/14] clk: msm: Add support for branches/gate clocks Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-07-25  0:43 ` [PATCH v1 08/14] clk: msm: Add MSM clock driver Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-07-25  8:32   ` Tomasz Figa
2013-07-25  8:32     ` Tomasz Figa
2013-07-25 16:40     ` Stephen Boyd
2013-07-25 16:40       ` Stephen Boyd
2013-07-25  0:43 ` [PATCH v1 09/14] clk: msm: Add support for MSM8960's global clock controller (GCC) Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-08-08 17:00   ` Mark Rutland
2013-08-08 17:00     ` Mark Rutland
2013-08-08 17:00     ` Mark Rutland
2013-08-13  5:03     ` Stephen Boyd
2013-08-13  5:03       ` Stephen Boyd
2013-08-13  5:03       ` Stephen Boyd
2013-08-13 14:24       ` Mike Turquette
2013-08-13 14:24         ` Mike Turquette
2013-08-13 14:24         ` Mike Turquette
2013-08-13 18:42         ` Stephen Boyd
2013-08-13 18:42           ` Stephen Boyd
2013-08-13 18:42           ` Stephen Boyd
2013-07-25  0:43 ` [PATCH v1 10/14] clk: msm: Add support for MSM8960's multimedia clock controller (MMCC) Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-08-08 17:02   ` Mark Rutland
2013-08-08 17:02     ` Mark Rutland
2013-08-08 17:02     ` Mark Rutland
2013-07-25  0:43 ` [PATCH v1 11/14] ARM: dts: msm: Add MSM8960 GCC DT nodes Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-07-25  0:43 ` [PATCH v1 12/14] ARM: dts: msm: Add MSM8960 MMCC " Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-07-25  0:43 ` [PATCH v1 13/14] clk: msm: Add MSM8974 GCC data Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd
2013-07-25  0:43 ` [PATCH v1 14/14] ARM: dts: msm: Add clock entries for MSM8960 uart device Stephen Boyd
2013-07-25  0:43   ` Stephen Boyd

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