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From: Ariel D'Alessandro <ariel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
To: Srinivas Kandagatla
	<srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org,
	ezequiel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org,
	manabian-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	pawel.moll-5wv7dgnIgG8@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Subject: Re: [PATCH v2 2/4] nvmem: NXP LPC18xx EEPROM memory NVMEM driver
Date: Fri, 30 Oct 2015 12:42:44 -0300	[thread overview]
Message-ID: <56338FF4.8050102@vanguardiasur.com.ar> (raw)
In-Reply-To: <562E377A.3040604-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>

Srinivas,

El 26/10/15 a las 11:23, Srinivas Kandagatla escribió:
> 
> 
> On 19/10/15 18:32, Ariel D'Alessandro wrote:
>> This commit adds support for NXP LPC18xx EEPROM memory found in NXP
> s/commit/patch

OK.

> 
>> LPC185x/3x and LPC435x/3x/2x/1x devices.
>>
>> EEPROM size is 16384 bytes and it can be entirely read and
>> written/erased with 1 word (4 bytes) granularity. The last page
>> (128 bytes) contains the EEPROM initialization data and is not writable.
>>
>> Erase/program time is less than 3ms. The EEPROM device requires a
>> ~1500 kHz clock (min 800 kHz, max 1600 kHz) that is generated dividing
>> the system bus clock by the division factor, contained in the divider
>> register (minus 1 encoded).
>>
>> Signed-off-by: Ariel D'Alessandro <ariel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
>> ---
>>   drivers/nvmem/Kconfig          |   9 ++
>>   drivers/nvmem/Makefile         |   2 +
>>   drivers/nvmem/lpc18xx_eeprom.c | 266
>> +++++++++++++++++++++++++++++++++++++++++
>>   3 files changed, 277 insertions(+)
>>   create mode 100644 drivers/nvmem/lpc18xx_eeprom.c
>>
[snip]
>> diff --git a/drivers/nvmem/lpc18xx_eeprom.c
>> b/drivers/nvmem/lpc18xx_eeprom.c
>> new file mode 100644
>> index 0000000..ccdda66
>> --- /dev/null
>> +++ b/drivers/nvmem/lpc18xx_eeprom.c
>> @@ -0,0 +1,266 @@
>> +/*
>> + * NXP LPC18xx/LPC43xx EEPROM memory NVMEM driver
>> + *
>> + * Copyright (c) 2015 Ariel D'Alessandro <ariel-30ULvvUtt6G51wMPkGsGjgC/G2K4zDHf@public.gmane.org>
>> + *
>> + * This program is free software; you can redistribute it and/or
>> modify it
>> + * under the terms of the GNU General Public License version 2 as
>> published by
>> + * the Free Software Foundation.
>> + */
>> +
>> +#include <linux/clk.h>
>> +#include <linux/device.h>
>> +#include <linux/delay.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/module.h>
>> +#include <linux/nvmem-provider.h>
>> +#include <linux/of_device.h>
> Why do you need above?
> 
> Also you should probably include
> 
>  #include <linux/platform_device.h>

You're right. No need for of_device.h, only platform_device.h.

> 
> 
>> +#include <linux/regmap.h>
>> +#include <linux/reset.h>
>> +
>> +/* Registers */
>> +#define LPC18XX_EEPROM_AUTOPROG        0x00c
>> +#define LPC18XX_EEPROM_AUTOPROG_WORD    0x1
>> +
>> +#define LPC18XX_EEPROM_CLKDIV        0x014
>> +
>> +#define LPC18XX_EEPROM_PWRDWN        0x018
>> +#define LPC18XX_EEPROM_PWRDWN_NO    0x0
>> +#define LPC18XX_EEPROM_PWRDWN_YES    0x1
>> +
>> +/* Fixed page size (bytes) */
>> +#define LPC18XX_EEPROM_PAGE_SIZE    0x80
>> +
>> +/* EEPROM device requires a ~1500 kHz clock (min 800 kHz, max 1600
>> kHz) */
>> +#define LPC18XX_EEPROM_CLOCK_HZ        1500000
>> +
>> +struct lpc18xx_eeprom_dev {
>> +    struct clk *clk;
>> +    void __iomem *reg_base;
>> +    void __iomem *mem_base;
>> +    struct nvmem_device *nvmem;
>> +    unsigned reg_bytes;
>> +    unsigned val_bytes;
>> +};
>> +
>> +static inline void lpc18xx_eeprom_writel(struct lpc18xx_eeprom_dev
>> *eeprom,
>> +                     u32 reg, u32 val)
>> +{
>> +    writel(val, eeprom->reg_base + reg);
>> +}
> I don't have a strong feeling but, I see no point to have a wrapper for
> writel which is only used in probe function.

Well, to be correct it's also used in remove function. And I might call
it in read()/write() functions to allow dynamic power on/off.
I'd prefer keeping the wrapper.

> 
>> +
>> +static int lpc18xx_eeprom_gather_write(void *context, const void *reg,
>> +                       size_t reg_size, const void *val,
>> +                       size_t val_size)
>> +{
>> +    struct lpc18xx_eeprom_dev *eeprom = context;
>> +    unsigned int offset = *(u32 *)reg;
>> +
>> +    /* 3 ms of erase/program time between each writing */
>> +    while (val_size) {
>> +        writel(*(u32 *)val, eeprom->mem_base + offset);
>> +        usleep_range(3000, 4000);
>> +        val_size -= eeprom->val_bytes;
>> +        val += eeprom->val_bytes;
>> +        offset += eeprom->val_bytes;
>> +    }
>> +
>> +    return 0;
>> +}
>> +
>> +static int lpc18xx_eeprom_write(void *context, const void *data,
>> size_t count)
>> +{
>> +    struct lpc18xx_eeprom_dev *eeprom = context;
>> +    unsigned int offset = eeprom->reg_bytes;
>> +
>> +    if (count <= offset)
>> +        return -EINVAL;
>> +
>> +
> unnecessary new line.

ACK.

> 
>> +    return lpc18xx_eeprom_gather_write(context, data, eeprom->reg_bytes,
>> +                       data + offset, count - offset);
>> +}
>> +
[snip]
>> +
>> +static int lpc18xx_eeprom_probe(struct platform_device *pdev)
>> +{
>> +    struct lpc18xx_eeprom_dev *eeprom;
>> +    struct device *dev = &pdev->dev;
>> +    struct reset_control *rst;
>> +    unsigned long clk_rate;
>> +    struct regmap *regmap;
>> +    struct resource *res;
>> +    int ret;
>> +
>> +    eeprom = devm_kzalloc(dev, sizeof(*eeprom), GFP_KERNEL);
>> +    if (!eeprom)
>> +        return -ENOMEM;
>> +
>> +    res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "reg");
>> +    eeprom->reg_base = devm_ioremap_resource(dev, res);
>> +    if (IS_ERR(eeprom->reg_base))
>> +        return PTR_ERR(eeprom->reg_base);
>> +
>> +    res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem");
>> +    eeprom->mem_base = devm_ioremap_resource(dev, res);
>> +    if (IS_ERR(eeprom->mem_base))
>> +        return PTR_ERR(eeprom->mem_base);
>> +
>> +    eeprom->clk = devm_clk_get(&pdev->dev, "eeprom");
>> +    if (IS_ERR(eeprom->clk)) {
>> +        dev_err(&pdev->dev, "failed to get eeprom clock\n");
>> +        return PTR_ERR(eeprom->clk);
>> +    }
>> +
>> +    ret = clk_prepare_enable(eeprom->clk);
>> +    if (ret < 0) {
>> +        dev_err(dev, "failed to prepare/enable eeprom clk: %d\n", ret);
>> +        return ret;
>> +    }
>> +
>> +    rst = devm_reset_control_get(dev, NULL);
>> +    if (IS_ERR(rst)) {
>> +        dev_err(dev, "failed to get reset: %ld\n", PTR_ERR(rst));
>> +        ret = PTR_ERR(rst);
>> +        goto err_clk;
>> +    }
>> +
>> +    ret = reset_control_deassert(rst);
>> +    if (ret < 0) {
>> +        dev_err(dev, "failed to deassert reset: %d\n", ret);
>> +        goto err_clk;
>> +    }
>> +
>> +    eeprom->val_bytes = lpc18xx_regmap_config.val_bits / 8;
>> +    eeprom->reg_bytes = lpc18xx_regmap_config.reg_bits / 8;
>> +
>> +    /*
>> +     * Clock rate is generated by dividing the system bus clock by the
>> +     * division factor, contained in the divider register (minus 1
>> encoded).
>> +     */
>> +    clk_rate = clk_get_rate(eeprom->clk);
>> +    clk_rate = DIV_ROUND_UP(clk_rate, LPC18XX_EEPROM_CLOCK_HZ) - 1;
>> +    lpc18xx_eeprom_writel(eeprom, LPC18XX_EEPROM_CLKDIV, clk_rate);
>> +
>> +    /*
>> +     * Writing a single word to the page will start the erase/program
>> cycle
>> +     * automatically
>> +     */
>> +    lpc18xx_eeprom_writel(eeprom, LPC18XX_EEPROM_AUTOPROG,
>> +                  LPC18XX_EEPROM_AUTOPROG_WORD);
>> +
>> +    lpc18xx_eeprom_writel(eeprom, LPC18XX_EEPROM_PWRDWN,
>> +                  LPC18XX_EEPROM_PWRDWN_NO);
> 
> Any reason not power up/dowm dynamically in
> lpc18xx_eeprom_write()/lpc18xx_eeprom_read().
> 
> This can potentially save some power.

That sounds good. I'll add this feature and check that it works properly.

> 
>> +
>> +    lpc18xx_regmap_config.max_register = resource_size(res) - 1;
>> +    lpc18xx_regmap_config.writeable_reg = lpc18xx_eeprom_writeable_reg;
>> +    lpc18xx_regmap_config.readable_reg = lpc18xx_eeprom_readable_reg;
>> +
>> +    regmap = devm_regmap_init(dev, &lpc18xx_eeprom_bus, eeprom,
>> +                  &lpc18xx_regmap_config);
>> +    if (IS_ERR(regmap)) {
>> +        dev_err(dev, "regmap init failed: %ld\n", PTR_ERR(regmap));
>> +        ret = PTR_ERR(regmap);
>> +        goto err_clk;
>> +    }
>> +
>> +    lpc18xx_nvmem_config.dev = dev;
>> +
>> +    eeprom->nvmem = nvmem_register(&lpc18xx_nvmem_config);
>> +    if (IS_ERR(eeprom->nvmem)) {
>> +        ret = PTR_ERR(eeprom->nvmem);
>> +        goto err_clk;
>> +    }
>> +
>> +    platform_set_drvdata(pdev, eeprom);
>> +
>> +    return 0;
>> +
>> +err_clk:
> 
> Should this error path also include power down/reset assert the eeprom?

Yes, I'll add another cleanup routine.

> 
>> +    clk_disable_unprepare(eeprom->clk);
>> +
>> +    return ret;
>> +}
>> +
>> +static int lpc18xx_eeprom_remove(struct platform_device *pdev)
>> +{
>> +    struct lpc18xx_eeprom_dev *eeprom = platform_get_drvdata(pdev);
>> +
>> +    lpc18xx_eeprom_writel(eeprom, LPC18XX_EEPROM_PWRDWN,
>> +                  LPC18XX_EEPROM_PWRDWN_YES);
>> +
>> +    clk_disable_unprepare(eeprom->clk);
>> +
>> +    return nvmem_unregister(eeprom->nvmem);
> 
> Same comment as Joachim, should the reset be asserted too?

No. That would cause a reset, disabling EEPROM power down mode.

-- 
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar
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WARNING: multiple messages have this Message-ID (diff)
From: ariel@vanguardiasur.com.ar (Ariel D'Alessandro)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/4] nvmem: NXP LPC18xx EEPROM memory NVMEM driver
Date: Fri, 30 Oct 2015 12:42:44 -0300	[thread overview]
Message-ID: <56338FF4.8050102@vanguardiasur.com.ar> (raw)
In-Reply-To: <562E377A.3040604@linaro.org>

Srinivas,

El 26/10/15 a las 11:23, Srinivas Kandagatla escribi?:
> 
> 
> On 19/10/15 18:32, Ariel D'Alessandro wrote:
>> This commit adds support for NXP LPC18xx EEPROM memory found in NXP
> s/commit/patch

OK.

> 
>> LPC185x/3x and LPC435x/3x/2x/1x devices.
>>
>> EEPROM size is 16384 bytes and it can be entirely read and
>> written/erased with 1 word (4 bytes) granularity. The last page
>> (128 bytes) contains the EEPROM initialization data and is not writable.
>>
>> Erase/program time is less than 3ms. The EEPROM device requires a
>> ~1500 kHz clock (min 800 kHz, max 1600 kHz) that is generated dividing
>> the system bus clock by the division factor, contained in the divider
>> register (minus 1 encoded).
>>
>> Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
>> ---
>>   drivers/nvmem/Kconfig          |   9 ++
>>   drivers/nvmem/Makefile         |   2 +
>>   drivers/nvmem/lpc18xx_eeprom.c | 266
>> +++++++++++++++++++++++++++++++++++++++++
>>   3 files changed, 277 insertions(+)
>>   create mode 100644 drivers/nvmem/lpc18xx_eeprom.c
>>
[snip]
>> diff --git a/drivers/nvmem/lpc18xx_eeprom.c
>> b/drivers/nvmem/lpc18xx_eeprom.c
>> new file mode 100644
>> index 0000000..ccdda66
>> --- /dev/null
>> +++ b/drivers/nvmem/lpc18xx_eeprom.c
>> @@ -0,0 +1,266 @@
>> +/*
>> + * NXP LPC18xx/LPC43xx EEPROM memory NVMEM driver
>> + *
>> + * Copyright (c) 2015 Ariel D'Alessandro <ariel@vanguardiasur.com>
>> + *
>> + * This program is free software; you can redistribute it and/or
>> modify it
>> + * under the terms of the GNU General Public License version 2 as
>> published by
>> + * the Free Software Foundation.
>> + */
>> +
>> +#include <linux/clk.h>
>> +#include <linux/device.h>
>> +#include <linux/delay.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/module.h>
>> +#include <linux/nvmem-provider.h>
>> +#include <linux/of_device.h>
> Why do you need above?
> 
> Also you should probably include
> 
>  #include <linux/platform_device.h>

You're right. No need for of_device.h, only platform_device.h.

> 
> 
>> +#include <linux/regmap.h>
>> +#include <linux/reset.h>
>> +
>> +/* Registers */
>> +#define LPC18XX_EEPROM_AUTOPROG        0x00c
>> +#define LPC18XX_EEPROM_AUTOPROG_WORD    0x1
>> +
>> +#define LPC18XX_EEPROM_CLKDIV        0x014
>> +
>> +#define LPC18XX_EEPROM_PWRDWN        0x018
>> +#define LPC18XX_EEPROM_PWRDWN_NO    0x0
>> +#define LPC18XX_EEPROM_PWRDWN_YES    0x1
>> +
>> +/* Fixed page size (bytes) */
>> +#define LPC18XX_EEPROM_PAGE_SIZE    0x80
>> +
>> +/* EEPROM device requires a ~1500 kHz clock (min 800 kHz, max 1600
>> kHz) */
>> +#define LPC18XX_EEPROM_CLOCK_HZ        1500000
>> +
>> +struct lpc18xx_eeprom_dev {
>> +    struct clk *clk;
>> +    void __iomem *reg_base;
>> +    void __iomem *mem_base;
>> +    struct nvmem_device *nvmem;
>> +    unsigned reg_bytes;
>> +    unsigned val_bytes;
>> +};
>> +
>> +static inline void lpc18xx_eeprom_writel(struct lpc18xx_eeprom_dev
>> *eeprom,
>> +                     u32 reg, u32 val)
>> +{
>> +    writel(val, eeprom->reg_base + reg);
>> +}
> I don't have a strong feeling but, I see no point to have a wrapper for
> writel which is only used in probe function.

Well, to be correct it's also used in remove function. And I might call
it in read()/write() functions to allow dynamic power on/off.
I'd prefer keeping the wrapper.

> 
>> +
>> +static int lpc18xx_eeprom_gather_write(void *context, const void *reg,
>> +                       size_t reg_size, const void *val,
>> +                       size_t val_size)
>> +{
>> +    struct lpc18xx_eeprom_dev *eeprom = context;
>> +    unsigned int offset = *(u32 *)reg;
>> +
>> +    /* 3 ms of erase/program time between each writing */
>> +    while (val_size) {
>> +        writel(*(u32 *)val, eeprom->mem_base + offset);
>> +        usleep_range(3000, 4000);
>> +        val_size -= eeprom->val_bytes;
>> +        val += eeprom->val_bytes;
>> +        offset += eeprom->val_bytes;
>> +    }
>> +
>> +    return 0;
>> +}
>> +
>> +static int lpc18xx_eeprom_write(void *context, const void *data,
>> size_t count)
>> +{
>> +    struct lpc18xx_eeprom_dev *eeprom = context;
>> +    unsigned int offset = eeprom->reg_bytes;
>> +
>> +    if (count <= offset)
>> +        return -EINVAL;
>> +
>> +
> unnecessary new line.

ACK.

> 
>> +    return lpc18xx_eeprom_gather_write(context, data, eeprom->reg_bytes,
>> +                       data + offset, count - offset);
>> +}
>> +
[snip]
>> +
>> +static int lpc18xx_eeprom_probe(struct platform_device *pdev)
>> +{
>> +    struct lpc18xx_eeprom_dev *eeprom;
>> +    struct device *dev = &pdev->dev;
>> +    struct reset_control *rst;
>> +    unsigned long clk_rate;
>> +    struct regmap *regmap;
>> +    struct resource *res;
>> +    int ret;
>> +
>> +    eeprom = devm_kzalloc(dev, sizeof(*eeprom), GFP_KERNEL);
>> +    if (!eeprom)
>> +        return -ENOMEM;
>> +
>> +    res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "reg");
>> +    eeprom->reg_base = devm_ioremap_resource(dev, res);
>> +    if (IS_ERR(eeprom->reg_base))
>> +        return PTR_ERR(eeprom->reg_base);
>> +
>> +    res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem");
>> +    eeprom->mem_base = devm_ioremap_resource(dev, res);
>> +    if (IS_ERR(eeprom->mem_base))
>> +        return PTR_ERR(eeprom->mem_base);
>> +
>> +    eeprom->clk = devm_clk_get(&pdev->dev, "eeprom");
>> +    if (IS_ERR(eeprom->clk)) {
>> +        dev_err(&pdev->dev, "failed to get eeprom clock\n");
>> +        return PTR_ERR(eeprom->clk);
>> +    }
>> +
>> +    ret = clk_prepare_enable(eeprom->clk);
>> +    if (ret < 0) {
>> +        dev_err(dev, "failed to prepare/enable eeprom clk: %d\n", ret);
>> +        return ret;
>> +    }
>> +
>> +    rst = devm_reset_control_get(dev, NULL);
>> +    if (IS_ERR(rst)) {
>> +        dev_err(dev, "failed to get reset: %ld\n", PTR_ERR(rst));
>> +        ret = PTR_ERR(rst);
>> +        goto err_clk;
>> +    }
>> +
>> +    ret = reset_control_deassert(rst);
>> +    if (ret < 0) {
>> +        dev_err(dev, "failed to deassert reset: %d\n", ret);
>> +        goto err_clk;
>> +    }
>> +
>> +    eeprom->val_bytes = lpc18xx_regmap_config.val_bits / 8;
>> +    eeprom->reg_bytes = lpc18xx_regmap_config.reg_bits / 8;
>> +
>> +    /*
>> +     * Clock rate is generated by dividing the system bus clock by the
>> +     * division factor, contained in the divider register (minus 1
>> encoded).
>> +     */
>> +    clk_rate = clk_get_rate(eeprom->clk);
>> +    clk_rate = DIV_ROUND_UP(clk_rate, LPC18XX_EEPROM_CLOCK_HZ) - 1;
>> +    lpc18xx_eeprom_writel(eeprom, LPC18XX_EEPROM_CLKDIV, clk_rate);
>> +
>> +    /*
>> +     * Writing a single word to the page will start the erase/program
>> cycle
>> +     * automatically
>> +     */
>> +    lpc18xx_eeprom_writel(eeprom, LPC18XX_EEPROM_AUTOPROG,
>> +                  LPC18XX_EEPROM_AUTOPROG_WORD);
>> +
>> +    lpc18xx_eeprom_writel(eeprom, LPC18XX_EEPROM_PWRDWN,
>> +                  LPC18XX_EEPROM_PWRDWN_NO);
> 
> Any reason not power up/dowm dynamically in
> lpc18xx_eeprom_write()/lpc18xx_eeprom_read().
> 
> This can potentially save some power.

That sounds good. I'll add this feature and check that it works properly.

> 
>> +
>> +    lpc18xx_regmap_config.max_register = resource_size(res) - 1;
>> +    lpc18xx_regmap_config.writeable_reg = lpc18xx_eeprom_writeable_reg;
>> +    lpc18xx_regmap_config.readable_reg = lpc18xx_eeprom_readable_reg;
>> +
>> +    regmap = devm_regmap_init(dev, &lpc18xx_eeprom_bus, eeprom,
>> +                  &lpc18xx_regmap_config);
>> +    if (IS_ERR(regmap)) {
>> +        dev_err(dev, "regmap init failed: %ld\n", PTR_ERR(regmap));
>> +        ret = PTR_ERR(regmap);
>> +        goto err_clk;
>> +    }
>> +
>> +    lpc18xx_nvmem_config.dev = dev;
>> +
>> +    eeprom->nvmem = nvmem_register(&lpc18xx_nvmem_config);
>> +    if (IS_ERR(eeprom->nvmem)) {
>> +        ret = PTR_ERR(eeprom->nvmem);
>> +        goto err_clk;
>> +    }
>> +
>> +    platform_set_drvdata(pdev, eeprom);
>> +
>> +    return 0;
>> +
>> +err_clk:
> 
> Should this error path also include power down/reset assert the eeprom?

Yes, I'll add another cleanup routine.

> 
>> +    clk_disable_unprepare(eeprom->clk);
>> +
>> +    return ret;
>> +}
>> +
>> +static int lpc18xx_eeprom_remove(struct platform_device *pdev)
>> +{
>> +    struct lpc18xx_eeprom_dev *eeprom = platform_get_drvdata(pdev);
>> +
>> +    lpc18xx_eeprom_writel(eeprom, LPC18XX_EEPROM_PWRDWN,
>> +                  LPC18XX_EEPROM_PWRDWN_YES);
>> +
>> +    clk_disable_unprepare(eeprom->clk);
>> +
>> +    return nvmem_unregister(eeprom->nvmem);
> 
> Same comment as Joachim, should the reset be asserted too?

No. That would cause a reset, disabling EEPROM power down mode.

-- 
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar

  parent reply	other threads:[~2015-10-30 15:42 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-19 17:32 [PATCH v2 0/4] Add support for NXP LPC18xx EEPROM using nvmem Ariel D'Alessandro
2015-10-19 17:32 ` Ariel D'Alessandro
     [not found] ` <1445275946-32653-1-git-send-email-ariel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
2015-10-19 17:32   ` [PATCH v2 1/4] DT: nvmem: Add NXP LPC18xx EEPROM memory binding documentation Ariel D'Alessandro
2015-10-19 17:32     ` Ariel D'Alessandro
     [not found]     ` <1445275946-32653-2-git-send-email-ariel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
2015-10-24 21:44       ` Joachim Eastwood
2015-10-24 21:44         ` Joachim Eastwood
     [not found]         ` <CAGhQ9VyCBTWh6qgZ__eNLqooNURsYr9ZVtDz2qCKoa0MoVgXtA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-10-30 12:45           ` Ariel D'Alessandro
2015-10-30 12:45             ` Ariel D'Alessandro
2015-10-27  7:49       ` Rob Herring
2015-10-27  7:49         ` Rob Herring
2015-10-19 17:32   ` [PATCH v2 2/4] nvmem: NXP LPC18xx EEPROM memory NVMEM driver Ariel D'Alessandro
2015-10-19 17:32     ` Ariel D'Alessandro
     [not found]     ` <1445275946-32653-3-git-send-email-ariel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
2015-10-24 22:04       ` Joachim Eastwood
2015-10-24 22:04         ` Joachim Eastwood
     [not found]         ` <CAGhQ9Vyg6sScq7yM=7judsMPHOc5VF2zf=7LPxmbmL7wF=vvgw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-10-26 13:37           ` Srinivas Kandagatla
2015-10-26 13:37             ` Srinivas Kandagatla
     [not found]             ` <562E2CB1.80706-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-10-30 14:58               ` Ariel D'Alessandro
2015-10-30 14:58                 ` Ariel D'Alessandro
     [not found]                 ` <563385B2.90403-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
2015-11-16 15:33                   ` Ariel D'Alessandro
2015-11-16 15:33                     ` Ariel D'Alessandro
     [not found]                     ` <5649F74A.9020706-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
2015-11-16 15:37                       ` Srinivas Kandagatla
2015-11-16 15:37                         ` Srinivas Kandagatla
     [not found]                         ` <5649F856.9000101-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-12-03 18:39                           ` Ezequiel Garcia
2015-12-03 18:39                             ` Ezequiel Garcia
2015-10-30 14:55           ` Ariel D'Alessandro
2015-10-30 14:55             ` Ariel D'Alessandro
     [not found]             ` <563384CB.3070607-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
2015-11-16 15:24               ` Ariel D'Alessandro
2015-11-16 15:24                 ` Ariel D'Alessandro
2015-10-26 14:23       ` Srinivas Kandagatla
2015-10-26 14:23         ` Srinivas Kandagatla
     [not found]         ` <562E377A.3040604-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-10-30 15:42           ` Ariel D'Alessandro [this message]
2015-10-30 15:42             ` Ariel D'Alessandro
     [not found]             ` <56338FF4.8050102-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
2015-10-30 16:00               ` Ezequiel Garcia
2015-10-30 16:00                 ` Ezequiel Garcia
2015-11-03  8:20     ` Stefan Wahren
2015-11-03  8:20       ` Stefan Wahren
     [not found]       ` <56386E30.4060905-eS4NqCHxEME@public.gmane.org>
2015-11-16 15:29         ` Ariel D'Alessandro
2015-11-16 15:29           ` Ariel D'Alessandro
     [not found]           ` <5649F64B.5050407-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
2015-11-17 10:01             ` Stefan Wahren
2015-11-17 10:01               ` Stefan Wahren
     [not found]               ` <1526033037.5264.1447754499675.JavaMail.open-xchange-h4m1HHXQYNFdfASV6gReHsgmgJlYmuWJ@public.gmane.org>
2015-11-17 19:53                 ` Ariel D'Alessandro
2015-11-17 19:53                   ` Ariel D'Alessandro
2015-10-19 17:32   ` [PATCH v2 3/4] ARM: dts: lpc18xx: add EEPROM memory node Ariel D'Alessandro
2015-10-19 17:32     ` Ariel D'Alessandro
     [not found]     ` <1445275946-32653-4-git-send-email-ariel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
2015-10-24 21:42       ` Joachim Eastwood
2015-10-24 21:42         ` Joachim Eastwood
2015-10-19 17:32   ` [PATCH v2 4/4] ARM: configs: lpc18xx: enable EEPROM NVMEM driver Ariel D'Alessandro
2015-10-19 17:32     ` Ariel D'Alessandro
     [not found]     ` <1445275946-32653-5-git-send-email-ariel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
2015-10-24 21:41       ` Joachim Eastwood
2015-10-24 21:41         ` Joachim Eastwood

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