* [PATCH v3 0/2] clocksource: Add support for Oxford Semiconductor RPS Dual Timer
@ 2016-06-15 10:13 ` Neil Armstrong
0 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-15 10:13 UTC (permalink / raw)
To: linux-kernel, linux-arm-kernel, daniel.lezcano, tglx; +Cc: Neil Armstrong
Adds driver for the Oxford Semiconductor RPS Dual Timer as base of the OX810SE
clock tick event and sched clock source.
This driver was posted with the initial OX810SE platform patchset at :
http://lkml.kernel.org/r/1457005210-18485-5-git-send-email-narmstrong@baylibre.com
and
http://lkml.kernel.org/r/1457005210-18485-6-git-send-email-narmstrong@baylibre.com
But since the SP804 was very similar, I decided to adapt it for OX810SE usage.
For some reasons, the SP804 has a lot of legacy code for non-dt, non-multiarch
platforms and needs a complete rewrite.
For now, this adds a dedicated driver with the same bindings as intended for SP804.
Changes since v2 at http://lkml.kernel.org/r/1465315452-20599-1-git-send-email-narmstrong@baylibre.com :
- Add Kconfig text with COMPILE_TEST options
- Add CLKSRC_OF select
- Add clean rollback of init in case of error
- Prepare for clocksource and clockevent rollback by returning an int value
- Switch kzalloc WARN_ON to a pr_err
Changes since v1 at http://lkml.kernel.org/r/1464688198-9655-1-git-send-email-narmstrong@baylibre.com :
- fix timer_shutdown behaviour
- clean up period calculation
Neil Armstrong (2):
clocksource: Add Oxford Semiconductor RPS Dual Timer
dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer
bindings
.../devicetree/bindings/timer/oxsemi,rps-timer.txt | 17 ++
drivers/clocksource/Kconfig | 7 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-oxnas-rps.c | 290 +++++++++++++++++++++
4 files changed, 315 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
create mode 100644 drivers/clocksource/timer-oxnas-rps.c
--
1.9.1
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 0/2] clocksource: Add support for Oxford Semiconductor RPS Dual Timer
@ 2016-06-15 10:13 ` Neil Armstrong
0 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-15 10:13 UTC (permalink / raw)
To: linux-arm-kernel
Adds driver for the Oxford Semiconductor RPS Dual Timer as base of the OX810SE
clock tick event and sched clock source.
This driver was posted with the initial OX810SE platform patchset at :
http://lkml.kernel.org/r/1457005210-18485-5-git-send-email-narmstrong at baylibre.com
and
http://lkml.kernel.org/r/1457005210-18485-6-git-send-email-narmstrong at baylibre.com
But since the SP804 was very similar, I decided to adapt it for OX810SE usage.
For some reasons, the SP804 has a lot of legacy code for non-dt, non-multiarch
platforms and needs a complete rewrite.
For now, this adds a dedicated driver with the same bindings as intended for SP804.
Changes since v2 at http://lkml.kernel.org/r/1465315452-20599-1-git-send-email-narmstrong at baylibre.com :
- Add Kconfig text with COMPILE_TEST options
- Add CLKSRC_OF select
- Add clean rollback of init in case of error
- Prepare for clocksource and clockevent rollback by returning an int value
- Switch kzalloc WARN_ON to a pr_err
Changes since v1 at http://lkml.kernel.org/r/1464688198-9655-1-git-send-email-narmstrong at baylibre.com :
- fix timer_shutdown behaviour
- clean up period calculation
Neil Armstrong (2):
clocksource: Add Oxford Semiconductor RPS Dual Timer
dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer
bindings
.../devicetree/bindings/timer/oxsemi,rps-timer.txt | 17 ++
drivers/clocksource/Kconfig | 7 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-oxnas-rps.c | 290 +++++++++++++++++++++
4 files changed, 315 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
create mode 100644 drivers/clocksource/timer-oxnas-rps.c
--
1.9.1
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
2016-06-15 10:13 ` Neil Armstrong
@ 2016-06-15 10:13 ` Neil Armstrong
-1 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-15 10:13 UTC (permalink / raw)
To: linux-kernel, linux-arm-kernel, daniel.lezcano, tglx
Cc: Neil Armstrong, Ma Haijun
Add clocksource and clockevent driver from dual RPS timer.
The HW provides a dual one-shot or periodic 24bit timers,
the drivers set the first one as tick event source and the
second as a continuous scheduler clock source.
The timer can use 1, 16 or 256 as pre-dividers, thus the
clocksource uses 16 by default.
CC: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/clocksource/Kconfig | 7 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-oxnas-rps.c | 290 ++++++++++++++++++++++++++++++++++
3 files changed, 298 insertions(+)
create mode 100644 drivers/clocksource/timer-oxnas-rps.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 47352d2..7e937e1 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -293,6 +293,13 @@ config VF_PIT_TIMER
help
Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
+config OXNAS_RPS_TIMER
+ bool "Oxford Semiconductor OXNAS RPS Timers driver" if COMPILE_TEST
+ select CLKSRC_OF
+ select CLKSRC_MMIO
+ help
+ This enables support for the Oxford Semiconductor OXNAS RPS timers.
+
config SYS_SUPPORTS_SH_CMT
bool
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 473974f..bc66981 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_MTK_TIMER) += mtk_timer.o
obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o
obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o
obj-$(CONFIG_CLKSRC_NPS) += timer-nps.o
+obj-$(CONFIG_OXNAS_RPS_TIMER) += timer-oxnas-rps.o
obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
diff --git a/drivers/clocksource/timer-oxnas-rps.c b/drivers/clocksource/timer-oxnas-rps.c
new file mode 100644
index 0000000..c002e99
--- /dev/null
+++ b/drivers/clocksource/timer-oxnas-rps.c
@@ -0,0 +1,290 @@
+/*
+ * drivers/clocksource/timer-oxnas-rps.c
+ *
+ * Copyright (C) 2009 Oxford Semiconductor Ltd
+ * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
+ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/clockchips.h>
+#include <linux/sched_clock.h>
+
+/* TIMER1 used as tick
+ * TIMER2 used as clocksource
+ */
+
+/* Registers definitions */
+
+#define TIMER_LOAD_REG 0x0
+#define TIMER_CURR_REG 0x4
+#define TIMER_CTRL_REG 0x8
+#define TIMER_CLRINT_REG 0xC
+
+#define TIMER_BITS 24
+
+#define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
+
+#define TIMER_PERIODIC BIT(6)
+#define TIMER_ENABLE BIT(7)
+
+#define TIMER_DIV1 (0)
+#define TIMER_DIV16 (1 << 2)
+#define TIMER_DIV256 (2 << 2)
+
+#define TIMER1_REG_OFFSET 0
+#define TIMER2_REG_OFFSET 0x20
+
+/* Clockevent & Clocksource data */
+
+struct oxnas_rps_timer {
+ struct clock_event_device clkevent;
+ void __iomem *clksrc_base;
+ void __iomem *clkevt_base;
+ unsigned long timer_period;
+ unsigned int timer_prescaler;
+ struct clk *clk;
+ int irq;
+};
+
+static irqreturn_t oxnas_rps_timer_irq(int irq, void *dev_id)
+{
+ struct oxnas_rps_timer *rps = dev_id;
+
+ writel_relaxed(0, rps->clkevt_base + TIMER_CLRINT_REG);
+
+ rps->clkevent.event_handler(&rps->clkevent);
+
+ return IRQ_HANDLED;
+}
+
+static void oxnas_rps_timer_config(struct oxnas_rps_timer *rps,
+ unsigned long period,
+ unsigned int periodic)
+{
+ uint32_t cfg = rps->timer_prescaler;
+
+ if (period)
+ cfg |= TIMER_ENABLE;
+
+ if (periodic)
+ cfg |= TIMER_PERIODIC;
+
+ writel_relaxed(period, rps->clkevt_base + TIMER_LOAD_REG);
+ writel_relaxed(cfg, rps->clkevt_base + TIMER_CTRL_REG);
+}
+
+static int oxnas_rps_timer_shutdown(struct clock_event_device *evt)
+{
+ struct oxnas_rps_timer *rps =
+ container_of(evt, struct oxnas_rps_timer, clkevent);
+
+ oxnas_rps_timer_config(rps, 0, 0);
+
+ return 0;
+}
+
+static int oxnas_rps_timer_set_periodic(struct clock_event_device *evt)
+{
+ struct oxnas_rps_timer *rps =
+ container_of(evt, struct oxnas_rps_timer, clkevent);
+
+ oxnas_rps_timer_config(rps, rps->timer_period, 1);
+
+ return 0;
+}
+
+static int oxnas_rps_timer_set_oneshot(struct clock_event_device *evt)
+{
+ struct oxnas_rps_timer *rps =
+ container_of(evt, struct oxnas_rps_timer, clkevent);
+
+ oxnas_rps_timer_config(rps, rps->timer_period, 0);
+
+ return 0;
+}
+
+static int oxnas_rps_timer_next_event(unsigned long delta,
+ struct clock_event_device *evt)
+{
+ struct oxnas_rps_timer *rps =
+ container_of(evt, struct oxnas_rps_timer, clkevent);
+
+ oxnas_rps_timer_config(rps, delta, 0);
+
+ return 0;
+}
+
+static int __init oxnas_rps_clockevent_init(struct oxnas_rps_timer *rps)
+{
+ ulong clk_rate = clk_get_rate(rps->clk);
+ ulong timer_rate;
+
+ /* Start with prescaler 1 */
+ rps->timer_prescaler = TIMER_DIV1;
+ rps->timer_period = DIV_ROUND_UP(clk_rate, HZ);
+ timer_rate = clk_rate;
+
+ if (rps->timer_period > TIMER_MAX_VAL) {
+ rps->timer_prescaler = TIMER_DIV16;
+ timer_rate = clk_rate / 16;
+ rps->timer_period = DIV_ROUND_UP(timer_rate, HZ);
+ }
+ if (rps->timer_period > TIMER_MAX_VAL) {
+ rps->timer_prescaler = TIMER_DIV256;
+ timer_rate = clk_rate / 256;
+ rps->timer_period = DIV_ROUND_UP(timer_rate, HZ);
+ }
+
+ rps->clkevent.name = "oxnas-rps";
+ rps->clkevent.features = CLOCK_EVT_FEAT_PERIODIC |
+ CLOCK_EVT_FEAT_ONESHOT |
+ CLOCK_EVT_FEAT_DYNIRQ;
+ rps->clkevent.tick_resume = oxnas_rps_timer_shutdown;
+ rps->clkevent.set_state_shutdown = oxnas_rps_timer_shutdown;
+ rps->clkevent.set_state_periodic = oxnas_rps_timer_set_periodic;
+ rps->clkevent.set_state_oneshot = oxnas_rps_timer_set_oneshot;
+ rps->clkevent.set_next_event = oxnas_rps_timer_next_event;
+ rps->clkevent.rating = 200;
+ rps->clkevent.cpumask = cpu_possible_mask;
+ rps->clkevent.irq = rps->irq;
+ clockevents_config_and_register(&rps->clkevent,
+ timer_rate,
+ 1,
+ TIMER_MAX_VAL);
+
+ pr_info("Registered clock event rate %luHz prescaler %x period %lu\n",
+ clk_rate,
+ rps->timer_prescaler,
+ rps->timer_period);
+
+ return 0;
+}
+
+/* Clocksource */
+
+static void __iomem *timer_sched_base;
+
+static u64 notrace oxnas_rps_read_sched_clock(void)
+{
+ return ~readl_relaxed(timer_sched_base);
+}
+
+static int __init oxnas_rps_clocksource_init(struct oxnas_rps_timer *rps)
+{
+ ulong clk_rate = clk_get_rate(rps->clk);
+ int ret;
+
+ /* use prescale 16 */
+ clk_rate = clk_rate / 16;
+
+ writel_relaxed(TIMER_MAX_VAL, rps->clksrc_base + TIMER_LOAD_REG);
+ writel_relaxed(TIMER_PERIODIC | TIMER_ENABLE | TIMER_DIV16,
+ rps->clksrc_base + TIMER_CTRL_REG);
+
+ timer_sched_base = rps->clksrc_base + TIMER_CURR_REG;
+ sched_clock_register(oxnas_rps_read_sched_clock,
+ TIMER_BITS, clk_rate);
+ ret = clocksource_mmio_init(timer_sched_base,
+ "oxnas_rps_clocksource_timer",
+ clk_rate, 250, TIMER_BITS,
+ clocksource_mmio_readl_down);
+ if (WARN_ON(ret)) {
+ pr_err("can't register clocksource\n");
+ return ret;
+ }
+
+ pr_info("Registered clocksource rate %luHz\n", clk_rate);
+
+ return 0;
+}
+
+static void __init oxnas_rps_timer_init(struct device_node *np)
+{
+ struct oxnas_rps_timer *rps;
+ void __iomem *base;
+ int ret;
+
+ rps = kzalloc(sizeof(*rps), GFP_KERNEL);
+ if (!rps) {
+ pr_err("Failed to allocate rps structure\n");
+ return;
+ }
+
+ rps->clk = of_clk_get(np, 0);
+ if (WARN_ON(IS_ERR(rps->clk)))
+ goto err_alloc;
+
+ if (WARN_ON(clk_prepare_enable(rps->clk)))
+ goto err_clk;
+
+ base = of_iomap(np, 0);
+ if (WARN_ON(!base))
+ goto err_clk_prepare;
+
+ rps->irq = irq_of_parse_and_map(np, 0);
+ if (WARN_ON(rps->irq < 0))
+ goto err_iomap;
+
+ rps->clkevt_base = base + TIMER1_REG_OFFSET;
+ rps->clksrc_base = base + TIMER2_REG_OFFSET;
+
+ /* Disable timers */
+ writel_relaxed(0, rps->clkevt_base + TIMER_CTRL_REG);
+ writel_relaxed(0, rps->clksrc_base + TIMER_CTRL_REG);
+ writel_relaxed(0, rps->clkevt_base + TIMER_LOAD_REG);
+ writel_relaxed(0, rps->clksrc_base + TIMER_LOAD_REG);
+ writel_relaxed(0, rps->clkevt_base + TIMER_CLRINT_REG);
+ writel_relaxed(0, rps->clksrc_base + TIMER_CLRINT_REG);
+
+ ret = request_irq(rps->irq, oxnas_rps_timer_irq,
+ IRQF_TIMER | IRQF_IRQPOLL,
+ "rps-timer", rps);
+ if (WARN_ON(ret))
+ goto err_iomap;
+
+ ret = oxnas_rps_clocksource_init(rps);
+ if (ret)
+ goto err_irqreq;
+
+ ret = oxnas_rps_clockevent_init(rps);
+ if (ret)
+ goto err_irqreq;
+
+ return;
+
+err_irqreq:
+ free_irq(rps->irq, rps);
+err_iomap:
+ iounmap(base);
+err_clk_prepare:
+ clk_disable_unprepare(rps->clk);
+err_clk:
+ clk_put(rps->clk);
+err_alloc:
+ kfree(rps);
+}
+
+CLOCKSOURCE_OF_DECLARE(ox810se_rps,
+ "oxsemi,ox810se-rps-timer", oxnas_rps_timer_init);
--
1.9.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
@ 2016-06-15 10:13 ` Neil Armstrong
0 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-15 10:13 UTC (permalink / raw)
To: linux-arm-kernel
Add clocksource and clockevent driver from dual RPS timer.
The HW provides a dual one-shot or periodic 24bit timers,
the drivers set the first one as tick event source and the
second as a continuous scheduler clock source.
The timer can use 1, 16 or 256 as pre-dividers, thus the
clocksource uses 16 by default.
CC: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/clocksource/Kconfig | 7 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-oxnas-rps.c | 290 ++++++++++++++++++++++++++++++++++
3 files changed, 298 insertions(+)
create mode 100644 drivers/clocksource/timer-oxnas-rps.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 47352d2..7e937e1 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -293,6 +293,13 @@ config VF_PIT_TIMER
help
Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
+config OXNAS_RPS_TIMER
+ bool "Oxford Semiconductor OXNAS RPS Timers driver" if COMPILE_TEST
+ select CLKSRC_OF
+ select CLKSRC_MMIO
+ help
+ This enables support for the Oxford Semiconductor OXNAS RPS timers.
+
config SYS_SUPPORTS_SH_CMT
bool
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 473974f..bc66981 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_MTK_TIMER) += mtk_timer.o
obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o
obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o
obj-$(CONFIG_CLKSRC_NPS) += timer-nps.o
+obj-$(CONFIG_OXNAS_RPS_TIMER) += timer-oxnas-rps.o
obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
diff --git a/drivers/clocksource/timer-oxnas-rps.c b/drivers/clocksource/timer-oxnas-rps.c
new file mode 100644
index 0000000..c002e99
--- /dev/null
+++ b/drivers/clocksource/timer-oxnas-rps.c
@@ -0,0 +1,290 @@
+/*
+ * drivers/clocksource/timer-oxnas-rps.c
+ *
+ * Copyright (C) 2009 Oxford Semiconductor Ltd
+ * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
+ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/clockchips.h>
+#include <linux/sched_clock.h>
+
+/* TIMER1 used as tick
+ * TIMER2 used as clocksource
+ */
+
+/* Registers definitions */
+
+#define TIMER_LOAD_REG 0x0
+#define TIMER_CURR_REG 0x4
+#define TIMER_CTRL_REG 0x8
+#define TIMER_CLRINT_REG 0xC
+
+#define TIMER_BITS 24
+
+#define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
+
+#define TIMER_PERIODIC BIT(6)
+#define TIMER_ENABLE BIT(7)
+
+#define TIMER_DIV1 (0)
+#define TIMER_DIV16 (1 << 2)
+#define TIMER_DIV256 (2 << 2)
+
+#define TIMER1_REG_OFFSET 0
+#define TIMER2_REG_OFFSET 0x20
+
+/* Clockevent & Clocksource data */
+
+struct oxnas_rps_timer {
+ struct clock_event_device clkevent;
+ void __iomem *clksrc_base;
+ void __iomem *clkevt_base;
+ unsigned long timer_period;
+ unsigned int timer_prescaler;
+ struct clk *clk;
+ int irq;
+};
+
+static irqreturn_t oxnas_rps_timer_irq(int irq, void *dev_id)
+{
+ struct oxnas_rps_timer *rps = dev_id;
+
+ writel_relaxed(0, rps->clkevt_base + TIMER_CLRINT_REG);
+
+ rps->clkevent.event_handler(&rps->clkevent);
+
+ return IRQ_HANDLED;
+}
+
+static void oxnas_rps_timer_config(struct oxnas_rps_timer *rps,
+ unsigned long period,
+ unsigned int periodic)
+{
+ uint32_t cfg = rps->timer_prescaler;
+
+ if (period)
+ cfg |= TIMER_ENABLE;
+
+ if (periodic)
+ cfg |= TIMER_PERIODIC;
+
+ writel_relaxed(period, rps->clkevt_base + TIMER_LOAD_REG);
+ writel_relaxed(cfg, rps->clkevt_base + TIMER_CTRL_REG);
+}
+
+static int oxnas_rps_timer_shutdown(struct clock_event_device *evt)
+{
+ struct oxnas_rps_timer *rps =
+ container_of(evt, struct oxnas_rps_timer, clkevent);
+
+ oxnas_rps_timer_config(rps, 0, 0);
+
+ return 0;
+}
+
+static int oxnas_rps_timer_set_periodic(struct clock_event_device *evt)
+{
+ struct oxnas_rps_timer *rps =
+ container_of(evt, struct oxnas_rps_timer, clkevent);
+
+ oxnas_rps_timer_config(rps, rps->timer_period, 1);
+
+ return 0;
+}
+
+static int oxnas_rps_timer_set_oneshot(struct clock_event_device *evt)
+{
+ struct oxnas_rps_timer *rps =
+ container_of(evt, struct oxnas_rps_timer, clkevent);
+
+ oxnas_rps_timer_config(rps, rps->timer_period, 0);
+
+ return 0;
+}
+
+static int oxnas_rps_timer_next_event(unsigned long delta,
+ struct clock_event_device *evt)
+{
+ struct oxnas_rps_timer *rps =
+ container_of(evt, struct oxnas_rps_timer, clkevent);
+
+ oxnas_rps_timer_config(rps, delta, 0);
+
+ return 0;
+}
+
+static int __init oxnas_rps_clockevent_init(struct oxnas_rps_timer *rps)
+{
+ ulong clk_rate = clk_get_rate(rps->clk);
+ ulong timer_rate;
+
+ /* Start with prescaler 1 */
+ rps->timer_prescaler = TIMER_DIV1;
+ rps->timer_period = DIV_ROUND_UP(clk_rate, HZ);
+ timer_rate = clk_rate;
+
+ if (rps->timer_period > TIMER_MAX_VAL) {
+ rps->timer_prescaler = TIMER_DIV16;
+ timer_rate = clk_rate / 16;
+ rps->timer_period = DIV_ROUND_UP(timer_rate, HZ);
+ }
+ if (rps->timer_period > TIMER_MAX_VAL) {
+ rps->timer_prescaler = TIMER_DIV256;
+ timer_rate = clk_rate / 256;
+ rps->timer_period = DIV_ROUND_UP(timer_rate, HZ);
+ }
+
+ rps->clkevent.name = "oxnas-rps";
+ rps->clkevent.features = CLOCK_EVT_FEAT_PERIODIC |
+ CLOCK_EVT_FEAT_ONESHOT |
+ CLOCK_EVT_FEAT_DYNIRQ;
+ rps->clkevent.tick_resume = oxnas_rps_timer_shutdown;
+ rps->clkevent.set_state_shutdown = oxnas_rps_timer_shutdown;
+ rps->clkevent.set_state_periodic = oxnas_rps_timer_set_periodic;
+ rps->clkevent.set_state_oneshot = oxnas_rps_timer_set_oneshot;
+ rps->clkevent.set_next_event = oxnas_rps_timer_next_event;
+ rps->clkevent.rating = 200;
+ rps->clkevent.cpumask = cpu_possible_mask;
+ rps->clkevent.irq = rps->irq;
+ clockevents_config_and_register(&rps->clkevent,
+ timer_rate,
+ 1,
+ TIMER_MAX_VAL);
+
+ pr_info("Registered clock event rate %luHz prescaler %x period %lu\n",
+ clk_rate,
+ rps->timer_prescaler,
+ rps->timer_period);
+
+ return 0;
+}
+
+/* Clocksource */
+
+static void __iomem *timer_sched_base;
+
+static u64 notrace oxnas_rps_read_sched_clock(void)
+{
+ return ~readl_relaxed(timer_sched_base);
+}
+
+static int __init oxnas_rps_clocksource_init(struct oxnas_rps_timer *rps)
+{
+ ulong clk_rate = clk_get_rate(rps->clk);
+ int ret;
+
+ /* use prescale 16 */
+ clk_rate = clk_rate / 16;
+
+ writel_relaxed(TIMER_MAX_VAL, rps->clksrc_base + TIMER_LOAD_REG);
+ writel_relaxed(TIMER_PERIODIC | TIMER_ENABLE | TIMER_DIV16,
+ rps->clksrc_base + TIMER_CTRL_REG);
+
+ timer_sched_base = rps->clksrc_base + TIMER_CURR_REG;
+ sched_clock_register(oxnas_rps_read_sched_clock,
+ TIMER_BITS, clk_rate);
+ ret = clocksource_mmio_init(timer_sched_base,
+ "oxnas_rps_clocksource_timer",
+ clk_rate, 250, TIMER_BITS,
+ clocksource_mmio_readl_down);
+ if (WARN_ON(ret)) {
+ pr_err("can't register clocksource\n");
+ return ret;
+ }
+
+ pr_info("Registered clocksource rate %luHz\n", clk_rate);
+
+ return 0;
+}
+
+static void __init oxnas_rps_timer_init(struct device_node *np)
+{
+ struct oxnas_rps_timer *rps;
+ void __iomem *base;
+ int ret;
+
+ rps = kzalloc(sizeof(*rps), GFP_KERNEL);
+ if (!rps) {
+ pr_err("Failed to allocate rps structure\n");
+ return;
+ }
+
+ rps->clk = of_clk_get(np, 0);
+ if (WARN_ON(IS_ERR(rps->clk)))
+ goto err_alloc;
+
+ if (WARN_ON(clk_prepare_enable(rps->clk)))
+ goto err_clk;
+
+ base = of_iomap(np, 0);
+ if (WARN_ON(!base))
+ goto err_clk_prepare;
+
+ rps->irq = irq_of_parse_and_map(np, 0);
+ if (WARN_ON(rps->irq < 0))
+ goto err_iomap;
+
+ rps->clkevt_base = base + TIMER1_REG_OFFSET;
+ rps->clksrc_base = base + TIMER2_REG_OFFSET;
+
+ /* Disable timers */
+ writel_relaxed(0, rps->clkevt_base + TIMER_CTRL_REG);
+ writel_relaxed(0, rps->clksrc_base + TIMER_CTRL_REG);
+ writel_relaxed(0, rps->clkevt_base + TIMER_LOAD_REG);
+ writel_relaxed(0, rps->clksrc_base + TIMER_LOAD_REG);
+ writel_relaxed(0, rps->clkevt_base + TIMER_CLRINT_REG);
+ writel_relaxed(0, rps->clksrc_base + TIMER_CLRINT_REG);
+
+ ret = request_irq(rps->irq, oxnas_rps_timer_irq,
+ IRQF_TIMER | IRQF_IRQPOLL,
+ "rps-timer", rps);
+ if (WARN_ON(ret))
+ goto err_iomap;
+
+ ret = oxnas_rps_clocksource_init(rps);
+ if (ret)
+ goto err_irqreq;
+
+ ret = oxnas_rps_clockevent_init(rps);
+ if (ret)
+ goto err_irqreq;
+
+ return;
+
+err_irqreq:
+ free_irq(rps->irq, rps);
+err_iomap:
+ iounmap(base);
+err_clk_prepare:
+ clk_disable_unprepare(rps->clk);
+err_clk:
+ clk_put(rps->clk);
+err_alloc:
+ kfree(rps);
+}
+
+CLOCKSOURCE_OF_DECLARE(ox810se_rps,
+ "oxsemi,ox810se-rps-timer", oxnas_rps_timer_init);
--
1.9.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
@ 2016-06-15 10:13 ` Neil Armstrong
0 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-15 10:13 UTC (permalink / raw)
To: linux-kernel, linux-arm-kernel, daniel.lezcano, tglx, devicetree
Cc: Neil Armstrong
Add DT bindings for the Oxford Semiconductor RPS dual Timer.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
.../devicetree/bindings/timer/oxsemi,rps-timer.txt | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
diff --git a/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt b/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
new file mode 100644
index 0000000..3ca89cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
@@ -0,0 +1,17 @@
+Oxford Semiconductor OXNAS SoCs Family RPS Timer
+================================================
+
+Required properties:
+- compatible: Should be "oxsemi,ox810se-rps-timer"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : The interrupts of the two timers
+- clocks : The phandle of the timer clock source
+
+example:
+
+timer0: timer@200 {
+ compatible = "oxsemi,ox810se-rps-timer";
+ reg = <0x200 0x40>;
+ clocks = <&rpsclk>;
+ interrupts = <4 5>;
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
@ 2016-06-15 10:13 ` Neil Armstrong
0 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-15 10:13 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A,
tglx-hfZtesqFncYOwBW4kG4KsQ, devicetree-u79uwXL29TY76Z2rM5mHXA
Cc: Neil Armstrong
Add DT bindings for the Oxford Semiconductor RPS dual Timer.
Signed-off-by: Neil Armstrong <narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
---
.../devicetree/bindings/timer/oxsemi,rps-timer.txt | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
diff --git a/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt b/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
new file mode 100644
index 0000000..3ca89cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
@@ -0,0 +1,17 @@
+Oxford Semiconductor OXNAS SoCs Family RPS Timer
+================================================
+
+Required properties:
+- compatible: Should be "oxsemi,ox810se-rps-timer"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : The interrupts of the two timers
+- clocks : The phandle of the timer clock source
+
+example:
+
+timer0: timer@200 {
+ compatible = "oxsemi,ox810se-rps-timer";
+ reg = <0x200 0x40>;
+ clocks = <&rpsclk>;
+ interrupts = <4 5>;
+};
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
@ 2016-06-15 10:13 ` Neil Armstrong
0 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-15 10:13 UTC (permalink / raw)
To: linux-arm-kernel
Add DT bindings for the Oxford Semiconductor RPS dual Timer.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
.../devicetree/bindings/timer/oxsemi,rps-timer.txt | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
diff --git a/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt b/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
new file mode 100644
index 0000000..3ca89cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
@@ -0,0 +1,17 @@
+Oxford Semiconductor OXNAS SoCs Family RPS Timer
+================================================
+
+Required properties:
+- compatible: Should be "oxsemi,ox810se-rps-timer"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : The interrupts of the two timers
+- clocks : The phandle of the timer clock source
+
+example:
+
+timer0: timer at 200 {
+ compatible = "oxsemi,ox810se-rps-timer";
+ reg = <0x200 0x40>;
+ clocks = <&rpsclk>;
+ interrupts = <4 5>;
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
2016-06-15 10:13 ` Neil Armstrong
@ 2016-06-15 10:23 ` Daniel Lezcano
-1 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-15 10:23 UTC (permalink / raw)
To: Neil Armstrong, linux-kernel, linux-arm-kernel, tglx, devicetree,
Rob Herring
On 06/15/2016 12:13 PM, Neil Armstrong wrote:
> Add DT bindings for the Oxford Semiconductor RPS dual Timer.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
Waiting for Rob's acked before picking the series.
Thanks !
-- Daniel
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
@ 2016-06-15 10:23 ` Daniel Lezcano
0 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-15 10:23 UTC (permalink / raw)
To: linux-arm-kernel
On 06/15/2016 12:13 PM, Neil Armstrong wrote:
> Add DT bindings for the Oxford Semiconductor RPS dual Timer.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
Waiting for Rob's acked before picking the series.
Thanks !
-- Daniel
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
2016-06-15 10:23 ` Daniel Lezcano
@ 2016-06-15 10:26 ` Daniel Lezcano
-1 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-15 10:26 UTC (permalink / raw)
To: Neil Armstrong, linux-kernel, linux-arm-kernel, tglx, devicetree,
Rob Herring
On 06/15/2016 12:23 PM, Daniel Lezcano wrote:
> On 06/15/2016 12:13 PM, Neil Armstrong wrote:
>> Add DT bindings for the Oxford Semiconductor RPS dual Timer.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>
> Waiting for Rob's acked before picking the series.
Ok, Rob already acked this patch in the V2.
I will take these patches in my tree.
Thanks.
-- Daniel
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
@ 2016-06-15 10:26 ` Daniel Lezcano
0 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-15 10:26 UTC (permalink / raw)
To: linux-arm-kernel
On 06/15/2016 12:23 PM, Daniel Lezcano wrote:
> On 06/15/2016 12:13 PM, Neil Armstrong wrote:
>> Add DT bindings for the Oxford Semiconductor RPS dual Timer.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>
> Waiting for Rob's acked before picking the series.
Ok, Rob already acked this patch in the V2.
I will take these patches in my tree.
Thanks.
-- Daniel
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
2016-06-15 10:26 ` Daniel Lezcano
@ 2016-06-15 10:39 ` Neil Armstrong
-1 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-15 10:39 UTC (permalink / raw)
To: Daniel Lezcano, linux-kernel, linux-arm-kernel, tglx, devicetree,
Rob Herring
On 06/15/2016 12:26 PM, Daniel Lezcano wrote:
> On 06/15/2016 12:23 PM, Daniel Lezcano wrote:
>> On 06/15/2016 12:13 PM, Neil Armstrong wrote:
>>> Add DT bindings for the Oxford Semiconductor RPS dual Timer.
>>>
>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>> ---
>>
>> Waiting for Rob's acked before picking the series.
>
> Ok, Rob already acked this patch in the V2.
>
> I will take these patches in my tree.
>
> Thanks.
>
> -- Daniel
>
Yes, I must fix this, I keep dropping these Acks.
Thanks Daniel,
Neil
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
@ 2016-06-15 10:39 ` Neil Armstrong
0 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-15 10:39 UTC (permalink / raw)
To: linux-arm-kernel
On 06/15/2016 12:26 PM, Daniel Lezcano wrote:
> On 06/15/2016 12:23 PM, Daniel Lezcano wrote:
>> On 06/15/2016 12:13 PM, Neil Armstrong wrote:
>>> Add DT bindings for the Oxford Semiconductor RPS dual Timer.
>>>
>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>> ---
>>
>> Waiting for Rob's acked before picking the series.
>
> Ok, Rob already acked this patch in the V2.
>
> I will take these patches in my tree.
>
> Thanks.
>
> -- Daniel
>
Yes, I must fix this, I keep dropping these Acks.
Thanks Daniel,
Neil
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
2016-06-15 10:13 ` Neil Armstrong
@ 2016-06-15 15:35 ` kbuild test robot
-1 siblings, 0 replies; 31+ messages in thread
From: kbuild test robot @ 2016-06-15 15:35 UTC (permalink / raw)
To: Neil Armstrong
Cc: kbuild-all, linux-kernel, linux-arm-kernel, daniel.lezcano, tglx,
Neil Armstrong, Ma Haijun
[-- Attachment #1: Type: text/plain, Size: 1823 bytes --]
Hi,
[auto build test WARNING on tip/timers/core]
[also build test WARNING on v4.7-rc3 next-20160615]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
config: blackfin-allmodconfig (attached as .config)
compiler: bfin-uclinux-gcc (GCC) 4.6.3
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=blackfin
All warnings (new ones prefixed by >>):
>> drivers/clocksource/timer-oxnas-rps.c:50:0: warning: "TIMER_ENABLE" redefined [enabled by default]
arch/blackfin/mach-bf533/include/mach/defBF532.h:97:0: note: this is the location of the previous definition
vim +/TIMER_ENABLE +50 drivers/clocksource/timer-oxnas-rps.c
34 /* TIMER1 used as tick
35 * TIMER2 used as clocksource
36 */
37
38 /* Registers definitions */
39
40 #define TIMER_LOAD_REG 0x0
41 #define TIMER_CURR_REG 0x4
42 #define TIMER_CTRL_REG 0x8
43 #define TIMER_CLRINT_REG 0xC
44
45 #define TIMER_BITS 24
46
47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
48
49 #define TIMER_PERIODIC BIT(6)
> 50 #define TIMER_ENABLE BIT(7)
51
52 #define TIMER_DIV1 (0)
53 #define TIMER_DIV16 (1 << 2)
54 #define TIMER_DIV256 (2 << 2)
55
56 #define TIMER1_REG_OFFSET 0
57 #define TIMER2_REG_OFFSET 0x20
58
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/octet-stream, Size: 40631 bytes --]
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
@ 2016-06-15 15:35 ` kbuild test robot
0 siblings, 0 replies; 31+ messages in thread
From: kbuild test robot @ 2016-06-15 15:35 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
[auto build test WARNING on tip/timers/core]
[also build test WARNING on v4.7-rc3 next-20160615]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
config: blackfin-allmodconfig (attached as .config)
compiler: bfin-uclinux-gcc (GCC) 4.6.3
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=blackfin
All warnings (new ones prefixed by >>):
>> drivers/clocksource/timer-oxnas-rps.c:50:0: warning: "TIMER_ENABLE" redefined [enabled by default]
arch/blackfin/mach-bf533/include/mach/defBF532.h:97:0: note: this is the location of the previous definition
vim +/TIMER_ENABLE +50 drivers/clocksource/timer-oxnas-rps.c
34 /* TIMER1 used as tick
35 * TIMER2 used as clocksource
36 */
37
38 /* Registers definitions */
39
40 #define TIMER_LOAD_REG 0x0
41 #define TIMER_CURR_REG 0x4
42 #define TIMER_CTRL_REG 0x8
43 #define TIMER_CLRINT_REG 0xC
44
45 #define TIMER_BITS 24
46
47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
48
49 #define TIMER_PERIODIC BIT(6)
> 50 #define TIMER_ENABLE BIT(7)
51
52 #define TIMER_DIV1 (0)
53 #define TIMER_DIV16 (1 << 2)
54 #define TIMER_DIV256 (2 << 2)
55
56 #define TIMER1_REG_OFFSET 0
57 #define TIMER2_REG_OFFSET 0x20
58
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
-------------- next part --------------
A non-text attachment was scrubbed...
Name: .config.gz
Type: application/octet-stream
Size: 40631 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160615/ae9ac5bb/attachment-0001.obj>
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
2016-06-15 10:13 ` Neil Armstrong
@ 2016-06-15 15:51 ` kbuild test robot
-1 siblings, 0 replies; 31+ messages in thread
From: kbuild test robot @ 2016-06-15 15:51 UTC (permalink / raw)
To: Neil Armstrong
Cc: kbuild-all, linux-kernel, linux-arm-kernel, daniel.lezcano, tglx,
Neil Armstrong, Ma Haijun
[-- Attachment #1: Type: text/plain, Size: 12710 bytes --]
Hi,
[auto build test ERROR on tip/timers/core]
[also build test ERROR on v4.7-rc3 next-20160615]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
config: ia64-allyesconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 4.9.0
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=ia64
All error/warnings (new ones prefixed by >>):
>> drivers/clocksource/timer-oxnas-rps.c:62:28: error: field 'clkevent' has incomplete type
struct clock_event_device clkevent;
^
In file included from include/linux/list.h:8:0,
from include/linux/smp.h:11,
from include/linux/irq.h:12,
from drivers/clocksource/timer-oxnas-rps.c:24:
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_timer_shutdown':
include/linux/kernel.h:831:48: warning: initialization from incompatible pointer type
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
>> drivers/clocksource/timer-oxnas-rps.c:101:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
include/linux/kernel.h:831:48: warning: (near initialization for 'rps')
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
>> drivers/clocksource/timer-oxnas-rps.c:101:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_timer_set_periodic':
include/linux/kernel.h:831:48: warning: initialization from incompatible pointer type
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:111:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
include/linux/kernel.h:831:48: warning: (near initialization for 'rps')
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:111:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_timer_set_oneshot':
include/linux/kernel.h:831:48: warning: initialization from incompatible pointer type
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:121:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
include/linux/kernel.h:831:48: warning: (near initialization for 'rps')
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:121:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_timer_next_event':
include/linux/kernel.h:831:48: warning: initialization from incompatible pointer type
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:132:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
include/linux/kernel.h:831:48: warning: (near initialization for 'rps')
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:132:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_clockevent_init':
>> drivers/clocksource/timer-oxnas-rps.c:161:27: error: 'CLOCK_EVT_FEAT_PERIODIC' undeclared (first use in this function)
rps->clkevent.features = CLOCK_EVT_FEAT_PERIODIC |
^
drivers/clocksource/timer-oxnas-rps.c:161:27: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/clocksource/timer-oxnas-rps.c:162:6: error: 'CLOCK_EVT_FEAT_ONESHOT' undeclared (first use in this function)
CLOCK_EVT_FEAT_ONESHOT |
^
>> drivers/clocksource/timer-oxnas-rps.c:163:6: error: 'CLOCK_EVT_FEAT_DYNIRQ' undeclared (first use in this function)
CLOCK_EVT_FEAT_DYNIRQ;
^
>> drivers/clocksource/timer-oxnas-rps.c:172:2: error: implicit declaration of function 'clockevents_config_and_register' [-Werror=implicit-function-declaration]
clockevents_config_and_register(&rps->clkevent,
^
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_clocksource_init':
>> drivers/clocksource/timer-oxnas-rps.c:209:2: error: implicit declaration of function 'clocksource_mmio_init' [-Werror=implicit-function-declaration]
ret = clocksource_mmio_init(timer_sched_base,
^
>> drivers/clocksource/timer-oxnas-rps.c:212:9: error: 'clocksource_mmio_readl_down' undeclared (first use in this function)
clocksource_mmio_readl_down);
^
drivers/clocksource/timer-oxnas-rps.c: At top level:
>> drivers/clocksource/timer-oxnas-rps.c:290:10: error: expected ')' before string constant
"oxsemi,ox810se-rps-timer", oxnas_rps_timer_init);
^
drivers/clocksource/timer-oxnas-rps.c:223:20: warning: 'oxnas_rps_timer_init' defined but not used [-Wunused-function]
static void __init oxnas_rps_timer_init(struct device_node *np)
^
cc1: some warnings being treated as errors
vim +/clkevent +62 drivers/clocksource/timer-oxnas-rps.c
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
23 #include <linux/init.h>
> 24 #include <linux/irq.h>
25 #include <linux/io.h>
26 #include <linux/clk.h>
27 #include <linux/slab.h>
28 #include <linux/interrupt.h>
29 #include <linux/of_irq.h>
30 #include <linux/of_address.h>
31 #include <linux/clockchips.h>
32 #include <linux/sched_clock.h>
33
34 /* TIMER1 used as tick
35 * TIMER2 used as clocksource
36 */
37
38 /* Registers definitions */
39
40 #define TIMER_LOAD_REG 0x0
41 #define TIMER_CURR_REG 0x4
42 #define TIMER_CTRL_REG 0x8
43 #define TIMER_CLRINT_REG 0xC
44
45 #define TIMER_BITS 24
46
47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
48
49 #define TIMER_PERIODIC BIT(6)
50 #define TIMER_ENABLE BIT(7)
51
52 #define TIMER_DIV1 (0)
53 #define TIMER_DIV16 (1 << 2)
54 #define TIMER_DIV256 (2 << 2)
55
56 #define TIMER1_REG_OFFSET 0
57 #define TIMER2_REG_OFFSET 0x20
58
59 /* Clockevent & Clocksource data */
60
61 struct oxnas_rps_timer {
> 62 struct clock_event_device clkevent;
63 void __iomem *clksrc_base;
64 void __iomem *clkevt_base;
65 unsigned long timer_period;
66 unsigned int timer_prescaler;
67 struct clk *clk;
68 int irq;
69 };
70
71 static irqreturn_t oxnas_rps_timer_irq(int irq, void *dev_id)
72 {
73 struct oxnas_rps_timer *rps = dev_id;
74
75 writel_relaxed(0, rps->clkevt_base + TIMER_CLRINT_REG);
76
77 rps->clkevent.event_handler(&rps->clkevent);
78
79 return IRQ_HANDLED;
80 }
81
82 static void oxnas_rps_timer_config(struct oxnas_rps_timer *rps,
83 unsigned long period,
84 unsigned int periodic)
85 {
86 uint32_t cfg = rps->timer_prescaler;
87
88 if (period)
89 cfg |= TIMER_ENABLE;
90
91 if (periodic)
92 cfg |= TIMER_PERIODIC;
93
94 writel_relaxed(period, rps->clkevt_base + TIMER_LOAD_REG);
95 writel_relaxed(cfg, rps->clkevt_base + TIMER_CTRL_REG);
96 }
97
98 static int oxnas_rps_timer_shutdown(struct clock_event_device *evt)
99 {
100 struct oxnas_rps_timer *rps =
> 101 container_of(evt, struct oxnas_rps_timer, clkevent);
102
103 oxnas_rps_timer_config(rps, 0, 0);
104
105 return 0;
106 }
107
108 static int oxnas_rps_timer_set_periodic(struct clock_event_device *evt)
109 {
110 struct oxnas_rps_timer *rps =
111 container_of(evt, struct oxnas_rps_timer, clkevent);
112
113 oxnas_rps_timer_config(rps, rps->timer_period, 1);
114
115 return 0;
116 }
117
118 static int oxnas_rps_timer_set_oneshot(struct clock_event_device *evt)
119 {
120 struct oxnas_rps_timer *rps =
121 container_of(evt, struct oxnas_rps_timer, clkevent);
122
123 oxnas_rps_timer_config(rps, rps->timer_period, 0);
124
125 return 0;
126 }
127
128 static int oxnas_rps_timer_next_event(unsigned long delta,
129 struct clock_event_device *evt)
130 {
131 struct oxnas_rps_timer *rps =
> 132 container_of(evt, struct oxnas_rps_timer, clkevent);
133
134 oxnas_rps_timer_config(rps, delta, 0);
135
136 return 0;
137 }
138
139 static int __init oxnas_rps_clockevent_init(struct oxnas_rps_timer *rps)
140 {
141 ulong clk_rate = clk_get_rate(rps->clk);
142 ulong timer_rate;
143
144 /* Start with prescaler 1 */
145 rps->timer_prescaler = TIMER_DIV1;
146 rps->timer_period = DIV_ROUND_UP(clk_rate, HZ);
147 timer_rate = clk_rate;
148
149 if (rps->timer_period > TIMER_MAX_VAL) {
150 rps->timer_prescaler = TIMER_DIV16;
151 timer_rate = clk_rate / 16;
152 rps->timer_period = DIV_ROUND_UP(timer_rate, HZ);
153 }
154 if (rps->timer_period > TIMER_MAX_VAL) {
155 rps->timer_prescaler = TIMER_DIV256;
156 timer_rate = clk_rate / 256;
157 rps->timer_period = DIV_ROUND_UP(timer_rate, HZ);
158 }
159
160 rps->clkevent.name = "oxnas-rps";
> 161 rps->clkevent.features = CLOCK_EVT_FEAT_PERIODIC |
> 162 CLOCK_EVT_FEAT_ONESHOT |
> 163 CLOCK_EVT_FEAT_DYNIRQ;
164 rps->clkevent.tick_resume = oxnas_rps_timer_shutdown;
165 rps->clkevent.set_state_shutdown = oxnas_rps_timer_shutdown;
166 rps->clkevent.set_state_periodic = oxnas_rps_timer_set_periodic;
167 rps->clkevent.set_state_oneshot = oxnas_rps_timer_set_oneshot;
168 rps->clkevent.set_next_event = oxnas_rps_timer_next_event;
169 rps->clkevent.rating = 200;
170 rps->clkevent.cpumask = cpu_possible_mask;
171 rps->clkevent.irq = rps->irq;
> 172 clockevents_config_and_register(&rps->clkevent,
173 timer_rate,
174 1,
175 TIMER_MAX_VAL);
176
177 pr_info("Registered clock event rate %luHz prescaler %x period %lu\n",
178 clk_rate,
179 rps->timer_prescaler,
180 rps->timer_period);
181
182 return 0;
183 }
184
185 /* Clocksource */
186
187 static void __iomem *timer_sched_base;
188
189 static u64 notrace oxnas_rps_read_sched_clock(void)
190 {
191 return ~readl_relaxed(timer_sched_base);
192 }
193
194 static int __init oxnas_rps_clocksource_init(struct oxnas_rps_timer *rps)
195 {
196 ulong clk_rate = clk_get_rate(rps->clk);
197 int ret;
198
199 /* use prescale 16 */
200 clk_rate = clk_rate / 16;
201
202 writel_relaxed(TIMER_MAX_VAL, rps->clksrc_base + TIMER_LOAD_REG);
203 writel_relaxed(TIMER_PERIODIC | TIMER_ENABLE | TIMER_DIV16,
204 rps->clksrc_base + TIMER_CTRL_REG);
205
206 timer_sched_base = rps->clksrc_base + TIMER_CURR_REG;
207 sched_clock_register(oxnas_rps_read_sched_clock,
208 TIMER_BITS, clk_rate);
> 209 ret = clocksource_mmio_init(timer_sched_base,
210 "oxnas_rps_clocksource_timer",
211 clk_rate, 250, TIMER_BITS,
> 212 clocksource_mmio_readl_down);
213 if (WARN_ON(ret)) {
214 pr_err("can't register clocksource\n");
215 return ret;
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/octet-stream, Size: 46357 bytes --]
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
@ 2016-06-15 15:51 ` kbuild test robot
0 siblings, 0 replies; 31+ messages in thread
From: kbuild test robot @ 2016-06-15 15:51 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
[auto build test ERROR on tip/timers/core]
[also build test ERROR on v4.7-rc3 next-20160615]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
config: ia64-allyesconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 4.9.0
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=ia64
All error/warnings (new ones prefixed by >>):
>> drivers/clocksource/timer-oxnas-rps.c:62:28: error: field 'clkevent' has incomplete type
struct clock_event_device clkevent;
^
In file included from include/linux/list.h:8:0,
from include/linux/smp.h:11,
from include/linux/irq.h:12,
from drivers/clocksource/timer-oxnas-rps.c:24:
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_timer_shutdown':
include/linux/kernel.h:831:48: warning: initialization from incompatible pointer type
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
>> drivers/clocksource/timer-oxnas-rps.c:101:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
include/linux/kernel.h:831:48: warning: (near initialization for 'rps')
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
>> drivers/clocksource/timer-oxnas-rps.c:101:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_timer_set_periodic':
include/linux/kernel.h:831:48: warning: initialization from incompatible pointer type
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:111:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
include/linux/kernel.h:831:48: warning: (near initialization for 'rps')
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:111:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_timer_set_oneshot':
include/linux/kernel.h:831:48: warning: initialization from incompatible pointer type
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:121:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
include/linux/kernel.h:831:48: warning: (near initialization for 'rps')
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:121:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_timer_next_event':
include/linux/kernel.h:831:48: warning: initialization from incompatible pointer type
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:132:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
include/linux/kernel.h:831:48: warning: (near initialization for 'rps')
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
^
drivers/clocksource/timer-oxnas-rps.c:132:3: note: in expansion of macro 'container_of'
container_of(evt, struct oxnas_rps_timer, clkevent);
^
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_clockevent_init':
>> drivers/clocksource/timer-oxnas-rps.c:161:27: error: 'CLOCK_EVT_FEAT_PERIODIC' undeclared (first use in this function)
rps->clkevent.features = CLOCK_EVT_FEAT_PERIODIC |
^
drivers/clocksource/timer-oxnas-rps.c:161:27: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/clocksource/timer-oxnas-rps.c:162:6: error: 'CLOCK_EVT_FEAT_ONESHOT' undeclared (first use in this function)
CLOCK_EVT_FEAT_ONESHOT |
^
>> drivers/clocksource/timer-oxnas-rps.c:163:6: error: 'CLOCK_EVT_FEAT_DYNIRQ' undeclared (first use in this function)
CLOCK_EVT_FEAT_DYNIRQ;
^
>> drivers/clocksource/timer-oxnas-rps.c:172:2: error: implicit declaration of function 'clockevents_config_and_register' [-Werror=implicit-function-declaration]
clockevents_config_and_register(&rps->clkevent,
^
drivers/clocksource/timer-oxnas-rps.c: In function 'oxnas_rps_clocksource_init':
>> drivers/clocksource/timer-oxnas-rps.c:209:2: error: implicit declaration of function 'clocksource_mmio_init' [-Werror=implicit-function-declaration]
ret = clocksource_mmio_init(timer_sched_base,
^
>> drivers/clocksource/timer-oxnas-rps.c:212:9: error: 'clocksource_mmio_readl_down' undeclared (first use in this function)
clocksource_mmio_readl_down);
^
drivers/clocksource/timer-oxnas-rps.c: At top level:
>> drivers/clocksource/timer-oxnas-rps.c:290:10: error: expected ')' before string constant
"oxsemi,ox810se-rps-timer", oxnas_rps_timer_init);
^
drivers/clocksource/timer-oxnas-rps.c:223:20: warning: 'oxnas_rps_timer_init' defined but not used [-Wunused-function]
static void __init oxnas_rps_timer_init(struct device_node *np)
^
cc1: some warnings being treated as errors
vim +/clkevent +62 drivers/clocksource/timer-oxnas-rps.c
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
23 #include <linux/init.h>
> 24 #include <linux/irq.h>
25 #include <linux/io.h>
26 #include <linux/clk.h>
27 #include <linux/slab.h>
28 #include <linux/interrupt.h>
29 #include <linux/of_irq.h>
30 #include <linux/of_address.h>
31 #include <linux/clockchips.h>
32 #include <linux/sched_clock.h>
33
34 /* TIMER1 used as tick
35 * TIMER2 used as clocksource
36 */
37
38 /* Registers definitions */
39
40 #define TIMER_LOAD_REG 0x0
41 #define TIMER_CURR_REG 0x4
42 #define TIMER_CTRL_REG 0x8
43 #define TIMER_CLRINT_REG 0xC
44
45 #define TIMER_BITS 24
46
47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
48
49 #define TIMER_PERIODIC BIT(6)
50 #define TIMER_ENABLE BIT(7)
51
52 #define TIMER_DIV1 (0)
53 #define TIMER_DIV16 (1 << 2)
54 #define TIMER_DIV256 (2 << 2)
55
56 #define TIMER1_REG_OFFSET 0
57 #define TIMER2_REG_OFFSET 0x20
58
59 /* Clockevent & Clocksource data */
60
61 struct oxnas_rps_timer {
> 62 struct clock_event_device clkevent;
63 void __iomem *clksrc_base;
64 void __iomem *clkevt_base;
65 unsigned long timer_period;
66 unsigned int timer_prescaler;
67 struct clk *clk;
68 int irq;
69 };
70
71 static irqreturn_t oxnas_rps_timer_irq(int irq, void *dev_id)
72 {
73 struct oxnas_rps_timer *rps = dev_id;
74
75 writel_relaxed(0, rps->clkevt_base + TIMER_CLRINT_REG);
76
77 rps->clkevent.event_handler(&rps->clkevent);
78
79 return IRQ_HANDLED;
80 }
81
82 static void oxnas_rps_timer_config(struct oxnas_rps_timer *rps,
83 unsigned long period,
84 unsigned int periodic)
85 {
86 uint32_t cfg = rps->timer_prescaler;
87
88 if (period)
89 cfg |= TIMER_ENABLE;
90
91 if (periodic)
92 cfg |= TIMER_PERIODIC;
93
94 writel_relaxed(period, rps->clkevt_base + TIMER_LOAD_REG);
95 writel_relaxed(cfg, rps->clkevt_base + TIMER_CTRL_REG);
96 }
97
98 static int oxnas_rps_timer_shutdown(struct clock_event_device *evt)
99 {
100 struct oxnas_rps_timer *rps =
> 101 container_of(evt, struct oxnas_rps_timer, clkevent);
102
103 oxnas_rps_timer_config(rps, 0, 0);
104
105 return 0;
106 }
107
108 static int oxnas_rps_timer_set_periodic(struct clock_event_device *evt)
109 {
110 struct oxnas_rps_timer *rps =
111 container_of(evt, struct oxnas_rps_timer, clkevent);
112
113 oxnas_rps_timer_config(rps, rps->timer_period, 1);
114
115 return 0;
116 }
117
118 static int oxnas_rps_timer_set_oneshot(struct clock_event_device *evt)
119 {
120 struct oxnas_rps_timer *rps =
121 container_of(evt, struct oxnas_rps_timer, clkevent);
122
123 oxnas_rps_timer_config(rps, rps->timer_period, 0);
124
125 return 0;
126 }
127
128 static int oxnas_rps_timer_next_event(unsigned long delta,
129 struct clock_event_device *evt)
130 {
131 struct oxnas_rps_timer *rps =
> 132 container_of(evt, struct oxnas_rps_timer, clkevent);
133
134 oxnas_rps_timer_config(rps, delta, 0);
135
136 return 0;
137 }
138
139 static int __init oxnas_rps_clockevent_init(struct oxnas_rps_timer *rps)
140 {
141 ulong clk_rate = clk_get_rate(rps->clk);
142 ulong timer_rate;
143
144 /* Start with prescaler 1 */
145 rps->timer_prescaler = TIMER_DIV1;
146 rps->timer_period = DIV_ROUND_UP(clk_rate, HZ);
147 timer_rate = clk_rate;
148
149 if (rps->timer_period > TIMER_MAX_VAL) {
150 rps->timer_prescaler = TIMER_DIV16;
151 timer_rate = clk_rate / 16;
152 rps->timer_period = DIV_ROUND_UP(timer_rate, HZ);
153 }
154 if (rps->timer_period > TIMER_MAX_VAL) {
155 rps->timer_prescaler = TIMER_DIV256;
156 timer_rate = clk_rate / 256;
157 rps->timer_period = DIV_ROUND_UP(timer_rate, HZ);
158 }
159
160 rps->clkevent.name = "oxnas-rps";
> 161 rps->clkevent.features = CLOCK_EVT_FEAT_PERIODIC |
> 162 CLOCK_EVT_FEAT_ONESHOT |
> 163 CLOCK_EVT_FEAT_DYNIRQ;
164 rps->clkevent.tick_resume = oxnas_rps_timer_shutdown;
165 rps->clkevent.set_state_shutdown = oxnas_rps_timer_shutdown;
166 rps->clkevent.set_state_periodic = oxnas_rps_timer_set_periodic;
167 rps->clkevent.set_state_oneshot = oxnas_rps_timer_set_oneshot;
168 rps->clkevent.set_next_event = oxnas_rps_timer_next_event;
169 rps->clkevent.rating = 200;
170 rps->clkevent.cpumask = cpu_possible_mask;
171 rps->clkevent.irq = rps->irq;
> 172 clockevents_config_and_register(&rps->clkevent,
173 timer_rate,
174 1,
175 TIMER_MAX_VAL);
176
177 pr_info("Registered clock event rate %luHz prescaler %x period %lu\n",
178 clk_rate,
179 rps->timer_prescaler,
180 rps->timer_period);
181
182 return 0;
183 }
184
185 /* Clocksource */
186
187 static void __iomem *timer_sched_base;
188
189 static u64 notrace oxnas_rps_read_sched_clock(void)
190 {
191 return ~readl_relaxed(timer_sched_base);
192 }
193
194 static int __init oxnas_rps_clocksource_init(struct oxnas_rps_timer *rps)
195 {
196 ulong clk_rate = clk_get_rate(rps->clk);
197 int ret;
198
199 /* use prescale 16 */
200 clk_rate = clk_rate / 16;
201
202 writel_relaxed(TIMER_MAX_VAL, rps->clksrc_base + TIMER_LOAD_REG);
203 writel_relaxed(TIMER_PERIODIC | TIMER_ENABLE | TIMER_DIV16,
204 rps->clksrc_base + TIMER_CTRL_REG);
205
206 timer_sched_base = rps->clksrc_base + TIMER_CURR_REG;
207 sched_clock_register(oxnas_rps_read_sched_clock,
208 TIMER_BITS, clk_rate);
> 209 ret = clocksource_mmio_init(timer_sched_base,
210 "oxnas_rps_clocksource_timer",
211 clk_rate, 250, TIMER_BITS,
> 212 clocksource_mmio_readl_down);
213 if (WARN_ON(ret)) {
214 pr_err("can't register clocksource\n");
215 return ret;
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
2016-06-15 15:51 ` kbuild test robot
@ 2016-06-16 13:29 ` Daniel Lezcano
-1 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-16 13:29 UTC (permalink / raw)
To: kbuild test robot, Neil Armstrong
Cc: kbuild-all, linux-kernel, linux-arm-kernel, tglx, Ma Haijun
On 06/15/2016 05:51 PM, kbuild test robot wrote:
> Hi,
>
> [auto build test ERROR on tip/timers/core]
> [also build test ERROR on v4.7-rc3 next-20160615]
> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
You should add in the Kconfig:
+depends on GENERIC_CLOCKSOURCE
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
@ 2016-06-16 13:29 ` Daniel Lezcano
0 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-16 13:29 UTC (permalink / raw)
To: linux-arm-kernel
On 06/15/2016 05:51 PM, kbuild test robot wrote:
> Hi,
>
> [auto build test ERROR on tip/timers/core]
> [also build test ERROR on v4.7-rc3 next-20160615]
> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
You should add in the Kconfig:
+depends on GENERIC_CLOCKSOURCE
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
2016-06-15 15:35 ` kbuild test robot
@ 2016-06-16 13:33 ` Daniel Lezcano
-1 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-16 13:33 UTC (permalink / raw)
To: kbuild test robot, Neil Armstrong
Cc: linux-kernel, linux-arm-kernel, tglx, Ma Haijun
On 06/15/2016 05:35 PM, kbuild test robot wrote:
> Hi,
>
> [auto build test WARNING on tip/timers/core]
> [also build test WARNING on v4.7-rc3 next-20160615]
> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
>
> url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
> config: blackfin-allmodconfig (attached as .config)
> compiler: bfin-uclinux-gcc (GCC) 4.6.3
> reproduce:
> wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # save the attached .config to linux build tree
> make.cross ARCH=blackfin
>
> All warnings (new ones prefixed by >>):
>
>>> drivers/clocksource/timer-oxnas-rps.c:50:0: warning: "TIMER_ENABLE" redefined [enabled by default]
> arch/blackfin/mach-bf533/include/mach/defBF532.h:97:0: note: this is the location of the previous definition
>
> vim +/TIMER_ENABLE +50 drivers/clocksource/timer-oxnas-rps.c
>
> 34 /* TIMER1 used as tick
> 35 * TIMER2 used as clocksource
> 36 */
> 37
> 38 /* Registers definitions */
> 39
> 40 #define TIMER_LOAD_REG 0x0
> 41 #define TIMER_CURR_REG 0x4
> 42 #define TIMER_CTRL_REG 0x8
> 43 #define TIMER_CLRINT_REG 0xC
> 44
> 45 #define TIMER_BITS 24
> 46
> 47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
> 48
> 49 #define TIMER_PERIODIC BIT(6)
> > 50 #define TIMER_ENABLE BIT(7)
It is already defined in the arch/blackfin/include dir.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
@ 2016-06-16 13:33 ` Daniel Lezcano
0 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-16 13:33 UTC (permalink / raw)
To: linux-arm-kernel
On 06/15/2016 05:35 PM, kbuild test robot wrote:
> Hi,
>
> [auto build test WARNING on tip/timers/core]
> [also build test WARNING on v4.7-rc3 next-20160615]
> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
>
> url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
> config: blackfin-allmodconfig (attached as .config)
> compiler: bfin-uclinux-gcc (GCC) 4.6.3
> reproduce:
> wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # save the attached .config to linux build tree
> make.cross ARCH=blackfin
>
> All warnings (new ones prefixed by >>):
>
>>> drivers/clocksource/timer-oxnas-rps.c:50:0: warning: "TIMER_ENABLE" redefined [enabled by default]
> arch/blackfin/mach-bf533/include/mach/defBF532.h:97:0: note: this is the location of the previous definition
>
> vim +/TIMER_ENABLE +50 drivers/clocksource/timer-oxnas-rps.c
>
> 34 /* TIMER1 used as tick
> 35 * TIMER2 used as clocksource
> 36 */
> 37
> 38 /* Registers definitions */
> 39
> 40 #define TIMER_LOAD_REG 0x0
> 41 #define TIMER_CURR_REG 0x4
> 42 #define TIMER_CTRL_REG 0x8
> 43 #define TIMER_CLRINT_REG 0xC
> 44
> 45 #define TIMER_BITS 24
> 46
> 47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
> 48
> 49 #define TIMER_PERIODIC BIT(6)
> > 50 #define TIMER_ENABLE BIT(7)
It is already defined in the arch/blackfin/include dir.
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
2016-06-16 13:33 ` Daniel Lezcano
@ 2016-06-16 13:47 ` Neil Armstrong
-1 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-16 13:47 UTC (permalink / raw)
To: Daniel Lezcano, kbuild test robot
Cc: linux-kernel, linux-arm-kernel, tglx, Ma Haijun
On 06/16/2016 03:33 PM, Daniel Lezcano wrote:
> On 06/15/2016 05:35 PM, kbuild test robot wrote:
>> Hi,
>>
>> [auto build test WARNING on tip/timers/core]
>> [also build test WARNING on v4.7-rc3 next-20160615]
>> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
>>
>> url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
>> config: blackfin-allmodconfig (attached as .config)
>> compiler: bfin-uclinux-gcc (GCC) 4.6.3
>> reproduce:
>> wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
>> chmod +x ~/bin/make.cross
>> # save the attached .config to linux build tree
>> make.cross ARCH=blackfin
>>
>> All warnings (new ones prefixed by >>):
>>
>>>> drivers/clocksource/timer-oxnas-rps.c:50:0: warning: "TIMER_ENABLE" redefined [enabled by default]
>> arch/blackfin/mach-bf533/include/mach/defBF532.h:97:0: note: this is the location of the previous definition
>>
>> vim +/TIMER_ENABLE +50 drivers/clocksource/timer-oxnas-rps.c
>>
>> 34 /* TIMER1 used as tick
>> 35 * TIMER2 used as clocksource
>> 36 */
>> 37
>> 38 /* Registers definitions */
>> 39
>> 40 #define TIMER_LOAD_REG 0x0
>> 41 #define TIMER_CURR_REG 0x4
>> 42 #define TIMER_CTRL_REG 0x8
>> 43 #define TIMER_CLRINT_REG 0xC
>> 44
>> 45 #define TIMER_BITS 24
>> 46
>> 47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
>> 48
>> 49 #define TIMER_PERIODIC BIT(6)
>> > 50 #define TIMER_ENABLE BIT(7)
>
> It is already defined in the arch/blackfin/include dir.
>
Hi Daniel,
This should never happen due to the blackfin headers.
Actually the COMPILE_TEST option made these two happen.
Should I push a v4 to keep COMPILE_TEST ?
Neil
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
@ 2016-06-16 13:47 ` Neil Armstrong
0 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-16 13:47 UTC (permalink / raw)
To: linux-arm-kernel
On 06/16/2016 03:33 PM, Daniel Lezcano wrote:
> On 06/15/2016 05:35 PM, kbuild test robot wrote:
>> Hi,
>>
>> [auto build test WARNING on tip/timers/core]
>> [also build test WARNING on v4.7-rc3 next-20160615]
>> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
>>
>> url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
>> config: blackfin-allmodconfig (attached as .config)
>> compiler: bfin-uclinux-gcc (GCC) 4.6.3
>> reproduce:
>> wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
>> chmod +x ~/bin/make.cross
>> # save the attached .config to linux build tree
>> make.cross ARCH=blackfin
>>
>> All warnings (new ones prefixed by >>):
>>
>>>> drivers/clocksource/timer-oxnas-rps.c:50:0: warning: "TIMER_ENABLE" redefined [enabled by default]
>> arch/blackfin/mach-bf533/include/mach/defBF532.h:97:0: note: this is the location of the previous definition
>>
>> vim +/TIMER_ENABLE +50 drivers/clocksource/timer-oxnas-rps.c
>>
>> 34 /* TIMER1 used as tick
>> 35 * TIMER2 used as clocksource
>> 36 */
>> 37
>> 38 /* Registers definitions */
>> 39
>> 40 #define TIMER_LOAD_REG 0x0
>> 41 #define TIMER_CURR_REG 0x4
>> 42 #define TIMER_CTRL_REG 0x8
>> 43 #define TIMER_CLRINT_REG 0xC
>> 44
>> 45 #define TIMER_BITS 24
>> 46
>> 47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
>> 48
>> 49 #define TIMER_PERIODIC BIT(6)
>> > 50 #define TIMER_ENABLE BIT(7)
>
> It is already defined in the arch/blackfin/include dir.
>
Hi Daniel,
This should never happen due to the blackfin headers.
Actually the COMPILE_TEST option made these two happen.
Should I push a v4 to keep COMPILE_TEST ?
Neil
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
2016-06-16 13:47 ` Neil Armstrong
@ 2016-06-16 14:14 ` Daniel Lezcano
-1 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-16 14:14 UTC (permalink / raw)
To: Neil Armstrong, kbuild test robot
Cc: linux-kernel, linux-arm-kernel, tglx, Ma Haijun
On 06/16/2016 03:47 PM, Neil Armstrong wrote:
> On 06/16/2016 03:33 PM, Daniel Lezcano wrote:
>> On 06/15/2016 05:35 PM, kbuild test robot wrote:
>>> Hi,
>>>
>>> [auto build test WARNING on tip/timers/core]
>>> [also build test WARNING on v4.7-rc3 next-20160615]
>>> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
>>>
>>> url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
>>> config: blackfin-allmodconfig (attached as .config)
>>> compiler: bfin-uclinux-gcc (GCC) 4.6.3
>>> reproduce:
>>> wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
>>> chmod +x ~/bin/make.cross
>>> # save the attached .config to linux build tree
>>> make.cross ARCH=blackfin
>>>
>>> All warnings (new ones prefixed by >>):
>>>
>>>>> drivers/clocksource/timer-oxnas-rps.c:50:0: warning: "TIMER_ENABLE" redefined [enabled by default]
>>> arch/blackfin/mach-bf533/include/mach/defBF532.h:97:0: note: this is the location of the previous definition
>>>
>>> vim +/TIMER_ENABLE +50 drivers/clocksource/timer-oxnas-rps.c
>>>
>>> 34 /* TIMER1 used as tick
>>> 35 * TIMER2 used as clocksource
>>> 36 */
>>> 37
>>> 38 /* Registers definitions */
>>> 39
>>> 40 #define TIMER_LOAD_REG 0x0
>>> 41 #define TIMER_CURR_REG 0x4
>>> 42 #define TIMER_CTRL_REG 0x8
>>> 43 #define TIMER_CLRINT_REG 0xC
>>> 44
>>> 45 #define TIMER_BITS 24
>>> 46
>>> 47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
>>> 48
>>> 49 #define TIMER_PERIODIC BIT(6)
>>> > 50 #define TIMER_ENABLE BIT(7)
>>
>> It is already defined in the arch/blackfin/include dir.
>>
>
> Hi Daniel,
>
> This should never happen due to the blackfin headers.
> Actually the COMPILE_TEST option made these two happen.
>
> Should I push a v4 to keep COMPILE_TEST ?
The easier way would be:
depends on !BLACKFIN
I will take care of cleaning up this macro name collision when moving
the timer driver in drivers/clocksource (that's really in the future ...).
The idea is to have all the drivers with the COMPILE_TEST option set, so
we can spot more issues at compile time earlier. This change reveals, of
course, some errors we were not facing before and at least it has the
benefit to enlighten some arch-shadowed drivers.
-- Daniel
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
@ 2016-06-16 14:14 ` Daniel Lezcano
0 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-16 14:14 UTC (permalink / raw)
To: linux-arm-kernel
On 06/16/2016 03:47 PM, Neil Armstrong wrote:
> On 06/16/2016 03:33 PM, Daniel Lezcano wrote:
>> On 06/15/2016 05:35 PM, kbuild test robot wrote:
>>> Hi,
>>>
>>> [auto build test WARNING on tip/timers/core]
>>> [also build test WARNING on v4.7-rc3 next-20160615]
>>> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
>>>
>>> url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
>>> config: blackfin-allmodconfig (attached as .config)
>>> compiler: bfin-uclinux-gcc (GCC) 4.6.3
>>> reproduce:
>>> wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
>>> chmod +x ~/bin/make.cross
>>> # save the attached .config to linux build tree
>>> make.cross ARCH=blackfin
>>>
>>> All warnings (new ones prefixed by >>):
>>>
>>>>> drivers/clocksource/timer-oxnas-rps.c:50:0: warning: "TIMER_ENABLE" redefined [enabled by default]
>>> arch/blackfin/mach-bf533/include/mach/defBF532.h:97:0: note: this is the location of the previous definition
>>>
>>> vim +/TIMER_ENABLE +50 drivers/clocksource/timer-oxnas-rps.c
>>>
>>> 34 /* TIMER1 used as tick
>>> 35 * TIMER2 used as clocksource
>>> 36 */
>>> 37
>>> 38 /* Registers definitions */
>>> 39
>>> 40 #define TIMER_LOAD_REG 0x0
>>> 41 #define TIMER_CURR_REG 0x4
>>> 42 #define TIMER_CTRL_REG 0x8
>>> 43 #define TIMER_CLRINT_REG 0xC
>>> 44
>>> 45 #define TIMER_BITS 24
>>> 46
>>> 47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
>>> 48
>>> 49 #define TIMER_PERIODIC BIT(6)
>>> > 50 #define TIMER_ENABLE BIT(7)
>>
>> It is already defined in the arch/blackfin/include dir.
>>
>
> Hi Daniel,
>
> This should never happen due to the blackfin headers.
> Actually the COMPILE_TEST option made these two happen.
>
> Should I push a v4 to keep COMPILE_TEST ?
The easier way would be:
depends on !BLACKFIN
I will take care of cleaning up this macro name collision when moving
the timer driver in drivers/clocksource (that's really in the future ...).
The idea is to have all the drivers with the COMPILE_TEST option set, so
we can spot more issues at compile time earlier. This change reveals, of
course, some errors we were not facing before and at least it has the
benefit to enlighten some arch-shadowed drivers.
-- Daniel
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
2016-06-16 13:47 ` Neil Armstrong
@ 2016-06-16 14:15 ` Daniel Lezcano
-1 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-16 14:15 UTC (permalink / raw)
To: Neil Armstrong, kbuild test robot
Cc: linux-kernel, linux-arm-kernel, tglx, Ma Haijun
On 06/16/2016 03:47 PM, Neil Armstrong wrote:
> On 06/16/2016 03:33 PM, Daniel Lezcano wrote:
>> On 06/15/2016 05:35 PM, kbuild test robot wrote:
>>> Hi,
>>>
>>> [auto build test WARNING on tip/timers/core]
>>> [also build test WARNING on v4.7-rc3 next-20160615]
>>> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
>>>
>>> url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
>>> config: blackfin-allmodconfig (attached as .config)
>>> compiler: bfin-uclinux-gcc (GCC) 4.6.3
>>> reproduce:
>>> wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
>>> chmod +x ~/bin/make.cross
>>> # save the attached .config to linux build tree
>>> make.cross ARCH=blackfin
>>>
>>> All warnings (new ones prefixed by >>):
>>>
>>>>> drivers/clocksource/timer-oxnas-rps.c:50:0: warning: "TIMER_ENABLE" redefined [enabled by default]
>>> arch/blackfin/mach-bf533/include/mach/defBF532.h:97:0: note: this is the location of the previous definition
>>>
>>> vim +/TIMER_ENABLE +50 drivers/clocksource/timer-oxnas-rps.c
>>>
>>> 34 /* TIMER1 used as tick
>>> 35 * TIMER2 used as clocksource
>>> 36 */
>>> 37
>>> 38 /* Registers definitions */
>>> 39
>>> 40 #define TIMER_LOAD_REG 0x0
>>> 41 #define TIMER_CURR_REG 0x4
>>> 42 #define TIMER_CTRL_REG 0x8
>>> 43 #define TIMER_CLRINT_REG 0xC
>>> 44
>>> 45 #define TIMER_BITS 24
>>> 46
>>> 47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
>>> 48
>>> 49 #define TIMER_PERIODIC BIT(6)
>>> > 50 #define TIMER_ENABLE BIT(7)
>>
>> It is already defined in the arch/blackfin/include dir.
>>
>
> Hi Daniel,
>
> This should never happen due to the blackfin headers.
> Actually the COMPILE_TEST option made these two happen.
>
> Should I push a v4 to keep COMPILE_TEST ?
Oh, actually with 'depends on GENERIC_CLOCKSOURCE', that should solve
both errors.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 1/2] clocksource: Add Oxford Semiconductor RPS Dual Timer
@ 2016-06-16 14:15 ` Daniel Lezcano
0 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-16 14:15 UTC (permalink / raw)
To: linux-arm-kernel
On 06/16/2016 03:47 PM, Neil Armstrong wrote:
> On 06/16/2016 03:33 PM, Daniel Lezcano wrote:
>> On 06/15/2016 05:35 PM, kbuild test robot wrote:
>>> Hi,
>>>
>>> [auto build test WARNING on tip/timers/core]
>>> [also build test WARNING on v4.7-rc3 next-20160615]
>>> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
>>>
>>> url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/clocksource-Add-support-for-Oxford-Semiconductor-RPS-Dual-Timer/20160615-181650
>>> config: blackfin-allmodconfig (attached as .config)
>>> compiler: bfin-uclinux-gcc (GCC) 4.6.3
>>> reproduce:
>>> wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
>>> chmod +x ~/bin/make.cross
>>> # save the attached .config to linux build tree
>>> make.cross ARCH=blackfin
>>>
>>> All warnings (new ones prefixed by >>):
>>>
>>>>> drivers/clocksource/timer-oxnas-rps.c:50:0: warning: "TIMER_ENABLE" redefined [enabled by default]
>>> arch/blackfin/mach-bf533/include/mach/defBF532.h:97:0: note: this is the location of the previous definition
>>>
>>> vim +/TIMER_ENABLE +50 drivers/clocksource/timer-oxnas-rps.c
>>>
>>> 34 /* TIMER1 used as tick
>>> 35 * TIMER2 used as clocksource
>>> 36 */
>>> 37
>>> 38 /* Registers definitions */
>>> 39
>>> 40 #define TIMER_LOAD_REG 0x0
>>> 41 #define TIMER_CURR_REG 0x4
>>> 42 #define TIMER_CTRL_REG 0x8
>>> 43 #define TIMER_CLRINT_REG 0xC
>>> 44
>>> 45 #define TIMER_BITS 24
>>> 46
>>> 47 #define TIMER_MAX_VAL (BIT(TIMER_BITS) - 1)
>>> 48
>>> 49 #define TIMER_PERIODIC BIT(6)
>>> > 50 #define TIMER_ENABLE BIT(7)
>>
>> It is already defined in the arch/blackfin/include dir.
>>
>
> Hi Daniel,
>
> This should never happen due to the blackfin headers.
> Actually the COMPILE_TEST option made these two happen.
>
> Should I push a v4 to keep COMPILE_TEST ?
Oh, actually with 'depends on GENERIC_CLOCKSOURCE', that should solve
both errors.
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
2016-06-15 10:26 ` Daniel Lezcano
@ 2016-06-16 15:01 ` Neil Armstrong
-1 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-16 15:01 UTC (permalink / raw)
To: Daniel Lezcano, linux-kernel, linux-arm-kernel, tglx, devicetree,
Rob Herring
On 06/15/2016 12:26 PM, Daniel Lezcano wrote:
> On 06/15/2016 12:23 PM, Daniel Lezcano wrote:
>> On 06/15/2016 12:13 PM, Neil Armstrong wrote:
>>> Add DT bindings for the Oxford Semiconductor RPS dual Timer.
>>>
>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>> ---
>>
>> Waiting for Rob's acked before picking the series.
>
> Ok, Rob already acked this patch in the V2.
>
> I will take these patches in my tree.
>
> Thanks.
>
> -- Daniel
>
OK, Do I need to send a v4, a simple patch fixing the Kconfig or can you change it while pushing to your branch ?
Thanks,
Neil
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
@ 2016-06-16 15:01 ` Neil Armstrong
0 siblings, 0 replies; 31+ messages in thread
From: Neil Armstrong @ 2016-06-16 15:01 UTC (permalink / raw)
To: linux-arm-kernel
On 06/15/2016 12:26 PM, Daniel Lezcano wrote:
> On 06/15/2016 12:23 PM, Daniel Lezcano wrote:
>> On 06/15/2016 12:13 PM, Neil Armstrong wrote:
>>> Add DT bindings for the Oxford Semiconductor RPS dual Timer.
>>>
>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>> ---
>>
>> Waiting for Rob's acked before picking the series.
>
> Ok, Rob already acked this patch in the V2.
>
> I will take these patches in my tree.
>
> Thanks.
>
> -- Daniel
>
OK, Do I need to send a v4, a simple patch fixing the Kconfig or can you change it while pushing to your branch ?
Thanks,
Neil
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
2016-06-16 15:01 ` Neil Armstrong
@ 2016-06-16 15:05 ` Daniel Lezcano
-1 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-16 15:05 UTC (permalink / raw)
To: Neil Armstrong, linux-kernel, linux-arm-kernel, tglx, devicetree,
Rob Herring
On 06/16/2016 05:01 PM, Neil Armstrong wrote:
> On 06/15/2016 12:26 PM, Daniel Lezcano wrote:
>> On 06/15/2016 12:23 PM, Daniel Lezcano wrote:
>>> On 06/15/2016 12:13 PM, Neil Armstrong wrote:
>>>> Add DT bindings for the Oxford Semiconductor RPS dual Timer.
>>>>
>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>> ---
>>>
>>> Waiting for Rob's acked before picking the series.
>>
>> Ok, Rob already acked this patch in the V2.
>>
>> I will take these patches in my tree.
>>
>> Thanks.
>>
>> -- Daniel
>>
>
> OK, Do I need to send a v4, a simple patch fixing the Kconfig or can you change it while pushing to your branch ?
I will do the change myself, that will be simpler.
-- Daniel
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings
@ 2016-06-16 15:05 ` Daniel Lezcano
0 siblings, 0 replies; 31+ messages in thread
From: Daniel Lezcano @ 2016-06-16 15:05 UTC (permalink / raw)
To: linux-arm-kernel
On 06/16/2016 05:01 PM, Neil Armstrong wrote:
> On 06/15/2016 12:26 PM, Daniel Lezcano wrote:
>> On 06/15/2016 12:23 PM, Daniel Lezcano wrote:
>>> On 06/15/2016 12:13 PM, Neil Armstrong wrote:
>>>> Add DT bindings for the Oxford Semiconductor RPS dual Timer.
>>>>
>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>> ---
>>>
>>> Waiting for Rob's acked before picking the series.
>>
>> Ok, Rob already acked this patch in the V2.
>>
>> I will take these patches in my tree.
>>
>> Thanks.
>>
>> -- Daniel
>>
>
> OK, Do I need to send a v4, a simple patch fixing the Kconfig or can you change it while pushing to your branch ?
I will do the change myself, that will be simpler.
-- Daniel
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 31+ messages in thread
end of thread, other threads:[~2016-06-16 15:05 UTC | newest]
Thread overview: 31+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-06-15 10:13 [PATCH v3 0/2] clocksource: Add support for Oxford Semiconductor RPS Dual Timer Neil Armstrong
2016-06-15 10:13 ` Neil Armstrong
2016-06-15 10:13 ` [PATCH v3 1/2] clocksource: Add " Neil Armstrong
2016-06-15 10:13 ` Neil Armstrong
2016-06-15 15:35 ` kbuild test robot
2016-06-15 15:35 ` kbuild test robot
2016-06-16 13:33 ` Daniel Lezcano
2016-06-16 13:33 ` Daniel Lezcano
2016-06-16 13:47 ` Neil Armstrong
2016-06-16 13:47 ` Neil Armstrong
2016-06-16 14:14 ` Daniel Lezcano
2016-06-16 14:14 ` Daniel Lezcano
2016-06-16 14:15 ` Daniel Lezcano
2016-06-16 14:15 ` Daniel Lezcano
2016-06-15 15:51 ` kbuild test robot
2016-06-15 15:51 ` kbuild test robot
2016-06-16 13:29 ` Daniel Lezcano
2016-06-16 13:29 ` Daniel Lezcano
2016-06-15 10:13 ` [PATCH v3 2/2] dt-bindings: clocksource: Add Add Oxford Semiconductor RPS Timer bindings Neil Armstrong
2016-06-15 10:13 ` Neil Armstrong
2016-06-15 10:13 ` Neil Armstrong
2016-06-15 10:23 ` Daniel Lezcano
2016-06-15 10:23 ` Daniel Lezcano
2016-06-15 10:26 ` Daniel Lezcano
2016-06-15 10:26 ` Daniel Lezcano
2016-06-15 10:39 ` Neil Armstrong
2016-06-15 10:39 ` Neil Armstrong
2016-06-16 15:01 ` Neil Armstrong
2016-06-16 15:01 ` Neil Armstrong
2016-06-16 15:05 ` Daniel Lezcano
2016-06-16 15:05 ` Daniel Lezcano
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