* [PATCH v12 1/9] fixed typo in ufshcd-pltfrm
2016-03-31 18:57 [PATCH v12 0/9] add support for DWC UFS Controller Joao Pinto
@ 2016-03-31 18:57 ` Joao Pinto
2016-03-31 18:57 ` [PATCH v12 2/9] add UFS 2.0 to ufshcd-pltfrm bindings Joao Pinto
` (9 subsequent siblings)
10 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-03-31 18:57 UTC (permalink / raw)
To: tomas.winkler
Cc: vinholikatti, julian.calaby, akinobu.mita, hch, gbroner,
subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland, Joao Pinto
Fixed typo in ufshcd-pltfrm.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
Changes v0->v12:
- Nothing changed (just to keep up with patch set version).
drivers/scsi/ufs/ufshcd-pltfrm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/ufs/ufshcd-pltfrm.c b/drivers/scsi/ufs/ufshcd-pltfrm.c
index d2a7b12..0522891 100644
--- a/drivers/scsi/ufs/ufshcd-pltfrm.c
+++ b/drivers/scsi/ufs/ufshcd-pltfrm.c
@@ -353,6 +353,6 @@ EXPORT_SYMBOL_GPL(ufshcd_pltfrm_init);
MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
-MODULE_DESCRIPTION("UFS host controller Pltform bus based glue driver");
+MODULE_DESCRIPTION("UFS host controller Platform bus based glue driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(UFSHCD_DRIVER_VERSION);
--
1.8.1.5
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v12 2/9] add UFS 2.0 to ufshcd-pltfrm bindings
2016-03-31 18:57 [PATCH v12 0/9] add support for DWC UFS Controller Joao Pinto
2016-03-31 18:57 ` [PATCH v12 1/9] fixed typo in ufshcd-pltfrm Joao Pinto
@ 2016-03-31 18:57 ` Joao Pinto
2016-04-04 5:15 ` Rob Herring
2016-03-31 18:57 ` [PATCH v12 3/9] added UFS 2.0 capabilities Joao Pinto
` (8 subsequent siblings)
10 siblings, 1 reply; 30+ messages in thread
From: Joao Pinto @ 2016-03-31 18:57 UTC (permalink / raw)
To: tomas.winkler
Cc: vinholikatti, julian.calaby, akinobu.mita, hch, gbroner,
subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland, Joao Pinto
Add UFS 2.0 to the ufshcd-pltfrm devicetree binding.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
Changes v0->v12 (Tomas Winkler):
- This patch only appeared in v12
Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
index 03c0e98..8d9a9d2 100644
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
@@ -4,8 +4,8 @@ UFSHC nodes are defined to describe on-chip UFS host controllers.
Each UFS controller instance should have its own node.
Required properties:
-- compatible : must contain "jedec,ufs-1.1", may also list one or more
- of the following:
+- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0", may
+ also list one or more of the following:
"qcom,msm8994-ufshc"
"qcom,msm8996-ufshc"
"qcom,ufshc"
--
1.8.1.5
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v12 2/9] add UFS 2.0 to ufshcd-pltfrm bindings
2016-03-31 18:57 ` [PATCH v12 2/9] add UFS 2.0 to ufshcd-pltfrm bindings Joao Pinto
@ 2016-04-04 5:15 ` Rob Herring
0 siblings, 0 replies; 30+ messages in thread
From: Rob Herring @ 2016-04-04 5:15 UTC (permalink / raw)
To: Joao Pinto
Cc: tomas.winkler, vinholikatti, julian.calaby, akinobu.mita, hch,
gbroner, subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland
On Thu, Mar 31, 2016 at 07:57:15PM +0100, Joao Pinto wrote:
> Add UFS 2.0 to the ufshcd-pltfrm devicetree binding.
>
> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
> ---
> Changes v0->v12 (Tomas Winkler):
> - This patch only appeared in v12
>
> Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v12 3/9] added UFS 2.0 capabilities
2016-03-31 18:57 [PATCH v12 0/9] add support for DWC UFS Controller Joao Pinto
2016-03-31 18:57 ` [PATCH v12 1/9] fixed typo in ufshcd-pltfrm Joao Pinto
2016-03-31 18:57 ` [PATCH v12 2/9] add UFS 2.0 to ufshcd-pltfrm bindings Joao Pinto
@ 2016-03-31 18:57 ` Joao Pinto
2016-03-31 20:27 ` Winkler, Tomas
2016-03-31 18:57 ` [PATCH v12 4/9] added unipro attributes Joao Pinto
` (7 subsequent siblings)
10 siblings, 1 reply; 30+ messages in thread
From: Joao Pinto @ 2016-03-31 18:57 UTC (permalink / raw)
To: tomas.winkler
Cc: vinholikatti, julian.calaby, akinobu.mita, hch, gbroner,
subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland, Joao Pinto
Adding UFS 2.0 support to the UFS core driver.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
Changes v11->v12 (Tomas Winkler):
- devicetree binding tweak was moved to a separated patch
- unipro tweaks were moved to a separated patch
- ufshcd_compose_upiu was decomposed in 2 functions
- UTP_CMD_TYPE_UFS_STORAGE is now 0x1 (previously was 0x11)
Changes v8->v11:
- Nothing changed (just to keep up with patch set version).
Changes v7->v8:
- Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings
Changes v0->v7:
- Nothing changed (just to keep up with patch set version).
drivers/scsi/ufs/ufshcd.c | 90 ++++++++++++++++++++++++++---------------------
drivers/scsi/ufs/ufshci.h | 5 +++
2 files changed, 54 insertions(+), 41 deletions(-)
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 9c1b94b..a69d637 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -1127,7 +1127,7 @@ static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
* @cmd_dir: requests data direction
*/
static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
- u32 *upiu_flags, enum dma_data_direction cmd_dir)
+ u32 *upiu_flags, enum dma_data_direction cmd_dir)
{
struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
u32 data_direction;
@@ -1253,47 +1253,55 @@ static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
}
/**
- * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
+ * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
+ * for Device Management Purposes
* @hba - per adapter instance
* @lrb - pointer to local reference block
*/
-static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
+static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
u32 upiu_flags;
int ret = 0;
- switch (lrbp->command_type) {
- case UTP_CMD_TYPE_SCSI:
- if (likely(lrbp->cmd)) {
- ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
- lrbp->cmd->sc_data_direction);
- ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
- } else {
- ret = -EINVAL;
- }
- break;
- case UTP_CMD_TYPE_DEV_MANAGE:
- ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
- if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
- ufshcd_prepare_utp_query_req_upiu(
- hba, lrbp, upiu_flags);
- else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
- ufshcd_prepare_utp_nop_upiu(lrbp);
- else
- ret = -EINVAL;
- break;
- case UTP_CMD_TYPE_UFS:
- /* For UFS native command implementation */
- ret = -ENOTSUPP;
- dev_err(hba->dev, "%s: UFS native command are not supported\n",
- __func__);
- break;
- default:
- ret = -ENOTSUPP;
- dev_err(hba->dev, "%s: unknown command type: 0x%x\n",
- __func__, lrbp->command_type);
- break;
- } /* end of switch */
+ if (hba->ufs_version == UFSHCI_VERSION_20)
+ lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+ else
+ lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
+
+ ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
+ if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
+ ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
+ else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
+ ufshcd_prepare_utp_nop_upiu(lrbp);
+ else
+ ret = -EINVAL;
+
+ return ret;
+}
+
+/**
+ * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
+ * for SCSI Purposes
+ * @hba - per adapter instance
+ * @lrb - pointer to local reference block
+ */
+static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
+{
+ u32 upiu_flags;
+ int ret = 0;
+
+ if (hba->ufs_version == UFSHCI_VERSION_20)
+ lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+ else
+ lrbp->command_type = UTP_CMD_TYPE_SCSI;
+
+ if (likely(lrbp->cmd)) {
+ ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
+ lrbp->cmd->sc_data_direction);
+ ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
+ } else {
+ ret = -EINVAL;
+ }
return ret;
}
@@ -1405,10 +1414,9 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
lrbp->task_tag = tag;
lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
- lrbp->command_type = UTP_CMD_TYPE_SCSI;
- /* form UPIU before issuing the command */
- ufshcd_compose_upiu(hba, lrbp);
+ ufshcd_comp_scsi_upiu(hba, lrbp);
+
err = ufshcd_map_sg(lrbp);
if (err) {
lrbp->cmd = NULL;
@@ -1433,11 +1441,10 @@ static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
lrbp->sense_buffer = NULL;
lrbp->task_tag = tag;
lrbp->lun = 0; /* device management cmd is not specific to any LUN */
- lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
lrbp->intr_cmd = true; /* No interrupt aggregation */
hba->dev_cmd.type = cmd_type;
- return ufshcd_compose_upiu(hba, lrbp);
+ return ufshcd_comp_devman_upiu(hba, lrbp);
}
static int
@@ -3403,7 +3410,8 @@ static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
/* Do not touch lrbp after scsi done */
cmd->scsi_done(cmd);
__ufshcd_release(hba);
- } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
+ } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
+ lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
if (hba->dev_cmd.complete)
complete(hba->dev_cmd.complete);
}
diff --git a/drivers/scsi/ufs/ufshci.h b/drivers/scsi/ufs/ufshci.h
index 0ae0967..20ece18 100644
--- a/drivers/scsi/ufs/ufshci.h
+++ b/drivers/scsi/ufs/ufshci.h
@@ -275,6 +275,11 @@ enum {
UTP_CMD_TYPE_DEV_MANAGE = 0x2,
};
+/* To accomodate UFS2.0 required Command type */
+enum {
+ UTP_CMD_TYPE_UFS_STORAGE = 0x1,
+};
+
enum {
UTP_SCSI_COMMAND = 0x00000000,
UTP_NATIVE_UFS_COMMAND = 0x10000000,
--
1.8.1.5
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v12 3/9] added UFS 2.0 capabilities
2016-03-31 18:57 ` [PATCH v12 3/9] added UFS 2.0 capabilities Joao Pinto
@ 2016-03-31 20:27 ` Winkler, Tomas
2016-04-01 9:19 ` Joao Pinto
0 siblings, 1 reply; 30+ messages in thread
From: Winkler, Tomas @ 2016-03-31 20:27 UTC (permalink / raw)
To: Joao.Pinto
Cc: vinholikatti, linux-kernel, hch, akinobu.mita, devicetree,
gbroner, subhashj, CARLOS.PALMINHA, linux-scsi, mark.rutland,
ijc+devicetree, julian.calaby, arnd
On Thu, 2016-03-31 at 19:57 +0100, Joao Pinto wrote:
> Adding UFS 2.0 support to the UFS core driver.
>
> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Looks good to me, though not tested yet
Tomas
> ---
> Changes v11->v12 (Tomas Winkler):
> - devicetree binding tweak was moved to a separated patch
> - unipro tweaks were moved to a separated patch
> - ufshcd_compose_upiu was decomposed in 2 functions
> - UTP_CMD_TYPE_UFS_STORAGE is now 0x1 (previously was 0x11)
> Changes v8->v11:
> - Nothing changed (just to keep up with patch set version).
> Changes v7->v8:
> - Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings
> Changes v0->v7:
> - Nothing changed (just to keep up with patch set version).
>
> drivers/scsi/ufs/ufshcd.c | 90 ++++++++++++++++++++++++++-----------
> ----------
> drivers/scsi/ufs/ufshci.h | 5 +++
> 2 files changed, 54 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> index 9c1b94b..a69d637 100644
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -1127,7 +1127,7 @@ static void ufshcd_disable_intr(struct ufs_hba
> *hba, u32 intrs)
> * @cmd_dir: requests data direction
> */
> static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
> - u32 *upiu_flags, enum dma_data_direction cmd_dir)
> + u32 *upiu_flags, enum dma_data_direction
> cmd_dir)
> {
> struct utp_transfer_req_desc *req_desc = lrbp
> ->utr_descriptor_ptr;
> u32 data_direction;
> @@ -1253,47 +1253,55 @@ static inline void
> ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
> }
>
> /**
> - * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
> + * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
> + * for Device Management Purposes
> * @hba - per adapter instance
> * @lrb - pointer to local reference block
> */
> -static int ufshcd_compose_upiu(struct ufs_hba *hba, struct
> ufshcd_lrb *lrbp)
> +static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct
> ufshcd_lrb *lrbp)
> {
> u32 upiu_flags;
> int ret = 0;
>
> - switch (lrbp->command_type) {
> - case UTP_CMD_TYPE_SCSI:
> - if (likely(lrbp->cmd)) {
> - ufshcd_prepare_req_desc_hdr(lrbp,
> &upiu_flags,
> - lrbp->cmd
> ->sc_data_direction);
> - ufshcd_prepare_utp_scsi_cmd_upiu(lrbp,
> upiu_flags);
> - } else {
> - ret = -EINVAL;
> - }
> - break;
> - case UTP_CMD_TYPE_DEV_MANAGE:
> - ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
> DMA_NONE);
> - if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
> - ufshcd_prepare_utp_query_req_upiu(
> - hba, lrbp, upiu_flags);
> - else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
> - ufshcd_prepare_utp_nop_upiu(lrbp);
> - else
> - ret = -EINVAL;
> - break;
> - case UTP_CMD_TYPE_UFS:
> - /* For UFS native command implementation */
> - ret = -ENOTSUPP;
> - dev_err(hba->dev, "%s: UFS native command are not
> supported\n",
> - __func__);
> - break;
> - default:
> - ret = -ENOTSUPP;
> - dev_err(hba->dev, "%s: unknown command type:
> 0x%x\n",
> - __func__, lrbp->command_type);
> - break;
> - } /* end of switch */
> + if (hba->ufs_version == UFSHCI_VERSION_20)
> + lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
> + else
> + lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
> +
> + ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
> + if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
> + ufshcd_prepare_utp_query_req_upiu(hba, lrbp,
> upiu_flags);
> + else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
> + ufshcd_prepare_utp_nop_upiu(lrbp);
> + else
> + ret = -EINVAL;
> +
> + return ret;
> +}
> +
> +/**
> + * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
> + * for SCSI Purposes
> + * @hba - per adapter instance
> + * @lrb - pointer to local reference block
> + */
> +static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct
> ufshcd_lrb *lrbp)
> +{
> + u32 upiu_flags;
> + int ret = 0;
> +
> + if (hba->ufs_version == UFSHCI_VERSION_20)
> + lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
> + else
> + lrbp->command_type = UTP_CMD_TYPE_SCSI;
> +
> + if (likely(lrbp->cmd)) {
> + ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
> + lrbp->cmd
> ->sc_data_direction);
> + ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
> + } else {
> + ret = -EINVAL;
> + }
>
> return ret;
> }
> @@ -1405,10 +1414,9 @@ static int ufshcd_queuecommand(struct
> Scsi_Host *host, struct scsi_cmnd *cmd)
> lrbp->task_tag = tag;
> lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
> lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true :
> false;
> - lrbp->command_type = UTP_CMD_TYPE_SCSI;
>
> - /* form UPIU before issuing the command */
> - ufshcd_compose_upiu(hba, lrbp);
> + ufshcd_comp_scsi_upiu(hba, lrbp);
> +
> err = ufshcd_map_sg(lrbp);
> if (err) {
> lrbp->cmd = NULL;
> @@ -1433,11 +1441,10 @@ static int ufshcd_compose_dev_cmd(struct
> ufs_hba *hba,
> lrbp->sense_buffer = NULL;
> lrbp->task_tag = tag;
> lrbp->lun = 0; /* device management cmd is not specific to
> any LUN */
> - lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
> lrbp->intr_cmd = true; /* No interrupt aggregation */
> hba->dev_cmd.type = cmd_type;
>
> - return ufshcd_compose_upiu(hba, lrbp);
> + return ufshcd_comp_devman_upiu(hba, lrbp);
> }
>
> static int
> @@ -3403,7 +3410,8 @@ static void ufshcd_transfer_req_compl(struct
> ufs_hba *hba)
> /* Do not touch lrbp after scsi done */
> cmd->scsi_done(cmd);
> __ufshcd_release(hba);
> - } else if (lrbp->command_type ==
> UTP_CMD_TYPE_DEV_MANAGE) {
> + } else if (lrbp->command_type ==
> UTP_CMD_TYPE_DEV_MANAGE ||
> + lrbp->command_type ==
> UTP_CMD_TYPE_UFS_STORAGE) {
> if (hba->dev_cmd.complete)
> complete(hba->dev_cmd.complete);
> }
> diff --git a/drivers/scsi/ufs/ufshci.h b/drivers/scsi/ufs/ufshci.h
> index 0ae0967..20ece18 100644
> --- a/drivers/scsi/ufs/ufshci.h
> +++ b/drivers/scsi/ufs/ufshci.h
> @@ -275,6 +275,11 @@ enum {
> UTP_CMD_TYPE_DEV_MANAGE = 0x2,
> };
>
> +/* To accomodate UFS2.0 required Command type */
> +enum {
> + UTP_CMD_TYPE_UFS_STORAGE = 0x1,
> +};
> +
> enum {
> UTP_SCSI_COMMAND = 0x00000000,
> UTP_NATIVE_UFS_COMMAND = 0x10000000,
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v12 3/9] added UFS 2.0 capabilities
2016-03-31 20:27 ` Winkler, Tomas
@ 2016-04-01 9:19 ` Joao Pinto
0 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-04-01 9:19 UTC (permalink / raw)
To: Winkler, Tomas, Joao.Pinto
Cc: vinholikatti, linux-kernel, hch, akinobu.mita, devicetree,
gbroner, subhashj, CARLOS.PALMINHA, linux-scsi, mark.rutland,
ijc+devicetree, julian.calaby, arnd
On 3/31/2016 9:27 PM, Winkler, Tomas wrote:
> On Thu, 2016-03-31 at 19:57 +0100, Joao Pinto wrote:
>> Adding UFS 2.0 support to the UFS core driver.
>>
>> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
>
> Looks good to me, though not tested yet
> Tomas
I have tested the build in a x86 and ARC. Also tested the functionality by using
a HAPS-DX FPGA with the UFS 2.0 design + MPHY G210.
>
>> ---
>> Changes v11->v12 (Tomas Winkler):
>> - devicetree binding tweak was moved to a separated patch
>> - unipro tweaks were moved to a separated patch
>> - ufshcd_compose_upiu was decomposed in 2 functions
[snip]
>> +enum {
>> + UTP_CMD_TYPE_UFS_STORAGE = 0x1,
>> +};
>> +
>> enum {
>> UTP_SCSI_COMMAND = 0x00000000,
>> UTP_NATIVE_UFS_COMMAND = 0x10000000,
If you need anything else, please let me know.
Thanks.
Joao
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v12 4/9] added unipro attributes
2016-03-31 18:57 [PATCH v12 0/9] add support for DWC UFS Controller Joao Pinto
` (2 preceding siblings ...)
2016-03-31 18:57 ` [PATCH v12 3/9] added UFS 2.0 capabilities Joao Pinto
@ 2016-03-31 18:57 ` Joao Pinto
2016-03-31 18:57 ` Joao Pinto
` (6 subsequent siblings)
10 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-03-31 18:57 UTC (permalink / raw)
To: tomas.winkler
Cc: vinholikatti, julian.calaby, akinobu.mita, hch, gbroner,
subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland, Joao Pinto
Added unipro attributes.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
Changes v0->v12 (Tomas Winkler):
- This patch only appeared in v12
drivers/scsi/ufs/unipro.h | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/drivers/scsi/ufs/unipro.h b/drivers/scsi/ufs/unipro.h
index 816a8a4..da16254 100644
--- a/drivers/scsi/ufs/unipro.h
+++ b/drivers/scsi/ufs/unipro.h
@@ -35,6 +35,10 @@
#define TX_LCC_SEQUENCER 0x0032
#define TX_MIN_ACTIVATETIME 0x0033
#define TX_PWM_G6_G7_SYNC_LENGTH 0x0034
+#define TX_REFCLKFREQ 0x00EB
+#define TX_CFGCLKFREQVAL 0x00EC
+#define CFGEXTRATTR 0x00F0
+#define DITHERCTRL2 0x00F1
/*
* M-RX Configuration Attributes
@@ -48,8 +52,38 @@
#define RX_ENTER_HIBERN8 0x00A7
#define RX_BYPASS_8B10B_ENABLE 0x00A8
#define RX_TERMINATION_FORCE_ENABLE 0x0089
+#define RX_REFCLKFREQ 0x00EB
+#define RX_CFGCLKFREQVAL 0x00EC
+#define CFGWIDEINLN 0x00F0
+#define CFGRXCDR8 0x00BA
+#define ENARXDIRECTCFG4 0x00F2
+#define CFGRXOVR8 0x00BD
+#define RXDIRECTCTRL2 0x00C7
+#define ENARXDIRECTCFG3 0x00F3
+#define RXCALCTRL 0x00B4
+#define ENARXDIRECTCFG2 0x00F4
+#define CFGRXOVR4 0x00E9
+#define RXSQCTRL 0x00B5
+#define CFGRXOVR6 0x00BF
#define is_mphy_tx_attr(attr) (attr < RX_MODE)
+
+/*
+ * Common Block Attributes
+ */
+#define TX_GLOBALHIBERNATE UNIPRO_CB_OFFSET(0x002B)
+#define REFCLKMODE UNIPRO_CB_OFFSET(0x00BF)
+#define DIRECTCTRL19 UNIPRO_CB_OFFSET(0x00CD)
+#define DIRECTCTRL10 UNIPRO_CB_OFFSET(0x00E6)
+#define CDIRECTCTRL6 UNIPRO_CB_OFFSET(0x00EA)
+#define RTOBSERVESELECT UNIPRO_CB_OFFSET(0x00F0)
+#define CBDIVFACTOR UNIPRO_CB_OFFSET(0x00F1)
+#define CBDCOCTRL5 UNIPRO_CB_OFFSET(0x00F3)
+#define CBPRGPLL2 UNIPRO_CB_OFFSET(0x00F8)
+#define CBPRGTUNING UNIPRO_CB_OFFSET(0x00FB)
+
+#define UNIPRO_CB_OFFSET(x) (0x8000 | x)
+
/*
* PHY Adpater attributes
*/
@@ -110,6 +144,11 @@
#define PA_STALLNOCONFIGTIME 0x15A3
#define PA_SAVECONFIGTIME 0x15A4
+/*Other attributes*/
+#define VS_MPHYCFGUPDT 0xD085
+#define VS_DEBUGOMC 0xD09E
+#define VS_POWERSTATE 0xD083
+
/* PA power modes */
enum {
FAST_MODE = 1,
--
1.8.1.5
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v12 5/9] added link status to ufshci
@ 2016-03-31 18:57 ` Joao Pinto
0 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-03-31 18:57 UTC (permalink / raw)
To: tomas.winkler
Cc: vinholikatti, julian.calaby, akinobu.mita, hch, gbroner,
subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland, Joao Pinto
Added link status to ufshci.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
Changes v0->v12 (Tomas Winkler):
- This patch only appeared in v12
drivers/scsi/ufs/ufshci.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/scsi/ufs/ufshci.h b/drivers/scsi/ufs/ufshci.h
index 20ece18..169363e 100644
--- a/drivers/scsi/ufs/ufshci.h
+++ b/drivers/scsi/ufs/ufshci.h
@@ -216,6 +216,12 @@ enum {
#define UIC_ARG_ATTR_TYPE(t) (((t) & 0xFF) << 16)
#define UIC_GET_ATTR_ID(v) (((v) >> 16) & 0xFFFF)
+/* Link Status*/
+enum link_status {
+ UFSHCD_LINK_IS_DOWN = 1,
+ UFSHCD_LINK_IS_UP = 2,
+};
+
/* UIC Commands */
enum uic_cmd_dme {
UIC_CMD_DME_GET = 0x01,
--
1.8.1.5
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v12 5/9] added link status to ufshci
@ 2016-03-31 18:57 ` Joao Pinto
0 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-03-31 18:57 UTC (permalink / raw)
To: tomas.winkler-ral2JQCrhuEAvxtiuMwx3w
Cc: vinholikatti-Re5JQEeQqe8AvxtiuMwx3w,
julian.calaby-Re5JQEeQqe8AvxtiuMwx3w,
akinobu.mita-Re5JQEeQqe8AvxtiuMwx3w, hch-wEGCiKHe2LqWVfeAwA7xHQ,
gbroner-sgV2jX0FEOL9JmXXK+q4OQ, subhashj-sgV2jX0FEOL9JmXXK+q4OQ,
CARLOS.PALMINHA-HKixBCOQz3hWk0Htik3J/w,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-scsi-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, arnd-r2nGTMty4D4,
mark.rutland-5wv7dgnIgG8, Joao Pinto
Added link status to ufshci.
Signed-off-by: Joao Pinto <jpinto-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
---
Changes v0->v12 (Tomas Winkler):
- This patch only appeared in v12
drivers/scsi/ufs/ufshci.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/scsi/ufs/ufshci.h b/drivers/scsi/ufs/ufshci.h
index 20ece18..169363e 100644
--- a/drivers/scsi/ufs/ufshci.h
+++ b/drivers/scsi/ufs/ufshci.h
@@ -216,6 +216,12 @@ enum {
#define UIC_ARG_ATTR_TYPE(t) (((t) & 0xFF) << 16)
#define UIC_GET_ATTR_ID(v) (((v) >> 16) & 0xFFFF)
+/* Link Status*/
+enum link_status {
+ UFSHCD_LINK_IS_DOWN = 1,
+ UFSHCD_LINK_IS_UP = 2,
+};
+
/* UIC Commands */
enum uic_cmd_dme {
UIC_CMD_DME_GET = 0x01,
--
1.8.1.5
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v12 6/9] added support for DesignWare Controller
2016-03-31 18:57 [PATCH v12 0/9] add support for DWC UFS Controller Joao Pinto
` (4 preceding siblings ...)
2016-03-31 18:57 ` Joao Pinto
@ 2016-03-31 18:57 ` Joao Pinto
2016-04-13 12:19 ` [PATCH v14 " Akinobu Mita
2016-03-31 18:57 ` [PATCH v12 7/9] added support for Synopsys G210 Test Chip Joao Pinto
` (4 subsequent siblings)
10 siblings, 1 reply; 30+ messages in thread
From: Joao Pinto @ 2016-03-31 18:57 UTC (permalink / raw)
To: tomas.winkler
Cc: vinholikatti, julian.calaby, akinobu.mita, hch, gbroner,
subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland, Joao Pinto
This patch has the goal to add support for DesignWare UFS Controller
specific operations.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
Changes v11->v12 (Tomas Winkler):
- custom_phy_initialization is now phy_initialization
- ufshcd_is_intr_aggr_allowed() has now a DWC tweak
- link status was now moved to a separated patch
Changes v10->v11:
- Nothing changed (just to keep up with patch set version).
Changes v9->v10 (Arnd Bergmann):
- Patch now only has DWC controller specific code
- Added custom_phy_initialization callback for PHY specific code
Changes v8->v9 (Robert Herring):
- drop 0x in the node declaration
- most specific compatibility string declared first
Changes v7->v8 (Akinobu Mita):
- DME sets were simplified for easier reading
- CLK DIV default values definitions names were changed to match the
register's name
- New line added to dev_err and dev_info statements
Changes v6->v7 (Arnd Bergmann):
- Changed DT node name (to ufs only) and the memory address (to 0xd000000)
- Removed CONFIG_PM from the PCI glue driver (pm.h already does this)
- No other changes are necessary in ufshcd.c because of the link up notify
function usage (it is simpler now)
- Removed the PHY mentioning since the Test Chip is not a real PHY for real
world usage, since it is a test chip for prototyping with a very specific
usage
- Added again the Test Chip 20-bit option
Changes v5->v6:
- Patch bad format fixed
Changes v4->v5 (Akinobu Mita):
- All functions used only locally in ufshcd-dwc are now declared as static
- ufshcd_dwc_configuration() was removed in ufshcd-dwc and a notify
function (ufshcd_dwc_link_startup_notify) was created to deal with the
DWC specific init routines
- 20-bit RMMI option was removed from Kconfig. Now if MPHY TC is selected
and 40-bit is not then it assumes a 20-bit config
Changes v3->v4 (Arnd Bergmann and Mark Rutland):
- SCSI_UFS_DWC_HOOKS is now silent and selected by the SCSI_UFS_DWC_PLAT
or SCSI_UFS_DWC_PCI
- Compatibility string has the ufs core version for info purposes since
the driver is capable of getting the controller version from its
registers
- Created ufs-dwc-pci glue driver with specific DWC data
- MPHY configuration remains in the ufshcd-dwc since it is unipro
attribute writting only not following the a linux phy framework logic
Changes v2->v3 (Julian Calaby):
- Implement a common DWC code to be used by the platform and pci glue
drivers
- Synopsys ID & Class added to the existing pci driver and specific DWC
was also added to the pci driver
Changes v1->v2 (Akinobu Mita):
- Implement a platform driver that uses the existing UFS core driver
- Add DWC specific code to the existing UFS core driver
MAINTAINERS | 6 ++
drivers/scsi/ufs/Kconfig | 3 +
drivers/scsi/ufs/Makefile | 1 +
drivers/scsi/ufs/ufshcd-dwc.c | 150 ++++++++++++++++++++++++++++++++++++++++++
drivers/scsi/ufs/ufshcd-dwc.h | 26 ++++++++
drivers/scsi/ufs/ufshcd.h | 7 ++
drivers/scsi/ufs/ufshci-dwc.h | 36 ++++++++++
7 files changed, 229 insertions(+)
create mode 100644 drivers/scsi/ufs/ufshcd-dwc.c
create mode 100644 drivers/scsi/ufs/ufshcd-dwc.h
create mode 100644 drivers/scsi/ufs/ufshci-dwc.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 32bafda..7fc2730 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11408,6 +11408,12 @@ S: Supported
F: Documentation/scsi/ufs.txt
F: drivers/scsi/ufs/
+UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER DWC HOOKS
+M: Joao Pinto <Joao.Pinto@synopsys.com>
+L: linux-scsi@vger.kernel.org
+S: Supported
+F: drivers/scsi/ufs/*dwc*
+
UNSORTED BLOCK IMAGES (UBI)
M: Artem Bityutskiy <dedekind1@gmail.com>
M: Richard Weinberger <richard@nod.at>
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index 5f45307..647c324 100644
--- a/drivers/scsi/ufs/Kconfig
+++ b/drivers/scsi/ufs/Kconfig
@@ -83,3 +83,6 @@ config SCSI_UFS_QCOM
Select this if you have UFS controller on QCOM chipset.
If unsure, say N.
+
+config SCSI_UFS_DWC
+ bool
diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
index 8303bcc..ccbad53 100644
--- a/drivers/scsi/ufs/Makefile
+++ b/drivers/scsi/ufs/Makefile
@@ -1,4 +1,5 @@
# UFSHCD makefile
+obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
diff --git a/drivers/scsi/ufs/ufshcd-dwc.c b/drivers/scsi/ufs/ufshcd-dwc.c
new file mode 100644
index 0000000..9b3ca7f
--- /dev/null
+++ b/drivers/scsi/ufs/ufshcd-dwc.c
@@ -0,0 +1,150 @@
+/*
+ * UFS Host driver for Synopsys Designware Core
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors: Joao Pinto <jpinto@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "ufshcd.h"
+#include "unipro.h"
+
+#include "ufshcd-dwc.h"
+#include "ufshci-dwc.h"
+
+int ufshcd_dwc_dme_set_attrs(struct ufs_hba *hba,
+ const struct ufshcd_dme_attr_val *v, int n)
+{
+ int ret = 0;
+ int attr_node = 0;
+
+ for (attr_node = 0; attr_node < n; attr_node++) {
+ ret = ufshcd_dme_set_attr(hba, v[attr_node].attr_sel,
+ ATTR_SET_NOR, v[attr_node].mib_val, v[attr_node].peer);
+
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(ufshcd_dwc_dme_set_attrs);
+
+/**
+ * ufshcd_dwc_program_clk_div()
+ * This function programs the clk divider value. This value is needed to
+ * provide 1 microsecond tick to unipro layer.
+ * @hba: Private Structure pointer
+ * @divider_val: clock divider value to be programmed
+ *
+ */
+static void ufshcd_dwc_program_clk_div(struct ufs_hba *hba, u32 divider_val)
+{
+ ufshcd_writel(hba, divider_val, DWC_UFS_REG_HCLKDIV);
+}
+
+/**
+ * ufshcd_dwc_link_is_up()
+ * Check if link is up
+ * @hba: private structure poitner
+ *
+ * Returns 0 on success, non-zero value on failure
+ */
+static int ufshcd_dwc_link_is_up(struct ufs_hba *hba)
+{
+ int dme_result = 0;
+
+ ufshcd_dme_get(hba, UIC_ARG_MIB(VS_POWERSTATE), &dme_result);
+
+ if (dme_result == UFSHCD_LINK_IS_UP) {
+ ufshcd_set_link_active(hba);
+ return 0;
+ }
+
+ return 1;
+}
+
+/**
+ * ufshcd_dwc_connection_setup()
+ * This function configures both the local side (host) and the peer side
+ * (device) unipro attributes to establish the connection to application/
+ * cport.
+ * This function is not required if the hardware is properly configured to
+ * have this connection setup on reset. But invoking this function does no
+ * harm and should be fine even working with any ufs device.
+ *
+ * @hba: pointer to drivers private data
+ *
+ * Returns 0 on success non-zero value on failure
+ */
+static int ufshcd_dwc_connection_setup(struct ufs_hba *hba)
+{
+ const struct ufshcd_dme_attr_val setup_attrs[] = {
+ { UIC_ARG_MIB(T_CONNECTIONSTATE), 0, DME_LOCAL },
+ { UIC_ARG_MIB(N_DEVICEID), 0, DME_LOCAL },
+ { UIC_ARG_MIB(N_DEVICEID_VALID), 0, DME_LOCAL },
+ { UIC_ARG_MIB(T_PEERDEVICEID), 1, DME_LOCAL },
+ { UIC_ARG_MIB(T_PEERCPORTID), 0, DME_LOCAL },
+ { UIC_ARG_MIB(T_TRAFFICCLASS), 0, DME_LOCAL },
+ { UIC_ARG_MIB(T_CPORTFLAGS), 0x6, DME_LOCAL },
+ { UIC_ARG_MIB(T_CPORTMODE), 1, DME_LOCAL },
+ { UIC_ARG_MIB(T_CONNECTIONSTATE), 1, DME_LOCAL },
+ { UIC_ARG_MIB(T_CONNECTIONSTATE), 0, DME_PEER },
+ { UIC_ARG_MIB(N_DEVICEID), 1, DME_PEER },
+ { UIC_ARG_MIB(N_DEVICEID_VALID), 1, DME_PEER },
+ { UIC_ARG_MIB(T_PEERDEVICEID), 1, DME_PEER },
+ { UIC_ARG_MIB(T_PEERCPORTID), 0, DME_PEER },
+ { UIC_ARG_MIB(T_TRAFFICCLASS), 0, DME_PEER },
+ { UIC_ARG_MIB(T_CPORTFLAGS), 0x6, DME_PEER },
+ { UIC_ARG_MIB(T_CPORTMODE), 1, DME_PEER },
+ { UIC_ARG_MIB(T_CONNECTIONSTATE), 1, DME_PEER }
+ };
+
+ return ufshcd_dwc_dme_set_attrs(hba, setup_attrs, ARRAY_SIZE(setup_attrs));
+}
+
+/**
+ * ufshcd_dwc_link_startup_notify()
+ * UFS Host DWC specific link startup sequence
+ * @hba: private structure poitner
+ * @status: Callback notify status
+ *
+ * Returns 0 on success, non-zero value on failure
+ */
+int ufshcd_dwc_link_startup_notify(struct ufs_hba *hba,
+ enum ufs_notify_change_status status)
+{
+ int err = 0;
+
+ if (status == PRE_CHANGE) {
+ ufshcd_dwc_program_clk_div(hba, DWC_UFS_REG_HCLKDIV_DIV_125);
+
+ if (hba->vops->phy_initialization) {
+ err = hba->vops->phy_initialization(hba);
+ if (err) {
+ dev_err(hba->dev, "Phy setup failed (%d)\n",
+ err);
+ goto out;
+ }
+ }
+ } else { /* POST_CHANGE */
+ err = ufshcd_dwc_link_is_up(hba);
+ if (err) {
+ dev_err(hba->dev, "Link is not up\n");
+ goto out;
+ }
+
+ err = ufshcd_dwc_connection_setup(hba);
+ if (err)
+ dev_err(hba->dev, "Connection setup failed (%d)\n",
+ err);
+ }
+
+out:
+ return err;
+}
+EXPORT_SYMBOL(ufshcd_dwc_link_startup_notify);
diff --git a/drivers/scsi/ufs/ufshcd-dwc.h b/drivers/scsi/ufs/ufshcd-dwc.h
new file mode 100644
index 0000000..c8be295
--- /dev/null
+++ b/drivers/scsi/ufs/ufshcd-dwc.h
@@ -0,0 +1,26 @@
+/*
+ * UFS Host driver for Synopsys Designware Core
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors: Joao Pinto <jpinto@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _UFSHCD_DWC_H
+#define _UFSHCD_DWC_H
+
+struct ufshcd_dme_attr_val {
+ u32 attr_sel;
+ u32 mib_val;
+ u8 peer;
+};
+
+int ufshcd_dwc_link_startup_notify(struct ufs_hba *hba,
+ enum ufs_notify_change_status status);
+int ufshcd_dwc_dme_set_attrs(struct ufs_hba *hba,
+ const struct ufshcd_dme_attr_val *v, int n);
+#endif /* End of Header */
diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
index e3931d0..c780d14 100644
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -263,6 +263,7 @@ struct ufs_pwr_mode_info {
* @suspend: called during host controller PM callback
* @resume: called during host controller PM callback
* @dbg_register_dump: used to dump controller debug information
+ * @phy_initialization: used to initialize phys
*/
struct ufs_hba_variant_ops {
const char *name;
@@ -284,6 +285,7 @@ struct ufs_hba_variant_ops {
int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
int (*resume)(struct ufs_hba *, enum ufs_pm_op);
void (*dbg_register_dump)(struct ufs_hba *hba);
+ int (*phy_initialization)(struct ufs_hba *);
};
/* clock gating state */
@@ -555,11 +557,16 @@ static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
{
+/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
+#ifndef CONFIG_SCSI_UFS_DWC
if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
!(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
return true;
else
return false;
+#else
+return true;
+#endif
}
#define ufshcd_writel(hba, val, reg) \
diff --git a/drivers/scsi/ufs/ufshci-dwc.h b/drivers/scsi/ufs/ufshci-dwc.h
new file mode 100644
index 0000000..ca341fe
--- /dev/null
+++ b/drivers/scsi/ufs/ufshci-dwc.h
@@ -0,0 +1,36 @@
+/*
+ * UFS Host driver for Synopsys Designware Core
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors: Joao Pinto <jpinto@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _UFSHCI_DWC_H
+#define _UFSHCI_DWC_H
+
+/* DWC HC UFSHCI specific Registers */
+enum dwc_specific_registers {
+ DWC_UFS_REG_HCLKDIV = 0xFC,
+};
+
+/* Clock Divider Values: Hex equivalent of frequency in MHz */
+enum clk_div_values {
+ DWC_UFS_REG_HCLKDIV_DIV_62_5 = 0x3e,
+ DWC_UFS_REG_HCLKDIV_DIV_125 = 0x7d,
+ DWC_UFS_REG_HCLKDIV_DIV_200 = 0xc8,
+};
+
+/* Selector Index */
+enum selector_index {
+ SELIND_LN0_TX = 0x00,
+ SELIND_LN1_TX = 0x01,
+ SELIND_LN0_RX = 0x04,
+ SELIND_LN1_RX = 0x05,
+};
+
+#endif /* End of Header */
--
1.8.1.5
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v14 6/9] added support for DesignWare Controller
2016-03-31 18:57 ` [PATCH v12 6/9] added support for DesignWare Controller Joao Pinto
@ 2016-04-13 12:19 ` Akinobu Mita
2016-04-13 12:57 ` Joao Pinto
0 siblings, 1 reply; 30+ messages in thread
From: Akinobu Mita @ 2016-04-13 12:19 UTC (permalink / raw)
To: Joao Pinto; +Cc: linux-scsi
Hi Joao,
2016-04-13 18:04 GMT+09:00 Joao Pinto <Joao.Pinto@synopsys.com>:
> diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
> index e3931d0..c780d14 100644
> --- a/drivers/scsi/ufs/ufshcd.h
> +++ b/drivers/scsi/ufs/ufshcd.h
> @@ -263,6 +263,7 @@ struct ufs_pwr_mode_info {
> * @suspend: called during host controller PM callback
> * @resume: called during host controller PM callback
> * @dbg_register_dump: used to dump controller debug information
> + * @phy_initialization: used to initialize phys
> */
> struct ufs_hba_variant_ops {
> const char *name;
> @@ -284,6 +285,7 @@ struct ufs_hba_variant_ops {
> int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
> int (*resume)(struct ufs_hba *, enum ufs_pm_op);
> void (*dbg_register_dump)(struct ufs_hba *hba);
> + int (*phy_initialization)(struct ufs_hba *);
> };
This vops->phy_initialization is only called from ufs dwc specific
source files and not called from ufs core. So this should not belong
to ufs_hba_variant_ops.
You can use hba->priv to put the controller specific data structure
including phy_initialization and you also need to define vops->init
callback which allocates and initialize the data structure.
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v14 6/9] added support for DesignWare Controller
2016-04-13 12:19 ` [PATCH v14 " Akinobu Mita
@ 2016-04-13 12:57 ` Joao Pinto
2016-04-13 13:30 ` Akinobu Mita
0 siblings, 1 reply; 30+ messages in thread
From: Joao Pinto @ 2016-04-13 12:57 UTC (permalink / raw)
To: Akinobu Mita, Joao Pinto; +Cc: linux-scsi
Hi Akinobu,
On 4/13/2016 1:19 PM, Akinobu Mita wrote:
> Hi Joao,
>
> 2016-04-13 18:04 GMT+09:00 Joao Pinto <Joao.Pinto@synopsys.com>:
>
>> diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
>> index e3931d0..c780d14 100644
>> --- a/drivers/scsi/ufs/ufshcd.h
>> +++ b/drivers/scsi/ufs/ufshcd.h
>> @@ -263,6 +263,7 @@ struct ufs_pwr_mode_info {
>> * @suspend: called during host controller PM callback
>> * @resume: called during host controller PM callback
>> * @dbg_register_dump: used to dump controller debug information
>> + * @phy_initialization: used to initialize phys
>> */
>> struct ufs_hba_variant_ops {
>> const char *name;
>> @@ -284,6 +285,7 @@ struct ufs_hba_variant_ops {
>> int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
>> int (*resume)(struct ufs_hba *, enum ufs_pm_op);
>> void (*dbg_register_dump)(struct ufs_hba *hba);
>> + int (*phy_initialization)(struct ufs_hba *);
>> };
>
> This vops->phy_initialization is only called from ufs dwc specific
> source files and not called from ufs core. So this should not belong
> to ufs_hba_variant_ops.
At this time only DWC specific uses the phy_initialization, but can be used by
others in the future when the same necessity comes.
>
> You can use hba->priv to put the controller specific data structure
> including phy_initialization and you also need to define vops->init
> callback which allocates and initialize the data structure.
>
Joao
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v14 6/9] added support for DesignWare Controller
2016-04-13 12:57 ` Joao Pinto
@ 2016-04-13 13:30 ` Akinobu Mita
0 siblings, 0 replies; 30+ messages in thread
From: Akinobu Mita @ 2016-04-13 13:30 UTC (permalink / raw)
To: Joao Pinto; +Cc: linux-scsi
Hi Joao,
2016-04-13 21:57 GMT+09:00 Joao Pinto <Joao.Pinto@synopsys.com>:
>
> Hi Akinobu,
>
> On 4/13/2016 1:19 PM, Akinobu Mita wrote:
>> Hi Joao,
>>
>> 2016-04-13 18:04 GMT+09:00 Joao Pinto <Joao.Pinto@synopsys.com>:
>>
>>> diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
>>> index e3931d0..c780d14 100644
>>> --- a/drivers/scsi/ufs/ufshcd.h
>>> +++ b/drivers/scsi/ufs/ufshcd.h
>>> @@ -263,6 +263,7 @@ struct ufs_pwr_mode_info {
>>> * @suspend: called during host controller PM callback
>>> * @resume: called during host controller PM callback
>>> * @dbg_register_dump: used to dump controller debug information
>>> + * @phy_initialization: used to initialize phys
>>> */
>>> struct ufs_hba_variant_ops {
>>> const char *name;
>>> @@ -284,6 +285,7 @@ struct ufs_hba_variant_ops {
>>> int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
>>> int (*resume)(struct ufs_hba *, enum ufs_pm_op);
>>> void (*dbg_register_dump)(struct ufs_hba *hba);
>>> + int (*phy_initialization)(struct ufs_hba *);
>>> };
>>
>> This vops->phy_initialization is only called from ufs dwc specific
>> source files and not called from ufs core. So this should not belong
>> to ufs_hba_variant_ops.
>
> At this time only DWC specific uses the phy_initialization, but can be used by
> others in the future when the same necessity comes.
But vops->phy_initialization is only called from DWC specific
vops->link_startup_notify. So I think there is no point adding
new callback to vops.
>> You can use hba->priv to put the controller specific data structure
>> including phy_initialization and you also need to define vops->init
>> callback which allocates and initialize the data structure.
Or you can create another vops which have different link_startup_notify
because phy_initialization is only called from link_starup_notify.
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v12 7/9] added support for Synopsys G210 Test Chip
2016-03-31 18:57 [PATCH v12 0/9] add support for DWC UFS Controller Joao Pinto
` (5 preceding siblings ...)
2016-03-31 18:57 ` [PATCH v12 6/9] added support for DesignWare Controller Joao Pinto
@ 2016-03-31 18:57 ` Joao Pinto
2016-03-31 18:57 ` [PATCH v12 8/9] add TC G210 platform driver Joao Pinto
` (3 subsequent siblings)
10 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-03-31 18:57 UTC (permalink / raw)
To: tomas.winkler
Cc: vinholikatti, julian.calaby, akinobu.mita, hch, gbroner,
subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland, Joao Pinto
This patch adds support for Synopsys G210 Test Chip.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
Changes v10->v12:
- Nothing changed (just to keep up with patch set version).
Changes v0->v10:
- This patch only appeared in v10
drivers/scsi/ufs/Kconfig | 4 +
drivers/scsi/ufs/Makefile | 1 +
drivers/scsi/ufs/tc-dwc-g210.c | 315 +++++++++++++++++++++++++++++++++++++++++
drivers/scsi/ufs/tc-dwc-g210.h | 19 +++
4 files changed, 339 insertions(+)
create mode 100644 drivers/scsi/ufs/tc-dwc-g210.c
create mode 100644 drivers/scsi/ufs/tc-dwc-g210.h
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index 647c324..9d218f9 100644
--- a/drivers/scsi/ufs/Kconfig
+++ b/drivers/scsi/ufs/Kconfig
@@ -86,3 +86,7 @@ config SCSI_UFS_QCOM
config SCSI_UFS_DWC
bool
+
+config SCSI_UFS_DWC_TC
+ bool
+ select SCSI_UFS_DWC
diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
index ccbad53..9468d7b 100644
--- a/drivers/scsi/ufs/Makefile
+++ b/drivers/scsi/ufs/Makefile
@@ -1,5 +1,6 @@
# UFSHCD makefile
obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
+obj-$(CONFIG_SCSI_UFS_DWC_TC) += tc-dwc-g210.o
obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
diff --git a/drivers/scsi/ufs/tc-dwc-g210.c b/drivers/scsi/ufs/tc-dwc-g210.c
new file mode 100644
index 0000000..181f208
--- /dev/null
+++ b/drivers/scsi/ufs/tc-dwc-g210.c
@@ -0,0 +1,315 @@
+/*
+ * Synopsys G210 Test Chip driver
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors: Joao Pinto <jpinto@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "ufshcd.h"
+#include "unipro.h"
+
+#include "ufshcd-dwc.h"
+#include "ufshci-dwc.h"
+
+/**
+ * tc_dwc_g210_setup_40bit_rmmi()
+ * This function configures Synopsys TC specific atributes (40-bit RMMI)
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success or non-zero value on failure
+ */
+static int tc_dwc_g210_setup_40bit_rmmi(struct ufs_hba *hba)
+{
+ const struct ufshcd_dme_attr_val setup_attrs[] = {
+ { UIC_ARG_MIB(TX_GLOBALHIBERNATE), 0x00, DME_LOCAL },
+ { UIC_ARG_MIB(REFCLKMODE), 0x01, DME_LOCAL },
+ { UIC_ARG_MIB(CDIRECTCTRL6), 0x80, DME_LOCAL },
+ { UIC_ARG_MIB(CBDIVFACTOR), 0x08, DME_LOCAL },
+ { UIC_ARG_MIB(CBDCOCTRL5), 0x64, DME_LOCAL },
+ { UIC_ARG_MIB(CBPRGTUNING), 0x09, DME_LOCAL },
+ { UIC_ARG_MIB(RTOBSERVESELECT), 0x00, DME_LOCAL },
+ { UIC_ARG_MIB_SEL(TX_REFCLKFREQ, SELIND_LN0_TX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(TX_CFGCLKFREQVAL, SELIND_LN0_TX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGEXTRATTR, SELIND_LN0_TX), 0x14,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(DITHERCTRL2, SELIND_LN0_TX), 0xd6,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RX_REFCLKFREQ, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RX_CFGCLKFREQVAL, SELIND_LN0_RX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGWIDEINLN, SELIND_LN0_RX), 4,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN0_RX), 0x80,
+ DME_LOCAL },
+ { UIC_ARG_MIB(DIRECTCTRL10), 0x04, DME_LOCAL },
+ { UIC_ARG_MIB(DIRECTCTRL19), 0x02, DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN0_RX), 0x80,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG4, SELIND_LN0_RX), 0x03,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR8, SELIND_LN0_RX), 0x16,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXDIRECTCTRL2, SELIND_LN0_RX), 0x42,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG3, SELIND_LN0_RX), 0xa4,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXCALCTRL, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG2, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR4, SELIND_LN0_RX), 0x28,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXSQCTRL, SELIND_LN0_RX), 0x1E,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN0_RX), 0x2f,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN0_RX), 0x2f,
+ DME_LOCAL },
+ { UIC_ARG_MIB(CBPRGPLL2), 0x00, DME_LOCAL },
+ };
+
+ return ufshcd_dwc_dme_set_attrs(hba, setup_attrs,
+ ARRAY_SIZE(setup_attrs));
+}
+
+/**
+ * tc_dwc_g210_setup_20bit_rmmi_lane0()
+ * This function configures Synopsys TC 20-bit RMMI Lane 0
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success or non-zero value on failure
+ */
+static int tc_dwc_g210_setup_20bit_rmmi_lane0(struct ufs_hba *hba)
+{
+ const struct ufshcd_dme_attr_val setup_attrs[] = {
+ { UIC_ARG_MIB_SEL(TX_REFCLKFREQ, SELIND_LN0_TX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(TX_CFGCLKFREQVAL, SELIND_LN0_TX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RX_CFGCLKFREQVAL, SELIND_LN0_RX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGEXTRATTR, SELIND_LN0_TX), 0x12,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(DITHERCTRL2, SELIND_LN0_TX), 0xd6,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RX_REFCLKFREQ, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGWIDEINLN, SELIND_LN0_RX), 2,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN0_RX), 0x80,
+ DME_LOCAL },
+ { UIC_ARG_MIB(DIRECTCTRL10), 0x04, DME_LOCAL },
+ { UIC_ARG_MIB(DIRECTCTRL19), 0x02, DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG4, SELIND_LN0_RX), 0x03,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR8, SELIND_LN0_RX), 0x16,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXDIRECTCTRL2, SELIND_LN0_RX), 0x42,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG3, SELIND_LN0_RX), 0xa4,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXCALCTRL, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG2, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR4, SELIND_LN0_RX), 0x28,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXSQCTRL, SELIND_LN0_RX), 0x1E,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN0_RX), 0x2f,
+ DME_LOCAL },
+ { UIC_ARG_MIB(CBPRGPLL2), 0x00, DME_LOCAL },
+ };
+
+ return ufshcd_dwc_dme_set_attrs(hba, setup_attrs,
+ ARRAY_SIZE(setup_attrs));
+}
+
+/**
+ * tc_dwc_g210_setup_20bit_rmmi_lane1()
+ * This function configures Synopsys TC 20-bit RMMI Lane 1
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success or non-zero value on failure
+ */
+static int tc_dwc_g210_setup_20bit_rmmi_lane1(struct ufs_hba *hba)
+{
+ int connected_rx_lanes = 0;
+ int connected_tx_lanes = 0;
+ int ret = 0;
+
+ const struct ufshcd_dme_attr_val setup_tx_attrs[] = {
+ { UIC_ARG_MIB_SEL(TX_REFCLKFREQ, SELIND_LN1_TX), 0x0d,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(TX_CFGCLKFREQVAL, SELIND_LN1_TX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGEXTRATTR, SELIND_LN1_TX), 0x12,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(DITHERCTRL2, SELIND_LN0_TX), 0xd6,
+ DME_LOCAL },
+ };
+
+ const struct ufshcd_dme_attr_val setup_rx_attrs[] = {
+ { UIC_ARG_MIB_SEL(RX_REFCLKFREQ, SELIND_LN1_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RX_CFGCLKFREQVAL, SELIND_LN1_RX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGWIDEINLN, SELIND_LN1_RX), 2,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN1_RX), 0x80,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG4, SELIND_LN1_RX), 0x03,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR8, SELIND_LN1_RX), 0x16,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXDIRECTCTRL2, SELIND_LN1_RX), 0x42,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG3, SELIND_LN1_RX), 0xa4,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXCALCTRL, SELIND_LN1_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG2, SELIND_LN1_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR4, SELIND_LN1_RX), 0x28,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXSQCTRL, SELIND_LN1_RX), 0x1E,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN1_RX), 0x2f,
+ DME_LOCAL },
+ };
+
+ /* Get the available lane count */
+ ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
+ &connected_rx_lanes);
+ ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
+ &connected_tx_lanes);
+
+ if (connected_tx_lanes == 2) {
+
+ ret = ufshcd_dwc_dme_set_attrs(hba, setup_tx_attrs,
+ ARRAY_SIZE(setup_tx_attrs));
+
+ if (ret)
+ goto out;
+ }
+
+ if (connected_rx_lanes == 2) {
+ ret = ufshcd_dwc_dme_set_attrs(hba, setup_rx_attrs,
+ ARRAY_SIZE(setup_rx_attrs));
+ }
+
+out:
+ return ret;
+}
+
+/**
+ * tc_dwc_g210_setup_20bit_rmmi()
+ * This function configures Synopsys TC specific atributes (20-bit RMMI)
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success or non-zero value on failure
+ */
+static int tc_dwc_g210_setup_20bit_rmmi(struct ufs_hba *hba)
+{
+ int ret = 0;
+
+ const struct ufshcd_dme_attr_val setup_attrs[] = {
+ { UIC_ARG_MIB(TX_GLOBALHIBERNATE), 0x00, DME_LOCAL },
+ { UIC_ARG_MIB(REFCLKMODE), 0x01, DME_LOCAL },
+ { UIC_ARG_MIB(CDIRECTCTRL6), 0xc0, DME_LOCAL },
+ { UIC_ARG_MIB(CBDIVFACTOR), 0x44, DME_LOCAL },
+ { UIC_ARG_MIB(CBDCOCTRL5), 0x64, DME_LOCAL },
+ { UIC_ARG_MIB(CBPRGTUNING), 0x09, DME_LOCAL },
+ { UIC_ARG_MIB(RTOBSERVESELECT), 0x00, DME_LOCAL },
+ };
+
+ ret = ufshcd_dwc_dme_set_attrs(hba, setup_attrs,
+ ARRAY_SIZE(setup_attrs));
+ if (ret)
+ goto out;
+
+ /* Lane 0 configuration*/
+ ret = tc_dwc_g210_setup_20bit_rmmi_lane0(hba);
+ if (ret)
+ goto out;
+
+ /* Lane 1 configuration*/
+ ret = tc_dwc_g210_setup_20bit_rmmi_lane1(hba);
+ if (ret)
+ goto out;
+
+out:
+ return ret;
+}
+
+/**
+ * tc_dwc_g210_config_40_bit()
+ * This function configures Local (host) Synopsys 40-bit TC specific attributes
+ *
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success non-zero value on failure
+ */
+int tc_dwc_g210_config_40_bit(struct ufs_hba *hba)
+{
+ int ret = 0;
+
+ dev_info(hba->dev, "Configuring Test Chip 40-bit RMMI\n");
+ ret = tc_dwc_g210_setup_40bit_rmmi(hba);
+ if (ret) {
+ dev_err(hba->dev, "Configuration failed\n");
+ goto out;
+ }
+
+ /* To write Shadow register bank to effective configuration block */
+ ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01);
+ if (ret)
+ goto out;
+
+ /* To configure Debug OMC */
+ ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_DEBUGOMC), 0x01);
+
+out:
+ return ret;
+}
+EXPORT_SYMBOL(tc_dwc_g210_config_40_bit);
+
+/**
+ * tc_dwc_g210_config_20_bit()
+ * This function configures Local (host) Synopsys 20-bit TC specific attributes
+ *
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success non-zero value on failure
+ */
+int tc_dwc_g210_config_20_bit(struct ufs_hba *hba)
+{
+ int ret = 0;
+
+ dev_info(hba->dev, "Configuring Test Chip 20-bit RMMI\n");
+ ret = tc_dwc_g210_setup_20bit_rmmi(hba);
+ if (ret) {
+ dev_err(hba->dev, "Configuration failed\n");
+ goto out;
+ }
+
+ /* To write Shadow register bank to effective configuration block */
+ ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01);
+ if (ret)
+ goto out;
+
+ /* To configure Debug OMC */
+ ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_DEBUGOMC), 0x01);
+
+out:
+ return ret;
+}
+EXPORT_SYMBOL(tc_dwc_g210_config_20_bit);
diff --git a/drivers/scsi/ufs/tc-dwc-g210.h b/drivers/scsi/ufs/tc-dwc-g210.h
new file mode 100644
index 0000000..fb177db
--- /dev/null
+++ b/drivers/scsi/ufs/tc-dwc-g210.h
@@ -0,0 +1,19 @@
+/*
+ * Synopsys G210 Test Chip driver
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors: Joao Pinto <jpinto@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _TC_DWC_G210_H
+#define _TC_DWC_G210_H
+
+int tc_dwc_g210_config_40_bit(struct ufs_hba *hba);
+int tc_dwc_g210_config_20_bit(struct ufs_hba *hba);
+
+#endif /* End of Header */
--
1.8.1.5
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v12 8/9] add TC G210 platform driver
2016-03-31 18:57 [PATCH v12 0/9] add support for DWC UFS Controller Joao Pinto
` (6 preceding siblings ...)
2016-03-31 18:57 ` [PATCH v12 7/9] added support for Synopsys G210 Test Chip Joao Pinto
@ 2016-03-31 18:57 ` Joao Pinto
2016-04-04 5:15 ` Rob Herring
2016-03-31 18:57 ` [PATCH v12 9/9] add TC G210 pci driver Joao Pinto
` (2 subsequent siblings)
10 siblings, 1 reply; 30+ messages in thread
From: Joao Pinto @ 2016-03-31 18:57 UTC (permalink / raw)
To: tomas.winkler
Cc: vinholikatti, julian.calaby, akinobu.mita, hch, gbroner,
subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland, Joao Pinto
This patch adds a glue platform driver for the Synopsys G210 Test Chip.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
Changes v11->v12 (Tomas Winkler):
- custom_phy_initialization replaced by phy_initialization
Changes v10->v11 (Arnd Bergmann):
- vops structs are now passed in .data
Changes v0->v10:
- This patch only appeared in v10
.../devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 +++++
drivers/scsi/ufs/Kconfig | 9 ++
drivers/scsi/ufs/Makefile | 1 +
drivers/scsi/ufs/tc-dwc-g210-pltfrm.c | 113 +++++++++++++++++++++
4 files changed, 149 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
diff --git a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
new file mode 100644
index 0000000..6ec9647
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
@@ -0,0 +1,26 @@
+* Universal Flash Storage (UFS) DesignWare Host Controller
+
+DWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY.
+Each UFS controller instance should have its own node.
+
+Required properties:
+- compatible : compatible list must contain the PHY type & version:
+ "snps, g210-tc-6.00-20bit"
+ "snps, g210-tc-6.00-40bit"
+ complemented with the Controller IP version:
+ "snps, dwc-ufshcd-1.40a"
+ complemented with the JEDEC version:
+ "jedec,ufs-1.1"
+ "jedec,ufs-2.0"
+
+- reg : <registers mapping>
+- interrupts : <interrupt mapping for UFS host controller IRQ>
+
+Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
+ dwc_ufs@d0000000 {
+ compatible = "snps, g210-tc-6.00-40bit",
+ "snps, dwc-ufshcd-1.40a",
+ "jedec,ufs-2.0";
+ reg = < 0xd0000000 0x10000 >;
+ interrupts = < 24 >;
+ };
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index 9d218f9..5cfa87b 100644
--- a/drivers/scsi/ufs/Kconfig
+++ b/drivers/scsi/ufs/Kconfig
@@ -90,3 +90,12 @@ config SCSI_UFS_DWC
config SCSI_UFS_DWC_TC
bool
select SCSI_UFS_DWC
+
+config SCSI_UFS_DWC_TC_PLATFORM
+ tristate "DesignWare platform support using a G210 Test Chip"
+ depends on SCSI_UFSHCD_PLATFORM
+ select SCSI_UFS_DWC_TC
+ ---help---
+ Synopsys Test Chip is a PHY for prototyping purposes.
+
+ If unsure, say N."
diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
index 9468d7b..a977fe0 100644
--- a/drivers/scsi/ufs/Makefile
+++ b/drivers/scsi/ufs/Makefile
@@ -1,6 +1,7 @@
# UFSHCD makefile
obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
obj-$(CONFIG_SCSI_UFS_DWC_TC) += tc-dwc-g210.o
+obj-$(CONFIG_SCSI_UFS_DWC_TC_PLATFORM) += tc-dwc-g210-pltfrm.o
obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
diff --git a/drivers/scsi/ufs/tc-dwc-g210-pltfrm.c b/drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
new file mode 100644
index 0000000..1193a30
--- /dev/null
+++ b/drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
@@ -0,0 +1,113 @@
+/*
+ * Synopsys G210 Test Chip driver
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors: Joao Pinto <jpinto@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/delay.h>
+
+#include "ufshcd-pltfrm.h"
+#include "ufshcd-dwc.h"
+#include "tc-dwc-g210.h"
+
+/**
+ * UFS DWC specific variant operations
+ */
+static struct ufs_hba_variant_ops tc_dwc_g210_20bit_pltfm_hba_vops = {
+ .name = "tc-dwc-g210-pltfm",
+ .link_startup_notify = ufshcd_dwc_link_startup_notify,
+ .phy_initialization = tc_dwc_g210_config_20_bit,
+};
+
+static struct ufs_hba_variant_ops tc_dwc_g210_40bit_pltfm_hba_vops = {
+ .name = "tc-dwc-g210-pltfm",
+ .link_startup_notify = ufshcd_dwc_link_startup_notify,
+ .phy_initialization = tc_dwc_g210_config_40_bit,
+};
+
+static const struct of_device_id tc_dwc_g210_pltfm_match[] = {
+ {
+ .compatible = "snps, g210-tc-6.00-20bit",
+ .data = &tc_dwc_g210_20bit_pltfm_hba_vops,
+ },
+ {
+ .compatible = "snps, g210-tc-6.00-40bit",
+ .data = &tc_dwc_g210_40bit_pltfm_hba_vops,
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, tc_dwc_g210_pltfm_match);
+
+/**
+ * tc_dwc_g210_pltfm_probe()
+ * @pdev: pointer to platform device structure
+ *
+ */
+static int tc_dwc_g210_pltfm_probe(struct platform_device *pdev)
+{
+ int err;
+ const struct of_device_id *of_id;
+ struct ufs_hba_variant_ops *vops;
+ struct device *dev = &pdev->dev;
+
+ of_id = of_match_node(tc_dwc_g210_pltfm_match, dev->of_node);
+ vops = (struct ufs_hba_variant_ops *)of_id->data;
+
+ /* Perform generic probe */
+ err = ufshcd_pltfrm_init(pdev, vops);
+ if (err)
+ dev_err(dev, "ufshcd_pltfrm_init() failed %d\n", err);
+
+ return err;
+}
+
+/**
+ * tc_dwc_g210_pltfm_remove()
+ * @pdev: pointer to platform device structure
+ *
+ */
+static int tc_dwc_g210_pltfm_remove(struct platform_device *pdev)
+{
+ struct ufs_hba *hba = platform_get_drvdata(pdev);
+
+ pm_runtime_get_sync(&(pdev)->dev);
+ ufshcd_remove(hba);
+
+ return 0;
+}
+
+static const struct dev_pm_ops tc_dwc_g210_pltfm_pm_ops = {
+ .suspend = ufshcd_pltfrm_suspend,
+ .resume = ufshcd_pltfrm_resume,
+ .runtime_suspend = ufshcd_pltfrm_runtime_suspend,
+ .runtime_resume = ufshcd_pltfrm_runtime_resume,
+ .runtime_idle = ufshcd_pltfrm_runtime_idle,
+};
+
+static struct platform_driver tc_dwc_g210_pltfm_driver = {
+ .probe = tc_dwc_g210_pltfm_probe,
+ .remove = tc_dwc_g210_pltfm_remove,
+ .shutdown = ufshcd_pltfrm_shutdown,
+ .driver = {
+ .name = "tc-dwc-g210-pltfm",
+ .pm = &tc_dwc_g210_pltfm_pm_ops,
+ .of_match_table = of_match_ptr(tc_dwc_g210_pltfm_match),
+ },
+};
+
+module_platform_driver(tc_dwc_g210_pltfm_driver);
+
+MODULE_ALIAS("platform:tc-dwc-g210-pltfm");
+MODULE_DESCRIPTION("Synopsys Test Chip G210 platform glue driver");
+MODULE_AUTHOR("Joao Pinto <Joao.Pinto@synopsys.com>");
+MODULE_LICENSE("Dual BSD/GPL");
--
1.8.1.5
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v12 8/9] add TC G210 platform driver
2016-03-31 18:57 ` [PATCH v12 8/9] add TC G210 platform driver Joao Pinto
@ 2016-04-04 5:15 ` Rob Herring
2016-04-04 10:48 ` Joao Pinto
0 siblings, 1 reply; 30+ messages in thread
From: Rob Herring @ 2016-04-04 5:15 UTC (permalink / raw)
To: Joao Pinto
Cc: tomas.winkler, vinholikatti, julian.calaby, akinobu.mita, hch,
gbroner, subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland
On Thu, Mar 31, 2016 at 07:57:21PM +0100, Joao Pinto wrote:
> This patch adds a glue platform driver for the Synopsys G210 Test Chip.
>
> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
> ---
> Changes v11->v12 (Tomas Winkler):
> - custom_phy_initialization replaced by phy_initialization
> Changes v10->v11 (Arnd Bergmann):
> - vops structs are now passed in .data
> Changes v0->v10:
> - This patch only appeared in v10
>
> .../devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 +++++
> drivers/scsi/ufs/Kconfig | 9 ++
> drivers/scsi/ufs/Makefile | 1 +
> drivers/scsi/ufs/tc-dwc-g210-pltfrm.c | 113 +++++++++++++++++++++
> 4 files changed, 149 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
> create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
>
> diff --git a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
> new file mode 100644
> index 0000000..6ec9647
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
> @@ -0,0 +1,26 @@
> +* Universal Flash Storage (UFS) DesignWare Host Controller
> +
> +DWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY.
> +Each UFS controller instance should have its own node.
> +
> +Required properties:
> +- compatible : compatible list must contain the PHY type & version:
> + "snps, g210-tc-6.00-20bit"
> + "snps, g210-tc-6.00-40bit"
Remove the space ^
> + complemented with the Controller IP version:
> + "snps, dwc-ufshcd-1.40a"
ditto
Combining the phy and controller compatible strings is a bit strange.
Generally, they would be separate nodes using the common phy binding.
> + complemented with the JEDEC version:
> + "jedec,ufs-1.1"
> + "jedec,ufs-2.0"
> +
> +- reg : <registers mapping>
> +- interrupts : <interrupt mapping for UFS host controller IRQ>
> +
> +Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
> + dwc_ufs@d0000000 {
No underscores please.
> + compatible = "snps, g210-tc-6.00-40bit",
> + "snps, dwc-ufshcd-1.40a",
> + "jedec,ufs-2.0";
> + reg = < 0xd0000000 0x10000 >;
> + interrupts = < 24 >;
> + };
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v12 8/9] add TC G210 platform driver
2016-04-04 5:15 ` Rob Herring
@ 2016-04-04 10:48 ` Joao Pinto
0 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-04-04 10:48 UTC (permalink / raw)
To: Rob Herring, Joao Pinto
Cc: tomas.winkler, vinholikatti, julian.calaby, akinobu.mita, hch,
gbroner, subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland
Hi Rob,
On 4/4/2016 6:15 AM, Rob Herring wrote:
> On Thu, Mar 31, 2016 at 07:57:21PM +0100, Joao Pinto wrote:
>> This patch adds a glue platform driver for the Synopsys G210 Test Chip.
>>
>> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
>> ---
[snip]
>> +
>> +Required properties:
>> +- compatible : compatible list must contain the PHY type & version:
>> + "snps, g210-tc-6.00-20bit"
>> + "snps, g210-tc-6.00-40bit"
> Remove the space ^
>
>> + complemented with the Controller IP version:
>> + "snps, dwc-ufshcd-1.40a"
>
> ditto
Ok, will do that!
>
> Combining the phy and controller compatible strings is a bit strange.
> Generally, they would be separate nodes using the common phy binding.
>
Correct, but in this case is just the compatibility string is just to tell the
dw ufs host that it has a 40-bit or a 20-bit test chip connected. The Test chip
is initialized by a unipro command sequence and there is no more ops related to it.
>> + complemented with the JEDEC version:
>> + "jedec,ufs-1.1"
>> + "jedec,ufs-2.0"
>> +
>> +- reg : <registers mapping>
>> +- interrupts : <interrupt mapping for UFS host controller IRQ>
>> +
>> +Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
>> + dwc_ufs@d0000000 {
>
> No underscores please.
Ok, will update it.
>
>> + compatible = "snps, g210-tc-6.00-40bit",
>> + "snps, dwc-ufshcd-1.40a",
>> + "jedec,ufs-2.0";
>> + reg = < 0xd0000000 0x10000 >;
>> + interrupts = < 24 >;
>> + };
>
Will send a v13 with these tweaks.
Thanks.
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v12 8/9] add TC G210 platform driver
@ 2016-04-04 10:48 ` Joao Pinto
0 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-04-04 10:48 UTC (permalink / raw)
To: Rob Herring, Joao Pinto
Cc: tomas.winkler, vinholikatti, julian.calaby, akinobu.mita, hch,
gbroner, subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland
Hi Rob,
On 4/4/2016 6:15 AM, Rob Herring wrote:
> On Thu, Mar 31, 2016 at 07:57:21PM +0100, Joao Pinto wrote:
>> This patch adds a glue platform driver for the Synopsys G210 Test Chip.
>>
>> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
>> ---
[snip]
>> +
>> +Required properties:
>> +- compatible : compatible list must contain the PHY type & version:
>> + "snps, g210-tc-6.00-20bit"
>> + "snps, g210-tc-6.00-40bit"
> Remove the space ^
>
>> + complemented with the Controller IP version:
>> + "snps, dwc-ufshcd-1.40a"
>
> ditto
Ok, will do that!
>
> Combining the phy and controller compatible strings is a bit strange.
> Generally, they would be separate nodes using the common phy binding.
>
Correct, but in this case is just the compatibility string is just to tell the
dw ufs host that it has a 40-bit or a 20-bit test chip connected. The Test chip
is initialized by a unipro command sequence and there is no more ops related to it.
>> + complemented with the JEDEC version:
>> + "jedec,ufs-1.1"
>> + "jedec,ufs-2.0"
>> +
>> +- reg : <registers mapping>
>> +- interrupts : <interrupt mapping for UFS host controller IRQ>
>> +
>> +Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
>> + dwc_ufs@d0000000 {
>
> No underscores please.
Ok, will update it.
>
>> + compatible = "snps, g210-tc-6.00-40bit",
>> + "snps, dwc-ufshcd-1.40a",
>> + "jedec,ufs-2.0";
>> + reg = < 0xd0000000 0x10000 >;
>> + interrupts = < 24 >;
>> + };
>
Will send a v13 with these tweaks.
Thanks.
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v12 8/9] add TC G210 platform driver
2016-04-04 10:48 ` Joao Pinto
(?)
@ 2016-04-07 17:57 ` Rob Herring
2016-04-08 9:13 ` Joao Pinto
-1 siblings, 1 reply; 30+ messages in thread
From: Rob Herring @ 2016-04-07 17:57 UTC (permalink / raw)
To: Joao Pinto
Cc: tomas.winkler, vinholikatti, julian.calaby, akinobu.mita, hch,
gbroner, subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland
On Mon, Apr 04, 2016 at 11:48:23AM +0100, Joao Pinto wrote:
>
> Hi Rob,
>
> On 4/4/2016 6:15 AM, Rob Herring wrote:
> > On Thu, Mar 31, 2016 at 07:57:21PM +0100, Joao Pinto wrote:
> >> This patch adds a glue platform driver for the Synopsys G210 Test Chip.
> >>
> >> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
> >> ---
>
> [snip]
>
> >> +
> >> +Required properties:
> >> +- compatible : compatible list must contain the PHY type & version:
> >> + "snps, g210-tc-6.00-20bit"
> >> + "snps, g210-tc-6.00-40bit"
> > Remove the space ^
> >
> >> + complemented with the Controller IP version:
> >> + "snps, dwc-ufshcd-1.40a"
> >
> > ditto
>
> Ok, will do that!
>
> >
> > Combining the phy and controller compatible strings is a bit strange.
> > Generally, they would be separate nodes using the common phy binding.
> >
>
> Correct, but in this case is just the compatibility string is just to tell the
> dw ufs host that it has a 40-bit or a 20-bit test chip connected. The Test chip
> is initialized by a unipro command sequence and there is no more ops related to it.
Okay. In that case, I think it should be a separate property unless the
controller h/w is synthesized for one or the other.
Rob
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v12 8/9] add TC G210 platform driver
2016-04-07 17:57 ` Rob Herring
@ 2016-04-08 9:13 ` Joao Pinto
0 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-04-08 9:13 UTC (permalink / raw)
To: Rob Herring, Joao Pinto
Cc: tomas.winkler, vinholikatti, julian.calaby, akinobu.mita, hch,
gbroner, subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland
Hi Rob,
On 4/7/2016 6:57 PM, Rob Herring wrote:
> On Mon, Apr 04, 2016 at 11:48:23AM +0100, Joao Pinto wrote:
>>
>> Hi Rob,
>>
>> On 4/4/2016 6:15 AM, Rob Herring wrote:
>>> On Thu, Mar 31, 2016 at 07:57:21PM +0100, Joao Pinto wrote:
>>>> This patch adds a glue platform driver for the Synopsys G210 Test Chip.
>>>>
>>>> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
>>>> ---
>>
>> [snip]
>>
>>>> +
>>>> +Required properties:
>>>> +- compatible : compatible list must contain the PHY type & version:
>>>> + "snps, g210-tc-6.00-20bit"
>>>> + "snps, g210-tc-6.00-40bit"
>>> Remove the space ^
>>>
>>>> + complemented with the Controller IP version:
>>>> + "snps, dwc-ufshcd-1.40a"
>>>
>>> ditto
>>
>> Ok, will do that!
>>
>>>
>>> Combining the phy and controller compatible strings is a bit strange.
>>> Generally, they would be separate nodes using the common phy binding.
>>>
>>
>> Correct, but in this case is just the compatibility string is just to tell the
>> dw ufs host that it has a 40-bit or a 20-bit test chip connected. The Test chip
>> is initialized by a unipro command sequence and there is no more ops related to it.
>
> Okay. In that case, I think it should be a separate property unless the
> controller h/w is synthesized for one or the other.
Yes, the hardware must be synthesized for a certain PHY type, 20 or 40-bit.
>
> Rob
>
Joao
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v12 8/9] add TC G210 platform driver
@ 2016-04-08 9:13 ` Joao Pinto
0 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-04-08 9:13 UTC (permalink / raw)
To: Rob Herring, Joao Pinto
Cc: tomas.winkler-ral2JQCrhuEAvxtiuMwx3w,
vinholikatti-Re5JQEeQqe8AvxtiuMwx3w,
julian.calaby-Re5JQEeQqe8AvxtiuMwx3w,
akinobu.mita-Re5JQEeQqe8AvxtiuMwx3w, hch-wEGCiKHe2LqWVfeAwA7xHQ,
gbroner-sgV2jX0FEOL9JmXXK+q4OQ, subhashj-sgV2jX0FEOL9JmXXK+q4OQ,
CARLOS.PALMINHA-HKixBCOQz3hWk0Htik3J/w,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-scsi-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, arnd-r2nGTMty4D4,
mark.rutland-5wv7dgnIgG8
Hi Rob,
On 4/7/2016 6:57 PM, Rob Herring wrote:
> On Mon, Apr 04, 2016 at 11:48:23AM +0100, Joao Pinto wrote:
>>
>> Hi Rob,
>>
>> On 4/4/2016 6:15 AM, Rob Herring wrote:
>>> On Thu, Mar 31, 2016 at 07:57:21PM +0100, Joao Pinto wrote:
>>>> This patch adds a glue platform driver for the Synopsys G210 Test Chip.
>>>>
>>>> Signed-off-by: Joao Pinto <jpinto-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
>>>> ---
>>
>> [snip]
>>
>>>> +
>>>> +Required properties:
>>>> +- compatible : compatible list must contain the PHY type & version:
>>>> + "snps, g210-tc-6.00-20bit"
>>>> + "snps, g210-tc-6.00-40bit"
>>> Remove the space ^
>>>
>>>> + complemented with the Controller IP version:
>>>> + "snps, dwc-ufshcd-1.40a"
>>>
>>> ditto
>>
>> Ok, will do that!
>>
>>>
>>> Combining the phy and controller compatible strings is a bit strange.
>>> Generally, they would be separate nodes using the common phy binding.
>>>
>>
>> Correct, but in this case is just the compatibility string is just to tell the
>> dw ufs host that it has a 40-bit or a 20-bit test chip connected. The Test chip
>> is initialized by a unipro command sequence and there is no more ops related to it.
>
> Okay. In that case, I think it should be a separate property unless the
> controller h/w is synthesized for one or the other.
Yes, the hardware must be synthesized for a certain PHY type, 20 or 40-bit.
>
> Rob
>
Joao
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^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v12 9/9] add TC G210 pci driver
2016-03-31 18:57 [PATCH v12 0/9] add support for DWC UFS Controller Joao Pinto
` (7 preceding siblings ...)
2016-03-31 18:57 ` [PATCH v12 8/9] add TC G210 platform driver Joao Pinto
@ 2016-03-31 18:57 ` Joao Pinto
2016-04-04 23:34 ` [PATCH v13 0/9] add support for DWC UFS Controller Martin K. Petersen
2016-04-15 14:09 ` [PATCH v14 " Hannes Reinecke
10 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-03-31 18:57 UTC (permalink / raw)
To: tomas.winkler
Cc: vinholikatti, julian.calaby, akinobu.mita, hch, gbroner,
subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland, Joao Pinto
This patch adds a glue pci driver for the Synopsys G210 Test Chip.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
Changes v10->v12 (Tomas Winkler):
- custom_phy_initialization replaced by phy_initialization
Changes v10->v11 (Arnd Bergmann):
- tc_type is now initialized to TC_G210_INV
- probe function checks if the test chip version is specified
Changes v0->v10:
- This patch only appeared in v10
drivers/scsi/ufs/Kconfig | 9 ++
drivers/scsi/ufs/Makefile | 1 +
drivers/scsi/ufs/tc-dwc-g210-pci.c | 181 +++++++++++++++++++++++++++++++++++++
3 files changed, 191 insertions(+)
create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pci.c
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index 5cfa87b..5a3fde7 100644
--- a/drivers/scsi/ufs/Kconfig
+++ b/drivers/scsi/ufs/Kconfig
@@ -99,3 +99,12 @@ config SCSI_UFS_DWC_TC_PLATFORM
Synopsys Test Chip is a PHY for prototyping purposes.
If unsure, say N."
+
+config SCSI_UFS_DWC_TC_PCI
+ tristate "DesignWare pci support using a G210 Test Chip"
+ depends on SCSI_UFSHCD_PCI
+ select SCSI_UFS_DWC_TC
+ ---help---
+ Synopsys Test Chip is a PHY for prototyping purposes.
+
+ If unsure, say N."
diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
index a977fe0..5303d85 100644
--- a/drivers/scsi/ufs/Makefile
+++ b/drivers/scsi/ufs/Makefile
@@ -2,6 +2,7 @@
obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
obj-$(CONFIG_SCSI_UFS_DWC_TC) += tc-dwc-g210.o
obj-$(CONFIG_SCSI_UFS_DWC_TC_PLATFORM) += tc-dwc-g210-pltfrm.o
+obj-$(CONFIG_SCSI_UFS_DWC_TC_PCI) += tc-dwc-g210-pci.o
obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
diff --git a/drivers/scsi/ufs/tc-dwc-g210-pci.c b/drivers/scsi/ufs/tc-dwc-g210-pci.c
new file mode 100644
index 0000000..0667c76
--- /dev/null
+++ b/drivers/scsi/ufs/tc-dwc-g210-pci.c
@@ -0,0 +1,181 @@
+/*
+ * Synopsys G210 Test Chip driver
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors: Joao Pinto <jpinto@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "ufshcd.h"
+#include "ufshcd-dwc.h"
+#include "tc-dwc-g210.h"
+
+#include <linux/pci.h>
+#include <linux/pm_runtime.h>
+
+/* Test Chip type expected values */
+#define TC_G210_20BIT 20
+#define TC_G210_40BIT 40
+#define TC_G210_INV 0
+
+static int tc_type = TC_G210_INV;
+module_param(tc_type, int, 0);
+MODULE_PARM_DESC(tc_type, "Test Chip Type (20 = 20-bit, 40 = 40-bit)");
+
+static int tc_dwc_g210_pci_suspend(struct device *dev)
+{
+ return ufshcd_system_suspend(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_resume(struct device *dev)
+{
+ return ufshcd_system_resume(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_runtime_suspend(struct device *dev)
+{
+ return ufshcd_runtime_suspend(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_runtime_resume(struct device *dev)
+{
+ return ufshcd_runtime_resume(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_runtime_idle(struct device *dev)
+{
+ return ufshcd_runtime_idle(dev_get_drvdata(dev));
+}
+
+/**
+ * struct ufs_hba_dwc_vops - UFS DWC specific variant operations
+ */
+static struct ufs_hba_variant_ops tc_dwc_g210_pci_hba_vops = {
+ .name = "tc-dwc-g210-pci",
+ .link_startup_notify = ufshcd_dwc_link_startup_notify,
+};
+
+/**
+ * tc_dwc_g210_pci_shutdown - main function to put the controller in reset state
+ * @pdev: pointer to PCI device handle
+ */
+static void tc_dwc_g210_pci_shutdown(struct pci_dev *pdev)
+{
+ ufshcd_shutdown((struct ufs_hba *)pci_get_drvdata(pdev));
+}
+
+/**
+ * tc_dwc_g210_pci_remove - de-allocate PCI/SCSI host and host memory space
+ * data structure memory
+ * @pdev - pointer to PCI handle
+ */
+static void tc_dwc_g210_pci_remove(struct pci_dev *pdev)
+{
+ struct ufs_hba *hba = pci_get_drvdata(pdev);
+
+ pm_runtime_forbid(&pdev->dev);
+ pm_runtime_get_noresume(&pdev->dev);
+ ufshcd_remove(hba);
+}
+
+/**
+ * tc_dwc_g210_pci_probe - probe routine of the driver
+ * @pdev: pointer to PCI device handle
+ * @id: PCI device id
+ *
+ * Returns 0 on success, non-zero value on failure
+ */
+static int
+tc_dwc_g210_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+ struct ufs_hba *hba;
+ void __iomem *mmio_base;
+ int err;
+
+ /* Check Test Chip type and set the specific setup routine */
+ if (tc_type == TC_G210_20BIT) {
+ tc_dwc_g210_pci_hba_vops.phy_initialization =
+ tc_dwc_g210_config_20_bit;
+ } else if (tc_type == TC_G210_40BIT) {
+ tc_dwc_g210_pci_hba_vops.phy_initialization =
+ tc_dwc_g210_config_40_bit;
+ } else {
+ dev_err(&pdev->dev, "test chip version not specified\n");
+ return -EPERM;
+ }
+
+ err = pcim_enable_device(pdev);
+ if (err) {
+ dev_err(&pdev->dev, "pcim_enable_device failed\n");
+ return err;
+ }
+
+ pci_set_master(pdev);
+
+ err = pcim_iomap_regions(pdev, 1 << 0, UFSHCD);
+ if (err < 0) {
+ dev_err(&pdev->dev, "request and iomap failed\n");
+ return err;
+ }
+
+ mmio_base = pcim_iomap_table(pdev)[0];
+
+ err = ufshcd_alloc_host(&pdev->dev, &hba);
+ if (err) {
+ dev_err(&pdev->dev, "Allocation failed\n");
+ return err;
+ }
+
+ INIT_LIST_HEAD(&hba->clk_list_head);
+
+ hba->vops = &tc_dwc_g210_pci_hba_vops;
+
+ err = ufshcd_init(hba, mmio_base, pdev->irq);
+ if (err) {
+ dev_err(&pdev->dev, "Initialization failed\n");
+ return err;
+ }
+
+ pci_set_drvdata(pdev, hba);
+ pm_runtime_put_noidle(&pdev->dev);
+ pm_runtime_allow(&pdev->dev);
+
+ return 0;
+}
+
+static const struct dev_pm_ops tc_dwc_g210_pci_pm_ops = {
+ .suspend = tc_dwc_g210_pci_suspend,
+ .resume = tc_dwc_g210_pci_resume,
+ .runtime_suspend = tc_dwc_g210_pci_runtime_suspend,
+ .runtime_resume = tc_dwc_g210_pci_runtime_resume,
+ .runtime_idle = tc_dwc_g210_pci_runtime_idle,
+};
+
+static const struct pci_device_id tc_dwc_g210_pci_tbl[] = {
+ { PCI_VENDOR_ID_SYNOPSYS, 0xB101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+ { PCI_VENDOR_ID_SYNOPSYS, 0xB102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+ { } /* terminate list */
+};
+
+MODULE_DEVICE_TABLE(pci, tc_dwc_g210_pci_tbl);
+
+static struct pci_driver tc_dwc_g210_pci_driver = {
+ .name = UFSHCD,
+ .id_table = tc_dwc_g210_pci_tbl,
+ .probe = tc_dwc_g210_pci_probe,
+ .remove = tc_dwc_g210_pci_remove,
+ .shutdown = tc_dwc_g210_pci_shutdown,
+ .driver = {
+ .pm = &tc_dwc_g210_pci_pm_ops
+ },
+};
+
+module_pci_driver(tc_dwc_g210_pci_driver);
+
+MODULE_AUTHOR("Joao Pinto <Joao.Pinto@synopsys.com>");
+MODULE_DESCRIPTION("Synopsys Test Chip G210 PCI glue driver");
+MODULE_LICENSE("Dual BSD/GPL");
--
1.8.1.5
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v13 0/9] add support for DWC UFS Controller
2016-03-31 18:57 [PATCH v12 0/9] add support for DWC UFS Controller Joao Pinto
` (8 preceding siblings ...)
2016-03-31 18:57 ` [PATCH v12 9/9] add TC G210 pci driver Joao Pinto
@ 2016-04-04 23:34 ` Martin K. Petersen
2016-04-05 9:09 ` Joao Pinto
2016-04-15 14:09 ` [PATCH v14 " Hannes Reinecke
10 siblings, 1 reply; 30+ messages in thread
From: Martin K. Petersen @ 2016-04-04 23:34 UTC (permalink / raw)
To: Joao Pinto
Cc: robh, tomas.winkler, martin.petersen, vinholikatti,
julian.calaby, akinobu.mita, hch, gbroner, subhashj,
CARLOS.PALMINHA, ijc+devicetree, linux-kernel, linux-scsi,
devicetree, arnd, mark.rutland
>>>>> "Joao" == Joao Pinto <Joao.Pinto@synopsys.com> writes:
Joao,
Joao> The work consisted of: - Fixed typo in ufshcd-pltfrm.c - Tweak
Joao> ufshcd.c for UFS 2.0 support - Implement ufshcd-dwc which contains
Joao> all DWC HW specific code - Unipro attributes were added and new
Joao> registers were added to the driver - Implement a tc-dwc-g210
Joao> containing G210 MPHY specific code - Implement a tc-dwc-g210 glue
Joao> platform driver - Implement a tc-dwc-g210 glue pci driver -
Joao> Documentation update
You really need to keep track of which Acked-by: and Reviewed-by: tags
you have gotten from people and apply them to patches that you haven't
changed. Otherwise we start from scratch every time you resubmit.
Thanks!
--
Martin K. Petersen Oracle Linux Engineering
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v13 0/9] add support for DWC UFS Controller
2016-04-04 23:34 ` [PATCH v13 0/9] add support for DWC UFS Controller Martin K. Petersen
@ 2016-04-05 9:09 ` Joao Pinto
0 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-04-05 9:09 UTC (permalink / raw)
To: Martin K. Petersen, Joao Pinto
Cc: robh, tomas.winkler, vinholikatti, julian.calaby, akinobu.mita,
hch, gbroner, subhashj, CARLOS.PALMINHA, ijc+devicetree,
linux-kernel, linux-scsi, devicetree, arnd, mark.rutland
Hi,
On 4/5/2016 12:34 AM, Martin K. Petersen wrote:
>>>>>> "Joao" == Joao Pinto <Joao.Pinto@synopsys.com> writes:
>
> Joao,
>
> Joao> The work consisted of: - Fixed typo in ufshcd-pltfrm.c - Tweak
> Joao> ufshcd.c for UFS 2.0 support - Implement ufshcd-dwc which contains
> Joao> all DWC HW specific code - Unipro attributes were added and new
> Joao> registers were added to the driver - Implement a tc-dwc-g210
> Joao> containing G210 MPHY specific code - Implement a tc-dwc-g210 glue
> Joao> platform driver - Implement a tc-dwc-g210 glue pci driver -
> Joao> Documentation update
>
> You really need to keep track of which Acked-by: and Reviewed-by: tags
> you have gotten from people and apply them to patches that you haven't
> changed. Otherwise we start from scratch every time you resubmit.
>
> Thanks!
>
It's ok to submit the same v13 with the ACK tags?
Joao
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v13 0/9] add support for DWC UFS Controller
@ 2016-04-05 9:09 ` Joao Pinto
0 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-04-05 9:09 UTC (permalink / raw)
To: Martin K. Petersen, Joao Pinto
Cc: robh, tomas.winkler, vinholikatti, julian.calaby, akinobu.mita,
hch, gbroner, subhashj, CARLOS.PALMINHA, ijc+devicetree,
linux-kernel, linux-scsi, devicetree, arnd, mark.rutland
Hi,
On 4/5/2016 12:34 AM, Martin K. Petersen wrote:
>>>>>> "Joao" == Joao Pinto <Joao.Pinto@synopsys.com> writes:
>
> Joao,
>
> Joao> The work consisted of: - Fixed typo in ufshcd-pltfrm.c - Tweak
> Joao> ufshcd.c for UFS 2.0 support - Implement ufshcd-dwc which contains
> Joao> all DWC HW specific code - Unipro attributes were added and new
> Joao> registers were added to the driver - Implement a tc-dwc-g210
> Joao> containing G210 MPHY specific code - Implement a tc-dwc-g210 glue
> Joao> platform driver - Implement a tc-dwc-g210 glue pci driver -
> Joao> Documentation update
>
> You really need to keep track of which Acked-by: and Reviewed-by: tags
> you have gotten from people and apply them to patches that you haven't
> changed. Otherwise we start from scratch every time you resubmit.
>
> Thanks!
>
It's ok to submit the same v13 with the ACK tags?
Joao
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH v13 0/9] add support for DWC UFS Controller
2016-04-05 9:09 ` Joao Pinto
(?)
@ 2016-04-05 10:15 ` Winkler, Tomas
2016-04-05 10:27 ` Joao Pinto
-1 siblings, 1 reply; 30+ messages in thread
From: Winkler, Tomas @ 2016-04-05 10:15 UTC (permalink / raw)
To: Joao Pinto, Martin K. Petersen
Cc: robh, vinholikatti, julian.calaby, akinobu.mita, hch, gbroner,
subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland
Hi,
On 4/5/2016 12:34 AM, Martin K. Petersen wrote:
>>>>>> "Joao" == Joao Pinto <Joao.Pinto@synopsys.com> writes:
>
> Joao,
>
> Joao> The work consisted of: - Fixed typo in ufshcd-pltfrm.c - Tweak
> Joao> ufshcd.c for UFS 2.0 support - Implement ufshcd-dwc which
> Joao> contains all DWC HW specific code - Unipro attributes were added
> Joao> and new registers were added to the driver - Implement a
> Joao> tc-dwc-g210 containing G210 MPHY specific code - Implement a
> Joao> tc-dwc-g210 glue platform driver - Implement a tc-dwc-g210 glue
> Joao> pci driver - Documentation update
>
> You really need to keep track of which Acked-by: and Reviewed-by: tags
> you have gotten from people and apply them to patches that you haven't
> changed. Otherwise we start from scratch every time you resubmit.
>
> Thanks!
>
It's ok to submit the same v13 with the ACK tags?
You can add my Ack on the core patches, not DWC specific, I didn't really look at those properly.
Thanks
Tomas
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v13 0/9] add support for DWC UFS Controller
@ 2016-04-05 10:27 ` Joao Pinto
0 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-04-05 10:27 UTC (permalink / raw)
To: Winkler, Tomas, Joao Pinto, Martin K. Petersen
Cc: robh, vinholikatti, julian.calaby, akinobu.mita, hch, gbroner,
subhashj, CARLOS.PALMINHA, ijc+devicetree, linux-kernel,
linux-scsi, devicetree, arnd, mark.rutland
On 4/5/2016 11:15 AM, Winkler, Tomas wrote:
>
> Hi,
>
> On 4/5/2016 12:34 AM, Martin K. Petersen wrote:
>>>>>>> "Joao" == Joao Pinto <Joao.Pinto@synopsys.com> writes:
>>
>> Joao,
>>
>> Joao> The work consisted of: - Fixed typo in ufshcd-pltfrm.c - Tweak
>> Joao> ufshcd.c for UFS 2.0 support - Implement ufshcd-dwc which
>> Joao> contains all DWC HW specific code - Unipro attributes were added
>> Joao> and new registers were added to the driver - Implement a
>> Joao> tc-dwc-g210 containing G210 MPHY specific code - Implement a
>> Joao> tc-dwc-g210 glue platform driver - Implement a tc-dwc-g210 glue
>> Joao> pci driver - Documentation update
>>
>> You really need to keep track of which Acked-by: and Reviewed-by: tags
>> you have gotten from people and apply them to patches that you haven't
>> changed. Otherwise we start from scratch every time you resubmit.
>>
>> Thanks!
>>
>
> It's ok to submit the same v13 with the ACK tags?
>
> You can add my Ack on the core patches, not DWC specific, I didn't really look at those properly.
> Thanks
> Tomas
Nice! Going to send a new v13 with your acks.
>
Thanks.
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v13 0/9] add support for DWC UFS Controller
@ 2016-04-05 10:27 ` Joao Pinto
0 siblings, 0 replies; 30+ messages in thread
From: Joao Pinto @ 2016-04-05 10:27 UTC (permalink / raw)
To: Winkler, Tomas, Joao Pinto, Martin K. Petersen
Cc: robh-DgEjT+Ai2ygdnm+yROfE0A, vinholikatti-Re5JQEeQqe8AvxtiuMwx3w,
julian.calaby-Re5JQEeQqe8AvxtiuMwx3w,
akinobu.mita-Re5JQEeQqe8AvxtiuMwx3w, hch-wEGCiKHe2LqWVfeAwA7xHQ,
gbroner-sgV2jX0FEOL9JmXXK+q4OQ, subhashj-sgV2jX0FEOL9JmXXK+q4OQ,
CARLOS.PALMINHA-HKixBCOQz3hWk0Htik3J/w,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-scsi-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, arnd-r2nGTMty4D4,
mark.rutland-5wv7dgnIgG8
On 4/5/2016 11:15 AM, Winkler, Tomas wrote:
>
> Hi,
>
> On 4/5/2016 12:34 AM, Martin K. Petersen wrote:
>>>>>>> "Joao" == Joao Pinto <Joao.Pinto-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> writes:
>>
>> Joao,
>>
>> Joao> The work consisted of: - Fixed typo in ufshcd-pltfrm.c - Tweak
>> Joao> ufshcd.c for UFS 2.0 support - Implement ufshcd-dwc which
>> Joao> contains all DWC HW specific code - Unipro attributes were added
>> Joao> and new registers were added to the driver - Implement a
>> Joao> tc-dwc-g210 containing G210 MPHY specific code - Implement a
>> Joao> tc-dwc-g210 glue platform driver - Implement a tc-dwc-g210 glue
>> Joao> pci driver - Documentation update
>>
>> You really need to keep track of which Acked-by: and Reviewed-by: tags
>> you have gotten from people and apply them to patches that you haven't
>> changed. Otherwise we start from scratch every time you resubmit.
>>
>> Thanks!
>>
>
> It's ok to submit the same v13 with the ACK tags?
>
> You can add my Ack on the core patches, not DWC specific, I didn't really look at those properly.
> Thanks
> Tomas
Nice! Going to send a new v13 with your acks.
>
Thanks.
--
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v14 0/9] add support for DWC UFS Controller
2016-03-31 18:57 [PATCH v12 0/9] add support for DWC UFS Controller Joao Pinto
` (9 preceding siblings ...)
2016-04-04 23:34 ` [PATCH v13 0/9] add support for DWC UFS Controller Martin K. Petersen
@ 2016-04-15 14:09 ` Hannes Reinecke
10 siblings, 0 replies; 30+ messages in thread
From: Hannes Reinecke @ 2016-04-15 14:09 UTC (permalink / raw)
To: Joao Pinto, linux-scsi
On 04/13/2016 11:04 AM, Joao Pinto wrote:
> As requested, I am sending v14 to be included in the SCSI patchwork.
>
> The work consisted of:
> - Fixed typo in ufshcd-pltfrm.c
> - Tweak ufshcd.c for UFS 2.0 support
> - Implement ufshcd-dwc which contains all DWC HW specific code
> - Unipro attributes were added and new registers were added to the driver
> - Implement a tc-dwc-g210 containing G210 MPHY specific code
> - Implement a tc-dwc-g210 glue platform driver
> - Implement a tc-dwc-g210 glue pci driver
> - Documentation update
>
> Joao Pinto (9):
> fixed typo in ufshcd-pltfrm
> add UFS 2.0 to ufshcd-pltfrm bindings
> added UFS 2.0 capabilities
> added unipro attributes
> added link status to ufshci
> added support for DesignWare Controller
> added support for Synopsys G210 Test Chip
> add TC G210 platform driver
> add TC G210 pci driver
>
For this series:
Reviewed-by: Hannes Reinecke <hare@suse.com>
Cheers,
Hannes
--
Dr. Hannes Reinecke Teamlead Storage & Networking
hare@suse.de +49 911 74053 688
SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: F. Imendörffer, J. Smithard, J. Guild, D. Upmanyu, G. Norton
HRB 21284 (AG Nürnberg)
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