From: Andre Przywara <andre.przywara@arm.com> To: Chen-Yu Tsai <wens@csie.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com>, Philipp Zabel <p.zabel@pengutronix.de>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, linux-kernel <linux-kernel@vger.kernel.org> Subject: Re: [PATCH] reset: sunxi: fix for 64-bit compilation Date: Wed, 8 Mar 2017 09:26:01 +0000 [thread overview] Message-ID: <6a0e362b-8ebf-6254-6387-12967ec8c484@arm.com> (raw) In-Reply-To: <CAGb2v64SozB9vUpotkEOyUK33ba8hq9M-QRQUEzEQ565Bhd93g@mail.gmail.com> Hi, On 08/03/17 04:28, Chen-Yu Tsai wrote: > On Mon, Mar 6, 2017 at 9:35 AM, Andre Przywara <andre.przywara@arm.com> wrote: >> The Allwinner reset controller has 32-bit registers, so translating >> the reset cell number into a register and bit offset should not use >> any architecture dependent data size. Otherwise this breaks for 64-bit >> architectures like arm64. >> Fix this by making it clear that it's the hardware register width which >> matters here in the calculation. >> >> Signed-off-by: Andre Przywara <andre.przywara@arm.com> > > Acked-by: Chen-Yu Tsai <wens@csie.org> Thanks a lot! > Though I don't expect this driver to be used with arm64 chips. Well, weren't we toying with the idea of using this for the A64 PRCM support? Also the driver is actually pretty generic, and I have (renaming) patches lying around to make this obvious. This is partly driven by a side project for some (arm64) SoC support, which can happily use that driver to tackle its device reset support. So as this is an obvious bug, I'd rather see this fixed now. Cheers, Andre.
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From: andre.przywara@arm.com (Andre Przywara) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] reset: sunxi: fix for 64-bit compilation Date: Wed, 8 Mar 2017 09:26:01 +0000 [thread overview] Message-ID: <6a0e362b-8ebf-6254-6387-12967ec8c484@arm.com> (raw) In-Reply-To: <CAGb2v64SozB9vUpotkEOyUK33ba8hq9M-QRQUEzEQ565Bhd93g@mail.gmail.com> Hi, On 08/03/17 04:28, Chen-Yu Tsai wrote: > On Mon, Mar 6, 2017 at 9:35 AM, Andre Przywara <andre.przywara@arm.com> wrote: >> The Allwinner reset controller has 32-bit registers, so translating >> the reset cell number into a register and bit offset should not use >> any architecture dependent data size. Otherwise this breaks for 64-bit >> architectures like arm64. >> Fix this by making it clear that it's the hardware register width which >> matters here in the calculation. >> >> Signed-off-by: Andre Przywara <andre.przywara@arm.com> > > Acked-by: Chen-Yu Tsai <wens@csie.org> Thanks a lot! > Though I don't expect this driver to be used with arm64 chips. Well, weren't we toying with the idea of using this for the A64 PRCM support? Also the driver is actually pretty generic, and I have (renaming) patches lying around to make this obvious. This is partly driven by a side project for some (arm64) SoC support, which can happily use that driver to tackle its device reset support. So as this is an obvious bug, I'd rather see this fixed now. Cheers, Andre.
next prev parent reply other threads:[~2017-03-08 9:35 UTC|newest] Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-03-06 1:35 [PATCH] reset: sunxi: fix for 64-bit compilation Andre Przywara 2017-03-06 1:35 ` Andre Przywara 2017-03-08 4:28 ` Chen-Yu Tsai 2017-03-08 4:28 ` Chen-Yu Tsai 2017-03-08 9:26 ` Andre Przywara [this message] 2017-03-08 9:26 ` Andre Przywara 2017-03-08 9:52 ` Philipp Zabel 2017-03-08 9:52 ` Philipp Zabel
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