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From: "Cédric Le Goater" <clg@kaod.org>
To: Peter Delevoryas <pdel@fb.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	"zev@bewilderbeest.net" <zev@bewilderbeest.net>,
	Andrew Jeffery <andrew@aj.id.au>, Iris Chen <irischenlj@fb.com>,
	OpenBMC List <openbmc@lists.ozlabs.org>,
	Cameron Esfahani via <qemu-devel@nongnu.org>,
	qemu-arm <qemu-arm@nongnu.org>, Joel Stanley <joel@jms.id.au>
Subject: Re: [PATCH 2/2] hw: aspeed: Init all UART's with serial devices
Date: Sun, 15 May 2022 23:19:26 +0200	[thread overview]
Message-ID: <7187a877-354e-5e79-7ad1-a6e368678002@kaod.org> (raw)
In-Reply-To: <5CBDFE96-B354-4EE6-BEA3-48E4CC68FBA5@fb.com>

[ ... ]

>> The problem is that it is breaking compatibility with previous QEMUs.
> 
> It is? We can still run things the old way too, I specifically
> wrote this with the intention that it would support backwards
> compatibility.

You are right. Let's start with your patchset. We can add the "uart"
machine option when the need arises.

I have sent a small cleanup of aspeed_soc_get_irq() that should avoid
the duplication of the serial init in the different SoC models. Please
give it a try.

Thanks,

C.


WARNING: multiple messages have this Message-ID (diff)
From: "Cédric Le Goater" <clg@kaod.org>
To: Peter Delevoryas <pdel@fb.com>
Cc: Iris Chen <irischenlj@fb.com>,
	"patrick@stwcx.xyz" <patrick@stwcx.xyz>,
	qemu-arm <qemu-arm@nongnu.org>,
	Cameron Esfahani via <qemu-devel@nongnu.org>,
	 "zev@bewilderbeest.net" <zev@bewilderbeest.net>,
	OpenBMC List <openbmc@lists.ozlabs.org>,
	Andrew Jeffery <andrew@aj.id.au>,
	Peter Maydell <peter.maydell@linaro.org>,
	Joel Stanley <joel@jms.id.au>
Subject: Re: [PATCH 2/2] hw: aspeed: Init all UART's with serial devices
Date: Sun, 15 May 2022 23:19:26 +0200	[thread overview]
Message-ID: <7187a877-354e-5e79-7ad1-a6e368678002@kaod.org> (raw)
In-Reply-To: <5CBDFE96-B354-4EE6-BEA3-48E4CC68FBA5@fb.com>

[ ... ]

>> The problem is that it is breaking compatibility with previous QEMUs.
> 
> It is? We can still run things the old way too, I specifically
> wrote this with the intention that it would support backwards
> compatibility.

You are right. Let's start with your patchset. We can add the "uart"
machine option when the need arises.

I have sent a small cleanup of aspeed_soc_get_irq() that should avoid
the duplication of the serial init in the different SoC models. Please
give it a try.

Thanks,

C.



  reply	other threads:[~2022-05-15 21:20 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-13  4:02 [PATCH 0/2] hw: aspeed: Init all UART's with serial devices Peter Delevoryas
2022-05-13  4:02 ` Peter Delevoryas
2022-05-13  4:02 ` [PATCH 1/2] hw: aspeed: Add missing UART's Peter Delevoryas
2022-05-13  4:02   ` Peter Delevoryas
2022-05-13  5:21   ` Cédric Le Goater
2022-05-13  5:21     ` Cédric Le Goater
2022-05-13  4:02 ` [PATCH 2/2] hw: aspeed: Init all UART's with serial devices Peter Delevoryas
2022-05-13  4:02   ` Peter Delevoryas
2022-05-13  5:31   ` Cédric Le Goater
2022-05-13  5:31     ` Cédric Le Goater
2022-05-13 21:08     ` Peter Delevoryas
2022-05-13 21:08       ` Peter Delevoryas
2022-05-14  7:30       ` Cédric Le Goater
2022-05-14  7:30         ` Cédric Le Goater
2022-05-14  7:39         ` Peter Delevoryas
2022-05-14  7:39           ` Peter Delevoryas
2022-05-15 21:19           ` Cédric Le Goater [this message]
2022-05-15 21:19             ` Cédric Le Goater
2022-05-15 22:55             ` Peter Delevoryas
2022-05-15 22:55               ` Peter Delevoryas
2022-05-16 14:56       ` Peter Maydell
2022-05-16 14:56         ` Peter Maydell
2022-05-13 21:39 ` [PATCH 0/2] " Zev Weiss
2022-05-13 21:39   ` Zev Weiss

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