[PATCH] musl: don't compile in mips16e mode

[PATCH] musl: don't compile in mips16e mode

[git]

From: André Draszik <adraszik@tycoint.com>

musl contains hand-written assembly which is not compatible with
the MIPS16e mode.

Signed-off-by: André Draszik <adraszik@tycoint.com>
---
 meta/recipes-core/musl/musl.inc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/meta/recipes-core/musl/musl.inc b/meta/recipes-core/musl/musl.inc
index 5e6cd01..276b00f 100644
--- a/meta/recipes-core/musl/musl.inc
+++ b/meta/recipes-core/musl/musl.inc
@@ -24,3 +24,6 @@ FILES_SOLIBSDEV = ""
 FILES_${PN} += "${libdir}/lib*${SOLIBSDEV}"
 INSANE_SKIP_${PN} = "dev-so"
 
+# Doesn't compile in MIPS16e mode due to use of hand-written
+# assembly
+MIPS_INSTRUCTION_SET = "mips"
-- 
2.8.1

Re: [PATCH] musl: don't compile in mips16e mode

[Khem Raj]

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> On Jul 20, 2016, at 8:19 PM, git@andred.net wrote:
> 
> From: André Draszik <adraszik@tycoint.com>
> 
> musl contains hand-written assembly which is not compatible with
> the MIPS16e mode.
> 
> Signed-off-by: André Draszik <adraszik@tycoint.com>
> ---
> meta/recipes-core/musl/musl.inc | 3 +++
> 1 file changed, 3 insertions(+)
> 
> diff --git a/meta/recipes-core/musl/musl.inc b/meta/recipes-core/musl/musl.inc
> index 5e6cd01..276b00f 100644
> --- a/meta/recipes-core/musl/musl.inc
> +++ b/meta/recipes-core/musl/musl.inc
> @@ -24,3 +24,6 @@ FILES_SOLIBSDEV = ""
> FILES_${PN} += "${libdir}/lib*${SOLIBSDEV}"
> INSANE_SKIP_${PN} = "dev-so"
> 
> +# Doesn't compile in MIPS16e mode due to use of hand-written
> +# assembly
> +MIPS_INSTRUCTION_SET = “mips"

Looks ok. However, does it make sense to have it compiled with mips ISA for a mips16e
part ? will it work in all cases or only certain SOCs

> --
> 2.8.1
> 
> --
> _______________________________________________
> Openembedded-core mailing list
> Openembedded-core@lists.openembedded.org
> http://lists.openembedded.org/mailman/listinfo/openembedded-core


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Re: [PATCH] musl: don't compile in mips16e mode

[André Draszik]

On Mi, 2016-07-20 at 20:22 -0700, Khem Raj wrote:
> > 
> > On Jul 20, 2016, at 8:19 PM, git@andred.net wrote:
> > 
> > From: André Draszik <adraszik@tycoint.com>
> > 
> > musl contains hand-written assembly which is not compatible with
> > the MIPS16e mode.
> > 
> > Signed-off-by: André Draszik <adraszik@tycoint.com>
> > ---
> > meta/recipes-core/musl/musl.inc | 3 +++
> > 1 file changed, 3 insertions(+)
> > 
> > diff --git a/meta/recipes-core/musl/musl.inc b/meta/recipes-
> > core/musl/musl.inc
> > index 5e6cd01..276b00f 100644
> > --- a/meta/recipes-core/musl/musl.inc
> > +++ b/meta/recipes-core/musl/musl.inc
> > @@ -24,3 +24,6 @@ FILES_SOLIBSDEV = ""
> > FILES_${PN} += "${libdir}/lib*${SOLIBSDEV}"
> > INSANE_SKIP_${PN} = "dev-so"
> > 
> > +# Doesn't compile in MIPS16e mode due to use of hand-written
> > +# assembly
> > +MIPS_INSTRUCTION_SET = “mips"
> 
> Looks ok. However, does it make sense to have it compiled with mips ISA
> for a mips16e
> part ?

MIPS16e is just an optional extension (ASE) on some mips32 and mips64 parts.
There can not be mips16e only parts.

> will it work in all cases or only certain SOCs

MIPS_INSTRUCTION_SET in OE is implemented similar to ARM_INSTRUCTION_SET. If
set to 'mips' (as above), it will simply revert to the standard instruction
set for the part we're building for, mips32/mips64/etc.

Given mips16e is an optional ASE, this currently is hooked into 24k family
type cores in OE, only.

So yes, this should not break anything.

BTW, Qemu supports mips16e (if the right target is selected).


Cheers,
Andre'

Re: [PATCH] musl: don't compile in mips16e mode

[Khem Raj]

On Thu, Jul 21, 2016 at 3:16 AM, André Draszik <git@andred.net> wrote:
> On Mi, 2016-07-20 at 20:22 -0700, Khem Raj wrote:
>> >
>> > On Jul 20, 2016, at 8:19 PM, git@andred.net wrote:
>> >
>> > From: André Draszik <adraszik@tycoint.com>
>> >
>> > musl contains hand-written assembly which is not compatible with
>> > the MIPS16e mode.
>> >
>> > Signed-off-by: André Draszik <adraszik@tycoint.com>
>> > ---
>> > meta/recipes-core/musl/musl.inc | 3 +++
>> > 1 file changed, 3 insertions(+)
>> >
>> > diff --git a/meta/recipes-core/musl/musl.inc b/meta/recipes-
>> > core/musl/musl.inc
>> > index 5e6cd01..276b00f 100644
>> > --- a/meta/recipes-core/musl/musl.inc
>> > +++ b/meta/recipes-core/musl/musl.inc
>> > @@ -24,3 +24,6 @@ FILES_SOLIBSDEV = ""
>> > FILES_${PN} += "${libdir}/lib*${SOLIBSDEV}"
>> > INSANE_SKIP_${PN} = "dev-so"
>> >
>> > +# Doesn't compile in MIPS16e mode due to use of hand-written
>> > +# assembly
>> > +MIPS_INSTRUCTION_SET = “mips"
>>
>> Looks ok. However, does it make sense to have it compiled with mips ISA
>> for a mips16e
>> part ?
>
> MIPS16e is just an optional extension (ASE) on some mips32 and mips64 parts.
> There can not be mips16e only parts.

OK, yes my search also ended in finding no mips16e only SOC.

>
>> will it work in all cases or only certain SOCs
>
> MIPS_INSTRUCTION_SET in OE is implemented similar to ARM_INSTRUCTION_SET. If
> set to 'mips' (as above), it will simply revert to the standard instruction
> set for the part we're building for, mips32/mips64/etc.
>
> Given mips16e is an optional ASE, this currently is hooked into 24k family
> type cores in OE, only.
>
> So yes, this should not break anything.
>
> BTW, Qemu supports mips16e (if the right target is selected).
>
>
> Cheers,
> Andre'
>
> --
> _______________________________________________
> Openembedded-core mailing list
> Openembedded-core@lists.openembedded.org
> http://lists.openembedded.org/mailman/listinfo/openembedded-core