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* [PATCH] crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish
@ 2022-05-11  8:53 Gaurav Jain
  2022-05-11 13:55 ` Rasmus Villemoes
  2022-05-20 13:43 ` sbabic
  0 siblings, 2 replies; 4+ messages in thread
From: Gaurav Jain @ 2022-05-11  8:53 UTC (permalink / raw)
  To: Stefano Babic, u-boot
  Cc: Fabio Estevam, Priyanka Jain, Ye Li, Horia Geanta,
	Silvano Di Ninno, Varun Sethi, Peng Fan, NXP i . MX U-Boot Team,
	Gaurav Jain

HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.

Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
---
 drivers/crypto/fsl/fsl_hash.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c
index a52c4ac957..9e6829b7ad 100644
--- a/drivers/crypto/fsl/fsl_hash.c
+++ b/drivers/crypto/fsl/fsl_hash.c
@@ -149,12 +149,20 @@ static int caam_hash_finish(void *hash_ctx, void *dest_buf,
 				  driver_hash[caam_algo].digestsize,
 				  1);
 
+	flush_dcache_range((ulong)ctx->sg_tbl, (ulong)(ctx->sg_tbl) + len);
+	flush_dcache_range((ulong)ctx->sha_desc,
+			   (ulong)(ctx->sha_desc) + (sizeof(uint32_t) * MAX_CAAM_DESCSIZE));
+	flush_dcache_range((ulong)ctx->hash,
+			   (ulong)(ctx->hash) + driver_hash[caam_algo].digestsize);
+
 	ret = run_descriptor_jr(ctx->sha_desc);
 
 	if (ret) {
 		debug("Error %x\n", ret);
 		return ret;
 	} else {
+		invalidate_dcache_range((ulong)ctx->hash,
+					(ulong)(ctx->hash) + driver_hash[caam_algo].digestsize);
 		memcpy(dest_buf, ctx->hash, sizeof(ctx->hash));
 	}
 	free(ctx);
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH] crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish
  2022-05-11  8:53 [PATCH] crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish Gaurav Jain
@ 2022-05-11 13:55 ` Rasmus Villemoes
  2022-05-20 16:00   ` Horia Geantă
  2022-05-20 13:43 ` sbabic
  1 sibling, 1 reply; 4+ messages in thread
From: Rasmus Villemoes @ 2022-05-11 13:55 UTC (permalink / raw)
  To: Gaurav Jain, Stefano Babic, u-boot
  Cc: Fabio Estevam, Priyanka Jain, Ye Li, Horia Geanta,
	Silvano Di Ninno, Varun Sethi, Peng Fan, NXP i . MX U-Boot Team

On 11/05/2022 10.53, Gaurav Jain wrote:
> HW accelerated hash operations are giving incorrect hash output.
> so add flush and invalidate for input/output hash buffers.
> 
> Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)

AFAICT, it takes somewhat more to fix that commit; the progressive
hashing is entirely broken.

It doesn't actually do anything progressive, it just stashes the
address/length pairs it is given, but doesn't feed the contents of those
buffers to the hardware, folding it into the hash state. So the caller
must not touch the buffers it passes until the finalization. I.e. I
think this won't work:

  char buf[SOMETHING];

  update_buffer(buf);
  hash_update(buf, len);
  update_buffer_again(buf);
  hash_update(buf, len);

And this pattern can be found in e.g. drivers/dfu/dfu.c which seems to
repeatedly pass the same address (dfu->i_buf_start) to ->hash_update.

Am I reading the code wrong?

Rasmus

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH] crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish
  2022-05-11  8:53 [PATCH] crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish Gaurav Jain
  2022-05-11 13:55 ` Rasmus Villemoes
@ 2022-05-20 13:43 ` sbabic
  1 sibling, 0 replies; 4+ messages in thread
From: sbabic @ 2022-05-20 13:43 UTC (permalink / raw)
  To: Gaurav Jain, u-boot

> HW accelerated hash operations are giving incorrect hash output.
> so add flush and invalidate for input/output hash buffers.
> Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
> Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de
=====================================================================

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish
  2022-05-11 13:55 ` Rasmus Villemoes
@ 2022-05-20 16:00   ` Horia Geantă
  0 siblings, 0 replies; 4+ messages in thread
From: Horia Geantă @ 2022-05-20 16:00 UTC (permalink / raw)
  To: Rasmus Villemoes, Gaurav Jain, Stefano Babic, u-boot
  Cc: Fabio Estevam, Priyanka Jain, Ye Li, Silvano Di Ninno,
	Varun Sethi, Peng Fan, dl-uboot-imx

On 5/11/2022 4:55 PM, Rasmus Villemoes wrote:
> On 11/05/2022 10.53, Gaurav Jain wrote:
>> HW accelerated hash operations are giving incorrect hash output.
>> so add flush and invalidate for input/output hash buffers.
>>
>> Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
> 
> AFAICT, it takes somewhat more to fix that commit; the progressive
> hashing is entirely broken.
> 
> It doesn't actually do anything progressive, it just stashes the
> address/length pairs it is given, but doesn't feed the contents of those
> buffers to the hardware, folding it into the hash state. So the caller
Correct.

> must not touch the buffers it passes until the finalization. I.e. I
> think this won't work:
> 
>   char buf[SOMETHING];
> 
>   update_buffer(buf);
>   hash_update(buf, len);
>   update_buffer_again(buf);
>   hash_update(buf, len);
> 
Indeed, this won't work.

> And this pattern can be found in e.g. drivers/dfu/dfu.c which seems to
> repeatedly pass the same address (dfu->i_buf_start) to ->hash_update.
> 
At first glance, dfu asks for crc32 algorithm, so it won't use this backend.
But the concept is correct: user is not forced to keep a buffer unmodified
(or even allocated) after .hash_update returns.

Thanks,
Horia

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2022-05-20 16:00 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-11  8:53 [PATCH] crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish Gaurav Jain
2022-05-11 13:55 ` Rasmus Villemoes
2022-05-20 16:00   ` Horia Geantă
2022-05-20 13:43 ` sbabic

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