From: Suman Anna <s-anna@ti.com> To: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>, Marc Zyngier <maz@kernel.org> Cc: <tglx@linutronix.de>, <jason@lakedaemon.net>, <robh+dt@kernel.org>, Lee Jones <lee.jones@linaro.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <david@lechnology.com>, "Mills, William" <wmills@ti.com> Subject: Re: [PATCHv3 4/6] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Date: Fri, 10 Jul 2020 16:04:41 -0500 [thread overview] Message-ID: <8189e095-6531-8e68-844c-22dd3a38a28d@ti.com> (raw) In-Reply-To: <CAMxfBF5oB9=qkA8G4jD=KPht+OmZdOaTpsoqvRE881da51S2AA@mail.gmail.com> On 7/3/20 12:04 PM, Grzegorz Jaszczyk wrote: > On Thu, 2 Jul 2020 at 19:54, Marc Zyngier <maz@kernel.org> wrote: >> >> On 2020-07-02 15:17, Grzegorz Jaszczyk wrote: >>> From: David Lechner <david@lechnology.com> >>> >>> This implements the irq_get_irqchip_state and irq_set_irqchip_state >>> callbacks for the TI PRUSS INTC driver. The set callback can be used >>> by drivers to "kick" a PRU by enabling a PRU system event. >> >> "enabling"? That'd be unmasking an interrupt, which isn't what this >> does. "injecting", maybe? > > Yes "injecting" is much better. > >> >>> >>> Example: >>> irq_set_irqchip_state(irq, IRQCHIP_STATE_PENDING, true); >> >> Nice example. >> >> What this example does explain is how you are actually going to kick >> a PRU via this interface. For that to happen, you'd have to have on >> the Linux side an interrupt that is actually routed to a PRU. > > Correct. > >> And from what I have understood of the previous patches, this can't >> be the case. What didi I miss? > > The hwirq's handled by this driver are so called system events in > PRUSS nomenclature. This driver is responsible for the entire mapping > of those system events to PRUSS specific channels which are next > mapped to host_irq (patch #6 https://lkml.org/lkml/2020/7/2/612). > There are 8 host_irqs that are routed to the main cpu (running Linux) > and they are called host_intr0..host_intr7 (were seen in previous > patches of this series). But there are other "host_interrupts" that > are routed not to the main CPU but to PRU cores and this driver is > responsible for creating proper mapping (system > event/channel/host_irq) for them, and allowing to kick PRU via the > introduced interface. > > It is worth noting that the PRUSS is quite flexible and allows various > things e.g.: > - map any of 160/64 internal system events to any of the 20/10 channels > - map any of the 20/10 channels to any of the 20/10 host interrupts. > > So e.g. it is possible to map e.g. system event 17 to the main CPU > (through e.g. channel 1 which is the next map to e.g. host_intr0). Or > (exclusively) map the same system event 17 to PRU core (through e.g. > channel 1 which is the next map to PRU0). Grzegorz has explained in detail, the short summary is we trigger a system event, and the mapping for that event ensures the interrupt is routed at the desired processor. regards Suman > >> >>> >>> Signed-off-by: David Lechner <david@lechnology.com> >>> Signed-off-by: Suman Anna <s-anna@ti.com> >>> Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org> >>> Reviewed-by: Lee Jones <lee.jones@linaro.org> >>> --- >>> v2->v3: >>> - Get rid of unnecessary pruss_intc_check_write() and use >>> pruss_intc_write_reg directly. >>> v1->v2: >>> - https://patchwork.kernel.org/patch/11069769/ >>> --- >>> drivers/irqchip/irq-pruss-intc.c | 43 >>> ++++++++++++++++++++++++++++++++++++++-- >>> 1 file changed, 41 insertions(+), 2 deletions(-) >>> >>> diff --git a/drivers/irqchip/irq-pruss-intc.c >>> b/drivers/irqchip/irq-pruss-intc.c >>> index 49c936f..19b3d38 100644 >>> --- a/drivers/irqchip/irq-pruss-intc.c >>> +++ b/drivers/irqchip/irq-pruss-intc.c >>> @@ -7,6 +7,7 @@ >>> * Suman Anna <s-anna@ti.com> >>> */ >>> >>> +#include <linux/interrupt.h> >>> #include <linux/irq.h> >>> #include <linux/irqchip/chained_irq.h> >>> #include <linux/irqdomain.h> >>> @@ -39,8 +40,7 @@ >>> #define PRU_INTC_HIEISR 0x0034 >>> #define PRU_INTC_HIDISR 0x0038 >>> #define PRU_INTC_GPIR 0x0080 >>> -#define PRU_INTC_SRSR0 0x0200 >>> -#define PRU_INTC_SRSR1 0x0204 >>> +#define PRU_INTC_SRSR(x) (0x0200 + (x) * 4) >>> #define PRU_INTC_SECR0 0x0280 >>> #define PRU_INTC_SECR1 0x0284 >>> #define PRU_INTC_ESR0 0x0300 >>> @@ -145,6 +145,43 @@ static void pruss_intc_irq_relres(struct irq_data >>> *data) >>> module_put(THIS_MODULE); >>> } >>> >>> +static int pruss_intc_irq_get_irqchip_state(struct irq_data *data, >>> + enum irqchip_irq_state which, >>> + bool *state) >>> +{ >>> + struct pruss_intc *intc = irq_data_get_irq_chip_data(data); >>> + u32 reg, mask, srsr; >>> + >>> + if (which != IRQCHIP_STATE_PENDING) >>> + return -EINVAL; >>> + >>> + reg = PRU_INTC_SRSR(data->hwirq / 32); >> >> I assume the register file scales as more interrupts are added in the >> subsequent patch? >> > Yes, after I will move part of the next patch to patch #2 as you > suggested it will stop being confusing. > > Thank you, > Grzegorz >
WARNING: multiple messages have this Message-ID (diff)
From: Suman Anna <s-anna@ti.com> To: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>, Marc Zyngier <maz@kernel.org> Cc: devicetree@vger.kernel.org, jason@lakedaemon.net, linux-kernel@vger.kernel.org, robh+dt@kernel.org, tglx@linutronix.de, linux-omap@vger.kernel.org, Lee Jones <lee.jones@linaro.org>, "Mills, William" <wmills@ti.com>, linux-arm-kernel@lists.infradead.org, david@lechnology.com Subject: Re: [PATCHv3 4/6] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Date: Fri, 10 Jul 2020 16:04:41 -0500 [thread overview] Message-ID: <8189e095-6531-8e68-844c-22dd3a38a28d@ti.com> (raw) In-Reply-To: <CAMxfBF5oB9=qkA8G4jD=KPht+OmZdOaTpsoqvRE881da51S2AA@mail.gmail.com> On 7/3/20 12:04 PM, Grzegorz Jaszczyk wrote: > On Thu, 2 Jul 2020 at 19:54, Marc Zyngier <maz@kernel.org> wrote: >> >> On 2020-07-02 15:17, Grzegorz Jaszczyk wrote: >>> From: David Lechner <david@lechnology.com> >>> >>> This implements the irq_get_irqchip_state and irq_set_irqchip_state >>> callbacks for the TI PRUSS INTC driver. The set callback can be used >>> by drivers to "kick" a PRU by enabling a PRU system event. >> >> "enabling"? That'd be unmasking an interrupt, which isn't what this >> does. "injecting", maybe? > > Yes "injecting" is much better. > >> >>> >>> Example: >>> irq_set_irqchip_state(irq, IRQCHIP_STATE_PENDING, true); >> >> Nice example. >> >> What this example does explain is how you are actually going to kick >> a PRU via this interface. For that to happen, you'd have to have on >> the Linux side an interrupt that is actually routed to a PRU. > > Correct. > >> And from what I have understood of the previous patches, this can't >> be the case. What didi I miss? > > The hwirq's handled by this driver are so called system events in > PRUSS nomenclature. This driver is responsible for the entire mapping > of those system events to PRUSS specific channels which are next > mapped to host_irq (patch #6 https://lkml.org/lkml/2020/7/2/612). > There are 8 host_irqs that are routed to the main cpu (running Linux) > and they are called host_intr0..host_intr7 (were seen in previous > patches of this series). But there are other "host_interrupts" that > are routed not to the main CPU but to PRU cores and this driver is > responsible for creating proper mapping (system > event/channel/host_irq) for them, and allowing to kick PRU via the > introduced interface. > > It is worth noting that the PRUSS is quite flexible and allows various > things e.g.: > - map any of 160/64 internal system events to any of the 20/10 channels > - map any of the 20/10 channels to any of the 20/10 host interrupts. > > So e.g. it is possible to map e.g. system event 17 to the main CPU > (through e.g. channel 1 which is the next map to e.g. host_intr0). Or > (exclusively) map the same system event 17 to PRU core (through e.g. > channel 1 which is the next map to PRU0). Grzegorz has explained in detail, the short summary is we trigger a system event, and the mapping for that event ensures the interrupt is routed at the desired processor. regards Suman > >> >>> >>> Signed-off-by: David Lechner <david@lechnology.com> >>> Signed-off-by: Suman Anna <s-anna@ti.com> >>> Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org> >>> Reviewed-by: Lee Jones <lee.jones@linaro.org> >>> --- >>> v2->v3: >>> - Get rid of unnecessary pruss_intc_check_write() and use >>> pruss_intc_write_reg directly. >>> v1->v2: >>> - https://patchwork.kernel.org/patch/11069769/ >>> --- >>> drivers/irqchip/irq-pruss-intc.c | 43 >>> ++++++++++++++++++++++++++++++++++++++-- >>> 1 file changed, 41 insertions(+), 2 deletions(-) >>> >>> diff --git a/drivers/irqchip/irq-pruss-intc.c >>> b/drivers/irqchip/irq-pruss-intc.c >>> index 49c936f..19b3d38 100644 >>> --- a/drivers/irqchip/irq-pruss-intc.c >>> +++ b/drivers/irqchip/irq-pruss-intc.c >>> @@ -7,6 +7,7 @@ >>> * Suman Anna <s-anna@ti.com> >>> */ >>> >>> +#include <linux/interrupt.h> >>> #include <linux/irq.h> >>> #include <linux/irqchip/chained_irq.h> >>> #include <linux/irqdomain.h> >>> @@ -39,8 +40,7 @@ >>> #define PRU_INTC_HIEISR 0x0034 >>> #define PRU_INTC_HIDISR 0x0038 >>> #define PRU_INTC_GPIR 0x0080 >>> -#define PRU_INTC_SRSR0 0x0200 >>> -#define PRU_INTC_SRSR1 0x0204 >>> +#define PRU_INTC_SRSR(x) (0x0200 + (x) * 4) >>> #define PRU_INTC_SECR0 0x0280 >>> #define PRU_INTC_SECR1 0x0284 >>> #define PRU_INTC_ESR0 0x0300 >>> @@ -145,6 +145,43 @@ static void pruss_intc_irq_relres(struct irq_data >>> *data) >>> module_put(THIS_MODULE); >>> } >>> >>> +static int pruss_intc_irq_get_irqchip_state(struct irq_data *data, >>> + enum irqchip_irq_state which, >>> + bool *state) >>> +{ >>> + struct pruss_intc *intc = irq_data_get_irq_chip_data(data); >>> + u32 reg, mask, srsr; >>> + >>> + if (which != IRQCHIP_STATE_PENDING) >>> + return -EINVAL; >>> + >>> + reg = PRU_INTC_SRSR(data->hwirq / 32); >> >> I assume the register file scales as more interrupts are added in the >> subsequent patch? >> > Yes, after I will move part of the next patch to patch #2 as you > suggested it will stop being confusing. > > Thank you, > Grzegorz > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-07-10 21:05 UTC|newest] Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-02 14:17 [PATCHv3 0/6] Add TI PRUSS Local Interrupt Controller IRQChip driver Grzegorz Jaszczyk 2020-07-02 14:17 ` Grzegorz Jaszczyk 2020-07-02 14:17 ` [PATCHv3 1/6] dt-bindings: irqchip: Add PRU-ICSS interrupt controller bindings Grzegorz Jaszczyk 2020-07-02 14:17 ` Grzegorz Jaszczyk 2020-07-13 21:25 ` Rob Herring 2020-07-13 21:25 ` Rob Herring 2020-07-16 9:25 ` Grzegorz Jaszczyk 2020-07-16 9:25 ` Grzegorz Jaszczyk 2020-07-02 14:17 ` [PATCHv3 2/6] irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts Grzegorz Jaszczyk 2020-07-02 14:17 ` Grzegorz Jaszczyk 2020-07-02 17:24 ` Marc Zyngier 2020-07-02 17:24 ` Marc Zyngier 2020-07-03 14:28 ` Grzegorz Jaszczyk 2020-07-03 14:28 ` Grzegorz Jaszczyk 2020-07-04 9:39 ` Marc Zyngier 2020-07-04 9:39 ` Marc Zyngier 2020-07-05 13:26 ` Grzegorz Jaszczyk 2020-07-05 13:26 ` Grzegorz Jaszczyk 2020-07-05 20:45 ` Marc Zyngier 2020-07-05 20:45 ` Marc Zyngier 2020-07-08 7:04 ` Grzegorz Jaszczyk 2020-07-08 7:04 ` Grzegorz Jaszczyk 2020-07-08 10:47 ` Marc Zyngier 2020-07-08 10:47 ` Marc Zyngier 2020-07-10 23:03 ` Suman Anna 2020-07-10 23:03 ` Suman Anna 2020-07-15 13:38 ` Grzegorz Jaszczyk 2020-07-15 13:38 ` Grzegorz Jaszczyk 2020-07-17 12:36 ` Marc Zyngier 2020-07-17 12:36 ` Marc Zyngier 2020-07-21 9:27 ` Grzegorz Jaszczyk 2020-07-21 9:27 ` Grzegorz Jaszczyk 2020-07-21 10:10 ` Marc Zyngier 2020-07-21 10:10 ` Marc Zyngier 2020-07-21 13:59 ` Grzegorz Jaszczyk 2020-07-21 13:59 ` Grzegorz Jaszczyk 2020-07-02 14:17 ` [PATCHv3 3/6] irqchip/irq-pruss-intc: Add support for shared and invalid interrupts Grzegorz Jaszczyk 2020-07-02 14:17 ` Grzegorz Jaszczyk 2020-07-02 17:44 ` Marc Zyngier 2020-07-02 17:44 ` Marc Zyngier 2020-07-10 20:59 ` Suman Anna 2020-07-10 20:59 ` Suman Anna 2020-07-17 11:02 ` Marc Zyngier 2020-07-17 11:02 ` Marc Zyngier 2020-07-25 15:57 ` Suman Anna 2020-07-25 15:57 ` Suman Anna 2020-07-25 16:27 ` Marc Zyngier 2020-07-25 16:27 ` Marc Zyngier 2020-07-25 16:39 ` Suman Anna 2020-07-25 16:39 ` Suman Anna 2020-07-02 14:17 ` [PATCHv3 4/6] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Grzegorz Jaszczyk 2020-07-02 14:17 ` [PATCHv3 4/6] irqchip/irq-pruss-intc: Implement irq_{get, set}_irqchip_state ops Grzegorz Jaszczyk 2020-07-02 17:54 ` [PATCHv3 4/6] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Marc Zyngier 2020-07-02 17:54 ` Marc Zyngier 2020-07-03 17:04 ` Grzegorz Jaszczyk 2020-07-03 17:04 ` Grzegorz Jaszczyk 2020-07-10 21:04 ` Suman Anna [this message] 2020-07-10 21:04 ` Suman Anna 2020-07-02 14:17 ` [PATCHv3 5/6] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs Grzegorz Jaszczyk 2020-07-02 14:17 ` Grzegorz Jaszczyk 2020-07-02 17:59 ` Marc Zyngier 2020-07-02 17:59 ` Marc Zyngier 2020-07-03 17:05 ` Grzegorz Jaszczyk 2020-07-03 17:05 ` Grzegorz Jaszczyk 2020-07-10 21:13 ` Suman Anna 2020-07-10 21:13 ` Suman Anna 2020-07-02 14:17 ` [PATCHv3 6/6] irqchip/irq-pruss-intc: Add event mapping support Grzegorz Jaszczyk 2020-07-02 14:17 ` Grzegorz Jaszczyk 2020-07-02 16:24 ` Suman Anna 2020-07-02 16:24 ` Suman Anna 2020-07-05 13:39 ` Grzegorz Jaszczyk 2020-07-05 13:39 ` Grzegorz Jaszczyk
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