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From: Suman Anna <s-anna@ti.com>
To: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>,
	Marc Zyngier <maz@kernel.org>
Cc: <tglx@linutronix.de>, <jason@lakedaemon.net>,
	<robh+dt@kernel.org>, Lee Jones <lee.jones@linaro.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-omap@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <david@lechnology.com>,
	"Mills, William" <wmills@ti.com>
Subject: Re: [PATCHv3 5/6] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs
Date: Fri, 10 Jul 2020 16:13:58 -0500	[thread overview]
Message-ID: <8de2316f-733e-25d3-7512-f7725ac4e9eb@ti.com> (raw)
In-Reply-To: <CAMxfBF5p3kh-E-vUxo60a+QTuqQXbsSVYSTc_qYvN8ZckLPKzA@mail.gmail.com>

Hi Marc,

On 7/3/20 12:05 PM, Grzegorz Jaszczyk wrote:
> On Thu, 2 Jul 2020 at 19:59, Marc Zyngier <maz@kernel.org> wrote:
>>
>> On 2020-07-02 15:17, Grzegorz Jaszczyk wrote:
>>> From: Suman Anna <s-anna@ti.com>
>>>
>>> The K3 AM65x and J721E SoCs have the next generation of the PRU-ICSS
>>> IP,
>>> commonly called ICSSG. The PRUSS INTC present within the ICSSG supports
>>> more System Events (160 vs 64), more Interrupt Channels and Host
>>> Interrupts
>>> (20 vs 10) compared to the previous generation PRUSS INTC instances.
>>> The
>>> first 2 and the last 10 of these host interrupt lines are used by the
>>> PRU and other auxiliary cores and sub-modules within the ICSSG, with 8
>>> host interrupts connected to MPU. The host interrupts 5, 6, 7 are also
>>> connected to the other ICSSG instances within the SoC and can be
>>> partitioned as per system integration through the board dts files.
>>>
>>> Enhance the PRUSS INTC driver to add support for this ICSSG INTC
>>> instance. This support is added using specific compatible and match
>>> data and updating the code to use this data instead of the current
>>> hard-coded macros. The INTC config structure is updated to use the
>>> higher events and channels on all SoCs, while limiting the actual
>>> processing to only the relevant number of events/channels/interrupts.
>>>
>>> Signed-off-by: Suman Anna <s-anna@ti.com>
>>> Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
>>> ---
>>> v2->v3:
>>> - Change patch order: use it directly after "irqchip/irq-pruss-intc:
>>>    Implement irq_{get,set}_irqchip_state ops" and before new
>>>    "irqchip/irq-pruss-intc: Add event mapping support" in order to
>>> reduce
>>>    diff.
>>
>> The diff would be even smaller if you introduced a variable number of
>> inputs the first place, i.e. in patch #2. Most if this patch just
>> retrofits it. Please squash these changes into that initial patch,
>> and only add the platform stuff here.

Yeah, all the variables were introduced in this patch based on patch 
history. Until this new IP came, we haven't had a need to use variables 
in the original driver code. That's also the reason for this being a 
separate patch rather than squashed into the original patch.

regards
Suman

>
> Sure I will do that.
> 
> Thank you,
> Grzegorz
> 


WARNING: multiple messages have this Message-ID (diff)
From: Suman Anna <s-anna@ti.com>
To: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>,
	Marc Zyngier <maz@kernel.org>
Cc: devicetree@vger.kernel.org, jason@lakedaemon.net,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	tglx@linutronix.de, linux-omap@vger.kernel.org,
	Lee Jones <lee.jones@linaro.org>,
	"Mills,  William" <wmills@ti.com>,
	linux-arm-kernel@lists.infradead.org, david@lechnology.com
Subject: Re: [PATCHv3 5/6] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs
Date: Fri, 10 Jul 2020 16:13:58 -0500	[thread overview]
Message-ID: <8de2316f-733e-25d3-7512-f7725ac4e9eb@ti.com> (raw)
In-Reply-To: <CAMxfBF5p3kh-E-vUxo60a+QTuqQXbsSVYSTc_qYvN8ZckLPKzA@mail.gmail.com>

Hi Marc,

On 7/3/20 12:05 PM, Grzegorz Jaszczyk wrote:
> On Thu, 2 Jul 2020 at 19:59, Marc Zyngier <maz@kernel.org> wrote:
>>
>> On 2020-07-02 15:17, Grzegorz Jaszczyk wrote:
>>> From: Suman Anna <s-anna@ti.com>
>>>
>>> The K3 AM65x and J721E SoCs have the next generation of the PRU-ICSS
>>> IP,
>>> commonly called ICSSG. The PRUSS INTC present within the ICSSG supports
>>> more System Events (160 vs 64), more Interrupt Channels and Host
>>> Interrupts
>>> (20 vs 10) compared to the previous generation PRUSS INTC instances.
>>> The
>>> first 2 and the last 10 of these host interrupt lines are used by the
>>> PRU and other auxiliary cores and sub-modules within the ICSSG, with 8
>>> host interrupts connected to MPU. The host interrupts 5, 6, 7 are also
>>> connected to the other ICSSG instances within the SoC and can be
>>> partitioned as per system integration through the board dts files.
>>>
>>> Enhance the PRUSS INTC driver to add support for this ICSSG INTC
>>> instance. This support is added using specific compatible and match
>>> data and updating the code to use this data instead of the current
>>> hard-coded macros. The INTC config structure is updated to use the
>>> higher events and channels on all SoCs, while limiting the actual
>>> processing to only the relevant number of events/channels/interrupts.
>>>
>>> Signed-off-by: Suman Anna <s-anna@ti.com>
>>> Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
>>> ---
>>> v2->v3:
>>> - Change patch order: use it directly after "irqchip/irq-pruss-intc:
>>>    Implement irq_{get,set}_irqchip_state ops" and before new
>>>    "irqchip/irq-pruss-intc: Add event mapping support" in order to
>>> reduce
>>>    diff.
>>
>> The diff would be even smaller if you introduced a variable number of
>> inputs the first place, i.e. in patch #2. Most if this patch just
>> retrofits it. Please squash these changes into that initial patch,
>> and only add the platform stuff here.

Yeah, all the variables were introduced in this patch based on patch 
history. Until this new IP came, we haven't had a need to use variables 
in the original driver code. That's also the reason for this being a 
separate patch rather than squashed into the original patch.

regards
Suman

>
> Sure I will do that.
> 
> Thank you,
> Grzegorz
> 


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  reply	other threads:[~2020-07-10 21:14 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-02 14:17 [PATCHv3 0/6] Add TI PRUSS Local Interrupt Controller IRQChip driver Grzegorz Jaszczyk
2020-07-02 14:17 ` Grzegorz Jaszczyk
2020-07-02 14:17 ` [PATCHv3 1/6] dt-bindings: irqchip: Add PRU-ICSS interrupt controller bindings Grzegorz Jaszczyk
2020-07-02 14:17   ` Grzegorz Jaszczyk
2020-07-13 21:25   ` Rob Herring
2020-07-13 21:25     ` Rob Herring
2020-07-16  9:25     ` Grzegorz Jaszczyk
2020-07-16  9:25       ` Grzegorz Jaszczyk
2020-07-02 14:17 ` [PATCHv3 2/6] irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts Grzegorz Jaszczyk
2020-07-02 14:17   ` Grzegorz Jaszczyk
2020-07-02 17:24   ` Marc Zyngier
2020-07-02 17:24     ` Marc Zyngier
2020-07-03 14:28     ` Grzegorz Jaszczyk
2020-07-03 14:28       ` Grzegorz Jaszczyk
2020-07-04  9:39       ` Marc Zyngier
2020-07-04  9:39         ` Marc Zyngier
2020-07-05 13:26         ` Grzegorz Jaszczyk
2020-07-05 13:26           ` Grzegorz Jaszczyk
2020-07-05 20:45           ` Marc Zyngier
2020-07-05 20:45             ` Marc Zyngier
2020-07-08  7:04             ` Grzegorz Jaszczyk
2020-07-08  7:04               ` Grzegorz Jaszczyk
2020-07-08 10:47               ` Marc Zyngier
2020-07-08 10:47                 ` Marc Zyngier
2020-07-10 23:03                 ` Suman Anna
2020-07-10 23:03                   ` Suman Anna
2020-07-15 13:38                   ` Grzegorz Jaszczyk
2020-07-15 13:38                     ` Grzegorz Jaszczyk
2020-07-17 12:36                     ` Marc Zyngier
2020-07-17 12:36                       ` Marc Zyngier
2020-07-21  9:27                       ` Grzegorz Jaszczyk
2020-07-21  9:27                         ` Grzegorz Jaszczyk
2020-07-21 10:10                         ` Marc Zyngier
2020-07-21 10:10                           ` Marc Zyngier
2020-07-21 13:59                           ` Grzegorz Jaszczyk
2020-07-21 13:59                             ` Grzegorz Jaszczyk
2020-07-02 14:17 ` [PATCHv3 3/6] irqchip/irq-pruss-intc: Add support for shared and invalid interrupts Grzegorz Jaszczyk
2020-07-02 14:17   ` Grzegorz Jaszczyk
2020-07-02 17:44   ` Marc Zyngier
2020-07-02 17:44     ` Marc Zyngier
2020-07-10 20:59     ` Suman Anna
2020-07-10 20:59       ` Suman Anna
2020-07-17 11:02       ` Marc Zyngier
2020-07-17 11:02         ` Marc Zyngier
2020-07-25 15:57         ` Suman Anna
2020-07-25 15:57           ` Suman Anna
2020-07-25 16:27           ` Marc Zyngier
2020-07-25 16:27             ` Marc Zyngier
2020-07-25 16:39             ` Suman Anna
2020-07-25 16:39               ` Suman Anna
2020-07-02 14:17 ` [PATCHv3 4/6] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Grzegorz Jaszczyk
2020-07-02 14:17   ` [PATCHv3 4/6] irqchip/irq-pruss-intc: Implement irq_{get, set}_irqchip_state ops Grzegorz Jaszczyk
2020-07-02 17:54   ` [PATCHv3 4/6] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Marc Zyngier
2020-07-02 17:54     ` Marc Zyngier
2020-07-03 17:04     ` Grzegorz Jaszczyk
2020-07-03 17:04       ` Grzegorz Jaszczyk
2020-07-10 21:04       ` Suman Anna
2020-07-10 21:04         ` Suman Anna
2020-07-02 14:17 ` [PATCHv3 5/6] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs Grzegorz Jaszczyk
2020-07-02 14:17   ` Grzegorz Jaszczyk
2020-07-02 17:59   ` Marc Zyngier
2020-07-02 17:59     ` Marc Zyngier
2020-07-03 17:05     ` Grzegorz Jaszczyk
2020-07-03 17:05       ` Grzegorz Jaszczyk
2020-07-10 21:13       ` Suman Anna [this message]
2020-07-10 21:13         ` Suman Anna
2020-07-02 14:17 ` [PATCHv3 6/6] irqchip/irq-pruss-intc: Add event mapping support Grzegorz Jaszczyk
2020-07-02 14:17   ` Grzegorz Jaszczyk
2020-07-02 16:24   ` Suman Anna
2020-07-02 16:24     ` Suman Anna
2020-07-05 13:39     ` Grzegorz Jaszczyk
2020-07-05 13:39       ` Grzegorz Jaszczyk

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