[PATCH v3 0/8] hw/mips/fuloong2e fixes

[PATCH v3 0/8] hw/mips/fuloong2e fixes

[Jiaxun Yang]

It can now boot Debian installer[1] as well as a custom PMON bootloader
distribution[2].

Note that it can't boot PMON shipped with actual machine as our ATI vgabios
is using some x86 hack that can't be handled by x86emu in original PMON. 


Tree avilable at: https://gitlab.com/FlyGoat/qemu/-/tree/fuloong_fixes_v2

v2:
 - Collect review tags.
 - Get CPU clock via elegant method. (philmd)
 - Add boot_linux_console scceptance test

v3:
 - Collect review tags
 - Typo corrections
 - Rewrite PCI Lomem

Jiaxun Yang (8):
  hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT
  hw/mips/fuloong2e: Relpace fault links
  hw/pci-host/bonito: Fixup IRQ mapping
  hw/pci-host/bonito: Fixup pci.lomem mapping
  hw/mips/fuloong2e: Remove unused env entry
  hw/mips/fuloong2e: Correct cpuclock env
  hw/mips/fuloong2e: Add highmem support
  tests/acceptance: Test boot_linux_console for fuloong2e

 hw/mips/fuloong2e.c                    | 84 +++++++++++++++++---------
 hw/pci-host/bonito.c                   | 42 ++++---------
 tests/acceptance/boot_linux_console.py | 21 +++++++
 3 files changed, 89 insertions(+), 58 deletions(-)

-- 
2.29.2

[PATCH v3 1/8] hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT

[Jiaxun Yang]

Seems useless....

Fixes: 051c190bce5 ("MIPS: Initial support of fulong mini pc (machine construction)")
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
---
 hw/mips/fuloong2e.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 9b0eb8a314..055b99e378 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -48,8 +48,6 @@
 #include "sysemu/reset.h"
 #include "qemu/error-report.h"
 
-#define DEBUG_FULOONG2E_INIT
-
 #define ENVP_PADDR              0x2000
 #define ENVP_VADDR              cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR)
 #define ENVP_NB_ENTRIES         16
-- 
2.29.2

[PATCH v3 2/8] hw/mips/fuloong2e: Relpace fault links

[Jiaxun Yang]

Websites are downing, but GitHub may last forever.
Loongson even doesn't recogonize 2E as their products nowadays..

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/mips/fuloong2e.c | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 055b99e378..d846ef7b00 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -14,8 +14,8 @@
  * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
  * https://www.linux-mips.org/wiki/Fuloong_2E
  *
- * Loongson 2e user manual:
- * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
+ * Loongson 2e manuals:
+ * https://github.com/loongson-community/docs/tree/master/2E
  */
 
 #include "qemu/osdep.h"
@@ -61,14 +61,7 @@
  * PMON is not part of qemu and released with BSD license, anyone
  * who want to build a pmon binary please first git-clone the source
  * from the git repository at:
- * http://www.loongson.cn/support/git/pmon
- * Then follow the "Compile Guide" available at:
- * http://dev.lemote.com/code/pmon
- *
- * Notes:
- * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
- * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
- * in the "Compile Guide".
+ * https://github.com/loongson-community/pmon
  */
 #define FULOONG_BIOSNAME "pmon_2e.bin"
 
-- 
2.29.2

[PATCH v3 3/8] hw/pci-host/bonito: Fixup IRQ mapping

[Jiaxun Yang]

Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel,
despites south bridge IRQs needs special care, all other
IRQ pins are mapped by 'LOONGSON_IRQ_BASE + 25 + pin'.

As south bridge IRQs are all handled by ISA bus, we can
make a simple direct mapping.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
v3: Define BONITO_PCI_IRQ_BASE for readability (f4bug)
---
 hw/pci-host/bonito.c | 30 +++++++-----------------------
 1 file changed, 7 insertions(+), 23 deletions(-)

diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index a99eced065..3fad470fc6 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -62,6 +62,9 @@
 #define DPRINTF(fmt, ...)
 #endif
 
+/* PCI slots IRQ pins start position */
+#define BONITO_PCI_IRQ_BASE         25
+
 /* from linux soure code. include/asm-mips/mips-boards/bonito64.h*/
 #define BONITO_BOOT_BASE        0x1fc00000
 #define BONITO_BOOT_SIZE        0x00100000
@@ -546,19 +549,16 @@ static const MemoryRegionOps bonito_spciconf_ops = {
     .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
-#define BONITO_IRQ_BASE 32
-
 static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
 {
     BonitoState *s = opaque;
     qemu_irq *pic = s->pic;
     PCIBonitoState *bonito_state = s->pci_dev;
-    int internal_irq = irq_num - BONITO_IRQ_BASE;
 
-    if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) {
+    if (bonito_state->regs[BONITO_INTEDGE] & (1 << irq_num)) {
         qemu_irq_pulse(*pic);
     } else {   /* level triggered */
-        if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) {
+        if (bonito_state->regs[BONITO_INTPOL] & (1 << irq_num)) {
             qemu_irq_raise(*pic);
         } else {
             qemu_irq_lower(*pic);
@@ -566,25 +566,9 @@ static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
     }
 }
 
-/* map the original irq (0~3) to bonito irq (16~47, but 16~31 are unused) */
-static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
+static int pci_bonito_map_irq(PCIDevice *pci_dev, int pin)
 {
-    int slot;
-
-    slot = (pci_dev->devfn >> 3);
-
-    switch (slot) {
-    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
-        return irq_num % 4 + BONITO_IRQ_BASE;
-    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
-        return 4 + BONITO_IRQ_BASE;
-    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
-        return 5 + BONITO_IRQ_BASE;
-    case 8 ... 12: /* PCI slot 1 to 4 */
-        return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
-    default:  /* Unknown device, don't do any translation */
-        return irq_num;
-    }
+    return BONITO_PCI_IRQ_BASE + pin;
 }
 
 static void bonito_reset(void *opaque)
-- 
2.29.2

Re: [PATCH v3 3/8] hw/pci-host/bonito: Fixup IRQ mapping

[BALATON Zoltan via]

On Thu, 24 Dec 2020, Jiaxun Yang wrote:
> Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel,

Typo: According

How come, you say you can boot to Debian installer but don't need any IDE 
changes when the kernel you submitted as test was shown not working with 
current IDE emulation? Which installer do you use and what kernel does 
that have? (The references to the installer and PMON are now missing in 
your cover letter.)

Regards,
BALATON Zoltan

> despites south bridge IRQs needs special care, all other
> IRQ pins are mapped by 'LOONGSON_IRQ_BASE + 25 + pin'.
>
> As south bridge IRQs are all handled by ISA bus, we can
> make a simple direct mapping.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> v3: Define BONITO_PCI_IRQ_BASE for readability (f4bug)
> ---
> hw/pci-host/bonito.c | 30 +++++++-----------------------
> 1 file changed, 7 insertions(+), 23 deletions(-)
>
> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index a99eced065..3fad470fc6 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -62,6 +62,9 @@
> #define DPRINTF(fmt, ...)
> #endif
>
> +/* PCI slots IRQ pins start position */
> +#define BONITO_PCI_IRQ_BASE         25
> +
> /* from linux soure code. include/asm-mips/mips-boards/bonito64.h*/
> #define BONITO_BOOT_BASE        0x1fc00000
> #define BONITO_BOOT_SIZE        0x00100000
> @@ -546,19 +549,16 @@ static const MemoryRegionOps bonito_spciconf_ops = {
>     .endianness = DEVICE_NATIVE_ENDIAN,
> };
>
> -#define BONITO_IRQ_BASE 32
> -
> static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
> {
>     BonitoState *s = opaque;
>     qemu_irq *pic = s->pic;
>     PCIBonitoState *bonito_state = s->pci_dev;
> -    int internal_irq = irq_num - BONITO_IRQ_BASE;
>
> -    if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) {
> +    if (bonito_state->regs[BONITO_INTEDGE] & (1 << irq_num)) {
>         qemu_irq_pulse(*pic);
>     } else {   /* level triggered */
> -        if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) {
> +        if (bonito_state->regs[BONITO_INTPOL] & (1 << irq_num)) {
>             qemu_irq_raise(*pic);
>         } else {
>             qemu_irq_lower(*pic);
> @@ -566,25 +566,9 @@ static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
>     }
> }
>
> -/* map the original irq (0~3) to bonito irq (16~47, but 16~31 are unused) */
> -static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
> +static int pci_bonito_map_irq(PCIDevice *pci_dev, int pin)
> {
> -    int slot;
> -
> -    slot = (pci_dev->devfn >> 3);
> -
> -    switch (slot) {
> -    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
> -        return irq_num % 4 + BONITO_IRQ_BASE;
> -    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
> -        return 4 + BONITO_IRQ_BASE;
> -    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
> -        return 5 + BONITO_IRQ_BASE;
> -    case 8 ... 12: /* PCI slot 1 to 4 */
> -        return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
> -    default:  /* Unknown device, don't do any translation */
> -        return irq_num;
> -    }
> +    return BONITO_PCI_IRQ_BASE + pin;
> }
>
> static void bonito_reset(void *opaque)
>

Re: [PATCH v3 3/8] hw/pci-host/bonito: Fixup IRQ mapping

[BALATON Zoltan via]

On Thu, 24 Dec 2020, BALATON Zoltan via wrote:
> On Thu, 24 Dec 2020, Jiaxun Yang wrote:
>> Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel,
>
> Typo: According
>
> How come, you say you can boot to Debian installer but don't need any IDE 
> changes when the kernel you submitted as test was shown not working with 
> current IDE emulation? Which installer do you use and what kernel does that 
> have? (The references to the installer and PMON are now missing in your cover 
> letter.)

Got the reference from v2 cover letter and it's a netboot kernel with an 
initrd so maybe you did boot into that but did not yet test with CD image 
or HDD so did not get to the IDE problem yet.

Regards,
BALATON Zoltan

>> despites south bridge IRQs needs special care, all other
>> IRQ pins are mapped by 'LOONGSON_IRQ_BASE + 25 + pin'.
>> 
>> As south bridge IRQs are all handled by ISA bus, we can
>> make a simple direct mapping.
>> 
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> ---
>> v3: Define BONITO_PCI_IRQ_BASE for readability (f4bug)
>> ---
>> hw/pci-host/bonito.c | 30 +++++++-----------------------
>> 1 file changed, 7 insertions(+), 23 deletions(-)
>> 
>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
>> index a99eced065..3fad470fc6 100644
>> --- a/hw/pci-host/bonito.c
>> +++ b/hw/pci-host/bonito.c
>> @@ -62,6 +62,9 @@
>> #define DPRINTF(fmt, ...)
>> #endif
>> 
>> +/* PCI slots IRQ pins start position */
>> +#define BONITO_PCI_IRQ_BASE         25
>> +
>> /* from linux soure code. include/asm-mips/mips-boards/bonito64.h*/
>> #define BONITO_BOOT_BASE        0x1fc00000
>> #define BONITO_BOOT_SIZE        0x00100000
>> @@ -546,19 +549,16 @@ static const MemoryRegionOps bonito_spciconf_ops = {
>>     .endianness = DEVICE_NATIVE_ENDIAN,
>> };
>> 
>> -#define BONITO_IRQ_BASE 32
>> -
>> static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
>> {
>>     BonitoState *s = opaque;
>>     qemu_irq *pic = s->pic;
>>     PCIBonitoState *bonito_state = s->pci_dev;
>> -    int internal_irq = irq_num - BONITO_IRQ_BASE;
>> 
>> -    if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) {
>> +    if (bonito_state->regs[BONITO_INTEDGE] & (1 << irq_num)) {
>>         qemu_irq_pulse(*pic);
>>     } else {   /* level triggered */
>> -        if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) {
>> +        if (bonito_state->regs[BONITO_INTPOL] & (1 << irq_num)) {
>>             qemu_irq_raise(*pic);
>>         } else {
>>             qemu_irq_lower(*pic);
>> @@ -566,25 +566,9 @@ static void pci_bonito_set_irq(void *opaque, int 
>> irq_num, int level)
>>     }
>> }
>> 
>> -/* map the original irq (0~3) to bonito irq (16~47, but 16~31 are unused) 
>> */
>> -static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
>> +static int pci_bonito_map_irq(PCIDevice *pci_dev, int pin)
>> {
>> -    int slot;
>> -
>> -    slot = (pci_dev->devfn >> 3);
>> -
>> -    switch (slot) {
>> -    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, 
>> MC97 */
>> -        return irq_num % 4 + BONITO_IRQ_BASE;
>> -    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
>> -        return 4 + BONITO_IRQ_BASE;
>> -    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
>> -        return 5 + BONITO_IRQ_BASE;
>> -    case 8 ... 12: /* PCI slot 1 to 4 */
>> -        return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
>> -    default:  /* Unknown device, don't do any translation */
>> -        return irq_num;
>> -    }
>> +    return BONITO_PCI_IRQ_BASE + pin;
>> }
>> 
>> static void bonito_reset(void *opaque)
>> 
>
>

Re: [PATCH v3 3/8] hw/pci-host/bonito: Fixup IRQ mapping

[Jiaxun Yang]

在 2020/12/24 16:40, BALATON Zoltan 写道:
> On Thu, 24 Dec 2020, BALATON Zoltan via wrote:
>> On Thu, 24 Dec 2020, Jiaxun Yang wrote:
>>> Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel,
>>
>> Typo: According
>>
>> How come, you say you can boot to Debian installer but don't need any 
>> IDE changes when the kernel you submitted as test was shown not 
>> working with current IDE emulation? Which installer do you use and 
>> what kernel does that have? (The references to the installer and PMON 
>> are now missing in your cover letter.)
>
> Got the reference from v2 cover letter and it's a netboot kernel with 
> an initrd so maybe you did boot into that but did not yet test with CD 
> image or HDD so did not get to the IDE problem yet.

Yes, I found this IRQ issue when I was trying to connect to ethernet.

Sorry for other stupid mistakes in ther series :-(
Needs coffee at the moment.

Thanks.

- Jiaxun

>
> Regards,
> BALATON Zoltan
>
>>> despites south bridge IRQs needs special care, all other
>>> IRQ pins are mapped by 'LOONGSON_IRQ_BASE + 25 + pin'.
>>>
>>> As south bridge IRQs are all handled by ISA bus, we can
>>> make a simple direct mapping.
>>>
>>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>>> ---
>>> v3: Define BONITO_PCI_IRQ_BASE for readability (f4bug)
>>> ---
>>> hw/pci-host/bonito.c | 30 +++++++-----------------------
>>> 1 file changed, 7 insertions(+), 23 deletions(-)
>>>
>>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
>>> index a99eced065..3fad470fc6 100644
>>> --- a/hw/pci-host/bonito.c
>>> +++ b/hw/pci-host/bonito.c
>>> @@ -62,6 +62,9 @@
>>> #define DPRINTF(fmt, ...)
>>> #endif
>>>
>>> +/* PCI slots IRQ pins start position */
>>> +#define BONITO_PCI_IRQ_BASE         25
>>> +
>>> /* from linux soure code. include/asm-mips/mips-boards/bonito64.h*/
>>> #define BONITO_BOOT_BASE        0x1fc00000
>>> #define BONITO_BOOT_SIZE        0x00100000
>>> @@ -546,19 +549,16 @@ static const MemoryRegionOps 
>>> bonito_spciconf_ops = {
>>>     .endianness = DEVICE_NATIVE_ENDIAN,
>>> };
>>>
>>> -#define BONITO_IRQ_BASE 32
>>> -
>>> static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
>>> {
>>>     BonitoState *s = opaque;
>>>     qemu_irq *pic = s->pic;
>>>     PCIBonitoState *bonito_state = s->pci_dev;
>>> -    int internal_irq = irq_num - BONITO_IRQ_BASE;
>>>
>>> -    if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) {
>>> +    if (bonito_state->regs[BONITO_INTEDGE] & (1 << irq_num)) {
>>>         qemu_irq_pulse(*pic);
>>>     } else {   /* level triggered */
>>> -        if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) {
>>> +        if (bonito_state->regs[BONITO_INTPOL] & (1 << irq_num)) {
>>>             qemu_irq_raise(*pic);
>>>         } else {
>>>             qemu_irq_lower(*pic);
>>> @@ -566,25 +566,9 @@ static void pci_bonito_set_irq(void *opaque, 
>>> int irq_num, int level)
>>>     }
>>> }
>>>
>>> -/* map the original irq (0~3) to bonito irq (16~47, but 16~31 are 
>>> unused) */
>>> -static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
>>> +static int pci_bonito_map_irq(PCIDevice *pci_dev, int pin)
>>> {
>>> -    int slot;
>>> -
>>> -    slot = (pci_dev->devfn >> 3);
>>> -
>>> -    switch (slot) {
>>> -    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, 
>>> AC97, MC97 */
>>> -        return irq_num % 4 + BONITO_IRQ_BASE;
>>> -    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
>>> -        return 4 + BONITO_IRQ_BASE;
>>> -    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
>>> -        return 5 + BONITO_IRQ_BASE;
>>> -    case 8 ... 12: /* PCI slot 1 to 4 */
>>> -        return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
>>> -    default:  /* Unknown device, don't do any translation */
>>> -        return irq_num;
>>> -    }
>>> +    return BONITO_PCI_IRQ_BASE + pin;
>>> }
>>>
>>> static void bonito_reset(void *opaque)
>>>
>>
>>

[PATCH v3 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping

[Jiaxun Yang]

The original mapping had wrong base address.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 hw/pci-host/bonito.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 3fad470fc6..737ee131e1 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -85,9 +85,8 @@
 #define BONITO_PCILO_BASE_VA    0xb0000000
 #define BONITO_PCILO_SIZE       0x0c000000
 #define BONITO_PCILO_TOP        (BONITO_PCILO_BASE + BONITO_PCILO_SIZE - 1)
-#define BONITO_PCILO0_BASE      0x10000000
-#define BONITO_PCILO1_BASE      0x14000000
-#define BONITO_PCILO2_BASE      0x18000000
+#define BONITO_PCILOx_BASE(x)   (BONITO_PCILO_BASE + BONITO_PCILOx_SIZE * x)
+#define BONITO_PCILOx_SIZE      0x04000000
 #define BONITO_PCIHI_BASE       0x20000000
 #define BONITO_PCIHI_SIZE       0x60000000
 #define BONITO_PCIHI_TOP        (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE - 1)
@@ -610,7 +609,7 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
 {
     PCIHostState *phb = PCI_HOST_BRIDGE(dev);
     BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
-    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
+    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 1);
 
     memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
     phb->bus = pci_register_root_bus(dev, "pci",
@@ -622,9 +621,10 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
         char *name = g_strdup_printf("pci.lomem%zu", i);
 
         memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
-                                 &bs->pci_mem, i * 64 * MiB, 64 * MiB);
+                                 &bs->pci_mem, BONITO_PCILOx_BASE(i),
+                                 BONITO_PCILOx_SIZE);
         memory_region_add_subregion(get_system_memory(),
-                                    BONITO_PCILO_BASE + i * 64 * MiB,
+                                    BONITO_PCILOx_BASE(i),
                                     &pcimem_lo_alias[i]);
         g_free(name);
     }
-- 
2.29.2

Re: [PATCH v3 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping

[Philippe Mathieu-Daudé]

On 12/24/20 4:17 AM, Jiaxun Yang wrote:
> The original mapping had wrong base address.

TBO this rational is a bit scarce ;)

I sent a patch implementing the REMAP register:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg769751.html

If this isn't enough with a Linux kernel because it expects
the the Bonito being configured by the bootloader, then we
need to do the mapping in write_bootloader().

> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  hw/pci-host/bonito.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index 3fad470fc6..737ee131e1 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -85,9 +85,8 @@
>  #define BONITO_PCILO_BASE_VA    0xb0000000
>  #define BONITO_PCILO_SIZE       0x0c000000
>  #define BONITO_PCILO_TOP        (BONITO_PCILO_BASE + BONITO_PCILO_SIZE - 1)
> -#define BONITO_PCILO0_BASE      0x10000000
> -#define BONITO_PCILO1_BASE      0x14000000
> -#define BONITO_PCILO2_BASE      0x18000000
> +#define BONITO_PCILOx_BASE(x)   (BONITO_PCILO_BASE + BONITO_PCILOx_SIZE * x)
> +#define BONITO_PCILOx_SIZE      0x04000000
>  #define BONITO_PCIHI_BASE       0x20000000
>  #define BONITO_PCIHI_SIZE       0x60000000
>  #define BONITO_PCIHI_TOP        (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE - 1)
> @@ -610,7 +609,7 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
>  {
>      PCIHostState *phb = PCI_HOST_BRIDGE(dev);
>      BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
> -    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
> +    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 1);
>  
>      memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
>      phb->bus = pci_register_root_bus(dev, "pci",
> @@ -622,9 +621,10 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
>          char *name = g_strdup_printf("pci.lomem%zu", i);
>  
>          memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
> -                                 &bs->pci_mem, i * 64 * MiB, 64 * MiB);
> +                                 &bs->pci_mem, BONITO_PCILOx_BASE(i),
> +                                 BONITO_PCILOx_SIZE);
>          memory_region_add_subregion(get_system_memory(),
> -                                    BONITO_PCILO_BASE + i * 64 * MiB,
> +                                    BONITO_PCILOx_BASE(i),
>                                      &pcimem_lo_alias[i]);
>          g_free(name);
>      }
> 

Re: [PATCH v3 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping

[Jiaxun Yang]

在 2021/1/1 下午7:07, Philippe Mathieu-Daudé 写道:
> On 12/24/20 4:17 AM, Jiaxun Yang wrote:
>> The original mapping had wrong base address.
> TBO this rational is a bit scarce ;)

Yes. I was just trying to get Linux work as I was programing facing the 
kernel,
not the hardware ;-(

I asked Loongson guys for a copy of Bonito 2E manual and they promised me
they'll give it to me after the holiday.

Thanks.

- Jiaxun

>
> I sent a patch implementing the REMAP register:
> https://www.mail-archive.com/qemu-devel@nongnu.org/msg769751.html
>
> If this isn't enough with a Linux kernel because it expects
> the the Bonito being configured by the bootloader, then we
> need to do the mapping in write_bootloader().
>
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> ---
>>   hw/pci-host/bonito.c | 12 ++++++------
>>   1 file changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
>> index 3fad470fc6..737ee131e1 100644
>> --- a/hw/pci-host/bonito.c
>> +++ b/hw/pci-host/bonito.c
>> @@ -85,9 +85,8 @@
>>   #define BONITO_PCILO_BASE_VA    0xb0000000
>>   #define BONITO_PCILO_SIZE       0x0c000000
>>   #define BONITO_PCILO_TOP        (BONITO_PCILO_BASE + BONITO_PCILO_SIZE - 1)
>> -#define BONITO_PCILO0_BASE      0x10000000
>> -#define BONITO_PCILO1_BASE      0x14000000
>> -#define BONITO_PCILO2_BASE      0x18000000
>> +#define BONITO_PCILOx_BASE(x)   (BONITO_PCILO_BASE + BONITO_PCILOx_SIZE * x)
>> +#define BONITO_PCILOx_SIZE      0x04000000
>>   #define BONITO_PCIHI_BASE       0x20000000
>>   #define BONITO_PCIHI_SIZE       0x60000000
>>   #define BONITO_PCIHI_TOP        (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE - 1)
>> @@ -610,7 +609,7 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
>>   {
>>       PCIHostState *phb = PCI_HOST_BRIDGE(dev);
>>       BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
>> -    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
>> +    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 1);
>>   
>>       memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
>>       phb->bus = pci_register_root_bus(dev, "pci",
>> @@ -622,9 +621,10 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
>>           char *name = g_strdup_printf("pci.lomem%zu", i);
>>   
>>           memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
>> -                                 &bs->pci_mem, i * 64 * MiB, 64 * MiB);
>> +                                 &bs->pci_mem, BONITO_PCILOx_BASE(i),
>> +                                 BONITO_PCILOx_SIZE);
>>           memory_region_add_subregion(get_system_memory(),
>> -                                    BONITO_PCILO_BASE + i * 64 * MiB,
>> +                                    BONITO_PCILOx_BASE(i),
>>                                       &pcimem_lo_alias[i]);
>>           g_free(name);
>>       }
>>

[PATCH v3 5/8] hw/mips/fuloong2e: Remove unused env entry

[Jiaxun Yang]

modetty is not handled by kernel and the parameter
here seems unreasonable.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
v3: Bring busclock back
---
 hw/mips/fuloong2e.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index d846ef7b00..c4843dd15e 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -159,10 +159,8 @@ static uint64_t load_kernel(CPUMIPSState *env)
     }
 
     /* Setup minimum environment variables */
-    prom_set(prom_buf, index++, "busclock=33000000");
     prom_set(prom_buf, index++, "cpuclock=100000000");
     prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
-    prom_set(prom_buf, index++, "modetty0=38400n8r");
     prom_set(prom_buf, index++, NULL);
 
     rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
-- 
2.29.2

Re: [PATCH v3 5/8] hw/mips/fuloong2e: Remove unused env entry

[BALATON Zoltan via]

On Thu, 24 Dec 2020, Jiaxun Yang wrote:
> modetty is not handled by kernel and the parameter
> here seems unreasonable.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> v3: Bring busclock back
> ---
> hw/mips/fuloong2e.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
> index d846ef7b00..c4843dd15e 100644
> --- a/hw/mips/fuloong2e.c
> +++ b/hw/mips/fuloong2e.c
> @@ -159,10 +159,8 @@ static uint64_t load_kernel(CPUMIPSState *env)
>     }
>
>     /* Setup minimum environment variables */
> -    prom_set(prom_buf, index++, "busclock=33000000");

Commit message does not mention removing this as well. Was this 
unintentionally left here?

Regards,
BALATON Zoltan

>     prom_set(prom_buf, index++, "cpuclock=100000000");
>     prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
> -    prom_set(prom_buf, index++, "modetty0=38400n8r");
>     prom_set(prom_buf, index++, NULL);
>
>     rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
>

Re: [PATCH v3 5/8] hw/mips/fuloong2e: Remove unused env entry

[Philippe Mathieu-Daudé]

On 12/24/20 4:17 AM, Jiaxun Yang wrote:
> modetty is not handled by kernel and the parameter
> here seems unreasonable.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> v3: Bring busclock back
> ---
>  hw/mips/fuloong2e.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
> index d846ef7b00..c4843dd15e 100644
> --- a/hw/mips/fuloong2e.c
> +++ b/hw/mips/fuloong2e.c
> @@ -159,10 +159,8 @@ static uint64_t load_kernel(CPUMIPSState *env)
>      }
>  
>      /* Setup minimum environment variables */
> -    prom_set(prom_buf, index++, "busclock=33000000");
>      prom_set(prom_buf, index++, "cpuclock=100000000");
>      prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
> -    prom_set(prom_buf, index++, "modetty0=38400n8r");
>      prom_set(prom_buf, index++, NULL);

This makes my Linux kernel 2.6 test behave oddly:

 (4/4)
tests/acceptance/machine_mips_fuloong2e.py:MipsFuloong2e.test_linux_kernel_isa_serial:
 console: Linux version 2.6.27.7lemote (root@debian) (gcc version 4.1.3
20080623 (prerelease) (Debian 4.1.2-23)) #6 Fri Dec 12 00:11:25 CST 2008
console: busclock=0, cpuclock=-2145008360,memsize=256,highmemsize=0
console: console [early0] enabled
console: CPU revision is: 00006302 (ICT Loongson-2)

Re: [PATCH v3 5/8] hw/mips/fuloong2e: Remove unused env entry

[Philippe Mathieu-Daudé]

On 1/1/21 7:05 PM, Philippe Mathieu-Daudé wrote:
> On 12/24/20 4:17 AM, Jiaxun Yang wrote:
>> modetty is not handled by kernel and the parameter
>> here seems unreasonable.
>>
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> ---
>> v3: Bring busclock back
>> ---
>>  hw/mips/fuloong2e.c | 2 --
>>  1 file changed, 2 deletions(-)
>>
>> diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
>> index d846ef7b00..c4843dd15e 100644
>> --- a/hw/mips/fuloong2e.c
>> +++ b/hw/mips/fuloong2e.c
>> @@ -159,10 +159,8 @@ static uint64_t load_kernel(CPUMIPSState *env)
>>      }
>>  
>>      /* Setup minimum environment variables */
>> -    prom_set(prom_buf, index++, "busclock=33000000");

Ah but you still removed busclock... This might explain why.

>>      prom_set(prom_buf, index++, "cpuclock=100000000");
>>      prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
>> -    prom_set(prom_buf, index++, "modetty0=38400n8r");
>>      prom_set(prom_buf, index++, NULL);
> 
> This makes my Linux kernel 2.6 test behave oddly:
> 
>  (4/4)
> tests/acceptance/machine_mips_fuloong2e.py:MipsFuloong2e.test_linux_kernel_isa_serial:
>  console: Linux version 2.6.27.7lemote (root@debian) (gcc version 4.1.3
> 20080623 (prerelease) (Debian 4.1.2-23)) #6 Fri Dec 12 00:11:25 CST 2008
> console: busclock=0, cpuclock=-2145008360,memsize=256,highmemsize=0
> console: console [early0] enabled
> console: CPU revision is: 00006302 (ICT Loongson-2)
> 

[PATCH v3 6/8] hw/mips/fuloong2e: Correct cpuclock env

[Jiaxun Yang]

It was missed in 3ca7639ff00 ("hw/mips/fuloong2e:
Set CPU frequency to 533 MHz"), we need to tell kernel
correct clocks.

Fixes: 3ca7639ff00 ("hw/mips/fuloong2e: Set CPU frequency to 533 MHz").
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/mips/fuloong2e.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index c4843dd15e..2744b211fd 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -100,7 +100,7 @@ static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t *prom_buf, int index,
     va_end(ap);
 }
 
-static uint64_t load_kernel(CPUMIPSState *env)
+static uint64_t load_kernel(MIPSCPU *cpu)
 {
     uint64_t kernel_entry, kernel_high, initrd_size;
     int index = 0;
@@ -159,7 +159,7 @@ static uint64_t load_kernel(CPUMIPSState *env)
     }
 
     /* Setup minimum environment variables */
-    prom_set(prom_buf, index++, "cpuclock=100000000");
+    prom_set(prom_buf, index++, "cpuclock=%u", clock_get_hz(cpu->clock));
     prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
     prom_set(prom_buf, index++, NULL);
 
@@ -304,7 +304,7 @@ static void mips_fuloong2e_init(MachineState *machine)
         loaderparams.kernel_filename = kernel_filename;
         loaderparams.kernel_cmdline = kernel_cmdline;
         loaderparams.initrd_filename = initrd_filename;
-        kernel_entry = load_kernel(env);
+        kernel_entry = load_kernel(cpu);
         write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
     } else {
         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
-- 
2.29.2

[PATCH v3 7/8] hw/mips/fuloong2e: Add highmem support

[Jiaxun Yang]

highmem starts at 0x20000000.
Now we can have up to 2G RAM.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
v2: Handle SPD for dual DIMM correctly.
v3: Typo corrections
---
 hw/mips/fuloong2e.c | 61 ++++++++++++++++++++++++++++++++++++---------
 1 file changed, 49 insertions(+), 12 deletions(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 2744b211fd..9c468974db 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -56,6 +56,7 @@
 /* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
 #define BIOS_SIZE               (512 * KiB)
 #define MAX_IDE_BUS             2
+#define HIGHMEM_START           0x20000000
 
 /*
  * PMON is not part of qemu and released with BSD license, anyone
@@ -71,7 +72,8 @@
 #define FULOONG2E_RTL8139_SLOT    7
 
 static struct _loaderparams {
-    int ram_size;
+    int ram_low_size;
+    int ram_high_size;
     const char *kernel_filename;
     const char *kernel_cmdline;
     const char *initrd_filename;
@@ -128,14 +130,14 @@ static uint64_t load_kernel(MIPSCPU *cpu)
         initrd_size = get_image_size(loaderparams.initrd_filename);
         if (initrd_size > 0) {
             initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE);
-            if (initrd_offset + initrd_size > loaderparams.ram_size) {
+            if (initrd_offset + initrd_size > loaderparams.ram_low_size) {
                 error_report("memory too small for initial ram disk '%s'",
                              loaderparams.initrd_filename);
                 exit(1);
             }
             initrd_size = load_image_targphys(loaderparams.initrd_filename,
                                               initrd_offset,
-                                              loaderparams.ram_size - initrd_offset);
+                                              loaderparams.ram_low_size - initrd_offset);
         }
         if (initrd_size == (target_ulong) -1) {
             error_report("could not load initial ram disk '%s'",
@@ -160,7 +162,11 @@ static uint64_t load_kernel(MIPSCPU *cpu)
 
     /* Setup minimum environment variables */
     prom_set(prom_buf, index++, "cpuclock=%u", clock_get_hz(cpu->clock));
-    prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
+    prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_low_size / MiB);
+    if (loaderparams.ram_high_size > 0) {
+            prom_set(prom_buf, index++, "highmemsize=%"PRIi64,
+                    loaderparams.ram_high_size / MiB);
+    }
     prom_set(prom_buf, index++, NULL);
 
     rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
@@ -186,7 +192,7 @@ static void write_bootloader(CPUMIPSState *env, uint8_t *base,
     p = (uint32_t *)(base + 0x040);
 
     bl_gen_jump_kernel(&p, ENVP_VADDR - 64, 2, ENVP_VADDR,
-                       ENVP_VADDR + 8, loaderparams.ram_size,
+                       ENVP_VADDR + 8, loaderparams.ram_low_size,
                        kernel_addr);
 }
 
@@ -258,8 +264,11 @@ static void mips_fuloong2e_init(MachineState *machine)
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
     const char *initrd_filename = machine->initrd_filename;
+    ram_addr_t ram_low_size, ram_high_size = 0;
     char *filename;
     MemoryRegion *address_space_mem = get_system_memory();
+    MemoryRegion *ram_low_alias = g_new(MemoryRegion, 1);
+    MemoryRegion *ram_high_alias;
     MemoryRegion *bios = g_new(MemoryRegion, 1);
     long bios_size;
     uint8_t *spd_data;
@@ -282,12 +291,31 @@ static void mips_fuloong2e_init(MachineState *machine)
 
     qemu_register_reset(main_cpu_reset, cpu);
 
-    /* TODO: support more than 256M RAM as highmem */
-    if (machine->ram_size != 256 * MiB) {
-        error_report("Invalid RAM size, should be 256MB");
+    if (machine->ram_size > 2 * GiB) {
+        error_report("Too much memory for this machine: %" PRId64 "MB,"
+                     " maximum 2048MB", machine->ram_size / MiB);
         exit(EXIT_FAILURE);
     }
-    memory_region_add_subregion(address_space_mem, 0, machine->ram);
+
+    ram_low_size = MIN(machine->ram_size, 256 * MiB);
+
+    memory_region_init_alias(ram_low_alias, NULL,
+                            "ram_low_alias",
+                            machine->ram, 0,
+                            ram_low_size);
+    memory_region_add_subregion(address_space_mem, 0,
+                                ram_low_alias);
+
+    if (machine->ram_size > 256 * MiB) {
+        ram_high_alias = g_new(MemoryRegion, 1);
+        ram_high_size = machine->ram_size - ram_low_size;
+        memory_region_init_alias(ram_high_alias, NULL,
+                                "ram_high_alias",
+                                machine->ram, ram_low_size,
+                                ram_high_size);
+        memory_region_add_subregion(address_space_mem, HIGHMEM_START,
+                                    ram_high_alias);
+    }
 
     /* Boot ROM */
     memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
@@ -300,7 +328,8 @@ static void mips_fuloong2e_init(MachineState *machine)
      */
 
     if (kernel_filename) {
-        loaderparams.ram_size = machine->ram_size;
+        loaderparams.ram_low_size = ram_low_size;
+        loaderparams.ram_high_size = ram_high_size;
         loaderparams.kernel_filename = kernel_filename;
         loaderparams.kernel_cmdline = kernel_cmdline;
         loaderparams.initrd_filename = initrd_filename;
@@ -345,8 +374,16 @@ static void mips_fuloong2e_init(MachineState *machine)
     }
 
     /* Populate SPD eeprom data */
-    spd_data = spd_data_generate(DDR, machine->ram_size);
-    smbus_eeprom_init_one(smbus, 0x50, spd_data);
+    if (machine->ram_size <= 1 * GiB) {
+        /* It supports maximum of 1 GiB per DIMM */
+        spd_data = spd_data_generate(DDR, machine->ram_size);
+        smbus_eeprom_init_one(smbus, 0x50, spd_data);
+    } else {
+        /* Split to dual DIMM for more than 1 GiB  */
+        spd_data = spd_data_generate(DDR, machine->ram_size / 2);
+        smbus_eeprom_init_one(smbus, 0x50, spd_data);
+        smbus_eeprom_init_one(smbus, 0x51, spd_data);
+    }
 
     mc146818_rtc_init(isa_bus, 2000, NULL);
 
-- 
2.29.2

[PATCH v3 8/8] tests/acceptance: Test boot_linux_console for fuloong2e

[Jiaxun Yang]

The kernel comes from debian archive so it's trusted.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
---
 tests/acceptance/boot_linux_console.py | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
index cc6ec0f8c1..fb41bb7144 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -170,6 +170,27 @@ class BootLinuxConsole(LinuxKernelTest):
         console_pattern = 'Kernel command line: %s' % kernel_command_line
         self.wait_for_console_pattern(console_pattern)
 
+    def test_mips64el_fuloong2e(self):
+        """
+        :avocado: tags=arch:mips64el
+        :avocado: tags=machine:fuloong2e
+        :avocado: tags=endian:little
+        """
+        deb_url = ('http://archive.debian.org/debian/pool/main/l/linux/'
+                   'linux-image-3.16.0-6-loongson-2e_3.16.56-1+deb8u1_mipsel.deb')
+        deb_hash = 'd04d446045deecf7b755ef576551de0c4184dd44'
+        deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash)
+        kernel_path = self.extract_from_deb(deb_path,
+                                            '/boot/vmlinux-3.16.0-6-loongson-2e')
+
+        self.vm.set_console()
+        kernel_command_line = self.KERNEL_COMMON_COMMAND_LINE + 'console=ttyS0'
+        self.vm.add_args('-kernel', kernel_path,
+                         '-append', kernel_command_line)
+        self.vm.launch()
+        console_pattern = 'Kernel command line: %s' % kernel_command_line
+        self.wait_for_console_pattern(console_pattern)
+
     def test_mips_malta_cpio(self):
         """
         :avocado: tags=arch:mips
-- 
2.29.2

Re: [PATCH v3 8/8] tests/acceptance: Test boot_linux_console for fuloong2e

[Philippe Mathieu-Daudé]

On 12/24/20 4:17 AM, Jiaxun Yang wrote:
> The kernel comes from debian archive so it's trusted.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
> Reviewed-by: Willian Rampazzo <willianr@redhat.com>
> Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
> ---
>  tests/acceptance/boot_linux_console.py | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Re: [PATCH v3 0/8] hw/mips/fuloong2e fixes

[Philippe Mathieu-Daudé]

On 12/24/20 4:17 AM, Jiaxun Yang wrote:
> It can now boot Debian installer[1] as well as a custom PMON bootloader
> distribution[2].
> 
> Note that it can't boot PMON shipped with actual machine as our ATI vgabios
> is using some x86 hack that can't be handled by x86emu in original PMON. 
> 
> 
> Tree avilable at: https://gitlab.com/FlyGoat/qemu/-/tree/fuloong_fixes_v2
> 
> v2:
>  - Collect review tags.
>  - Get CPU clock via elegant method. (philmd)
>  - Add boot_linux_console scceptance test
> 
> v3:
>  - Collect review tags
>  - Typo corrections
>  - Rewrite PCI Lomem
> 
> Jiaxun Yang (8):
>   hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT
>   hw/mips/fuloong2e: Relpace fault links
>   hw/pci-host/bonito: Fixup IRQ mapping
>   hw/pci-host/bonito: Fixup pci.lomem mapping
>   hw/mips/fuloong2e: Remove unused env entry
>   hw/mips/fuloong2e: Correct cpuclock env
>   hw/mips/fuloong2e: Add highmem support
>   tests/acceptance: Test boot_linux_console for fuloong2e
> 
>  hw/mips/fuloong2e.c                    | 84 +++++++++++++++++---------
>  hw/pci-host/bonito.c                   | 42 ++++---------
>  tests/acceptance/boot_linux_console.py | 21 +++++++
>  3 files changed, 89 insertions(+), 58 deletions(-)

Patches 1, 2, 5, 6 and 8 queued to mips-next.