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From: Julien Thierry <julien.thierry@arm.com>
To: Daniel Thompson <daniel.thompson@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, joel@joelfernandes.org,
	marc.zyngier@arm.com, mark.rutland@arm.com,
	christoffer.dall@arm.com, james.morse@arm.com,
	catalin.marinas@arm.com, will.deacon@arm.com
Subject: Re: [PATCH v4 00/26] arm64: provide pseudo NMI with GICv3
Date: Fri, 25 May 2018 14:42:29 +0100	[thread overview]
Message-ID: <8703b3e0-b5f8-e607-2d8f-3d0b71a5ec3c@arm.com> (raw)
In-Reply-To: <02afa8bb-5d27-f229-6085-8f61a626bc63@arm.com>



On 25/05/18 11:40, Julien Thierry wrote:
> 
> 
> On 25/05/18 11:16, Daniel Thompson wrote:
>> On Fri, May 25, 2018 at 10:49:06AM +0100, Julien Thierry wrote:
>>> This series is a continuation of the work started by Daniel [1]. The 
>>> goal
>>> is to use GICv3 interrupt priorities to simulate an NMI.
>>>
>>> To achieve this, set two priorities, one for standard interrupts and
>>> another, higher priority, for NMIs. Whenever we want to disable 
>>> interrupts,
>>> we mask the standard priority instead so NMIs can still be raised. Some
>>> corner cases though still require to actually mask all interrupts
>>> effectively disabling the NMI.
>>>
>>> Currently, only PPIs and SPIs can be set as NMIs. IPIs being currently
>>> hardcoded IRQ numbers, there isn't a generic interface to set SGIs as 
>>> NMI
>>> for now. I don't think there is any reason LPIs should be allowed to 
>>> be set
>>> as NMI as they do not have an active state.
>>> When an NMI is active on a CPU, no other NMI can be triggered on the 
>>> CPU.
>>>
>>> After the big refactoring I get performances similar to the ones I had
>>> in v3[2], reposting old results here:
>>>
>>> - "hackbench 200 process 1000" (average over 20 runs)
>>> +-----------+----------+------------+------------------+
>>> |           | native   | PMR guest  | v4.17-rc6 guest  |
>>> +-----------+----------+------------+------------------+
>>> | PMR host  | 40.0336s |   39.3039s |         39.2044s |
>>> | v4.17-rc6 | 40.4040s |   39.6011s |         39.1147s |
>>> +-----------+----------+------------+------------------+
>>>
>>> - Kernel build from defconfig:
>>> PMR host:  13m45.743s
>>> v4.17-rc6: 13m40.400s
>>>
>>> I'll try to post more detailed benchmarks later if I find notable
>>> differences with the previous version.
>>
>> Do you have a public git tree anywhere... I *can* apply 26 patches from
>> e-mail but I'd rather pull them!
>>
> 
> Yes that makes sense, I'll try to get one set up.
> 
> I'll let you know once I have done so.

My public git is up. You can pull the patches from:

git://linux-arm.org/linux-jt.git v4.17-pseudo-nmi

Cheers,

-- 
Julien Thierry

WARNING: multiple messages have this Message-ID (diff)
From: julien.thierry@arm.com (Julien Thierry)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 00/26] arm64: provide pseudo NMI with GICv3
Date: Fri, 25 May 2018 14:42:29 +0100	[thread overview]
Message-ID: <8703b3e0-b5f8-e607-2d8f-3d0b71a5ec3c@arm.com> (raw)
In-Reply-To: <02afa8bb-5d27-f229-6085-8f61a626bc63@arm.com>



On 25/05/18 11:40, Julien Thierry wrote:
> 
> 
> On 25/05/18 11:16, Daniel Thompson wrote:
>> On Fri, May 25, 2018 at 10:49:06AM +0100, Julien Thierry wrote:
>>> This series is a continuation of the work started by Daniel [1]. The 
>>> goal
>>> is to use GICv3 interrupt priorities to simulate an NMI.
>>>
>>> To achieve this, set two priorities, one for standard interrupts and
>>> another, higher priority, for NMIs. Whenever we want to disable 
>>> interrupts,
>>> we mask the standard priority instead so NMIs can still be raised. Some
>>> corner cases though still require to actually mask all interrupts
>>> effectively disabling the NMI.
>>>
>>> Currently, only PPIs and SPIs can be set as NMIs. IPIs being currently
>>> hardcoded IRQ numbers, there isn't a generic interface to set SGIs as 
>>> NMI
>>> for now. I don't think there is any reason LPIs should be allowed to 
>>> be set
>>> as NMI as they do not have an active state.
>>> When an NMI is active on a CPU, no other NMI can be triggered on the 
>>> CPU.
>>>
>>> After the big refactoring I get performances similar to the ones I had
>>> in v3[2], reposting old results here:
>>>
>>> - "hackbench 200 process 1000" (average over 20 runs)
>>> +-----------+----------+------------+------------------+
>>> |?????????? | native?? | PMR guest? | v4.17-rc6 guest? |
>>> +-----------+----------+------------+------------------+
>>> | PMR host? | 40.0336s |?? 39.3039s |???????? 39.2044s |
>>> | v4.17-rc6 | 40.4040s |?? 39.6011s |???????? 39.1147s |
>>> +-----------+----------+------------+------------------+
>>>
>>> - Kernel build from defconfig:
>>> PMR host:? 13m45.743s
>>> v4.17-rc6: 13m40.400s
>>>
>>> I'll try to post more detailed benchmarks later if I find notable
>>> differences with the previous version.
>>
>> Do you have a public git tree anywhere... I *can* apply 26 patches from
>> e-mail but I'd rather pull them!
>>
> 
> Yes that makes sense, I'll try to get one set up.
> 
> I'll let you know once I have done so.

My public git is up. You can pull the patches from:

git://linux-arm.org/linux-jt.git v4.17-pseudo-nmi

Cheers,

-- 
Julien Thierry

  reply	other threads:[~2018-05-25 13:42 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-25  9:49 [PATCH v4 00/26] arm64: provide pseudo NMI with GICv3 Julien Thierry
2018-05-25  9:49 ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 01/26] arm64: cpufeature: Set SYSREG_GIC_CPUIF as a boot system feature Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 02/26] arm64: cpufeature: Add cpufeature for IRQ priority masking Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25 10:04   ` Suzuki K Poulose
2018-05-25 10:04     ` Suzuki K Poulose
2018-05-25 10:17     ` Julien Thierry
2018-05-25 10:17       ` Julien Thierry
2018-05-25 10:36       ` Suzuki K Poulose
2018-05-25 10:36         ` Suzuki K Poulose
2018-05-25 10:39         ` Julien Thierry
2018-05-25 10:39           ` Julien Thierry
2018-05-25 10:41           ` Suzuki K Poulose
2018-05-25 10:41             ` Suzuki K Poulose
2018-05-25 10:48             ` Julien Thierry
2018-05-25 10:48               ` Julien Thierry
2018-06-12 13:46               ` Julien Thierry
2018-06-12 13:46                 ` Julien Thierry
2018-06-15 10:16                 ` Suzuki K Poulose
2018-06-15 10:16                   ` Suzuki K Poulose
2018-05-25  9:49 ` [PATCH v4 03/26] arm64: cpufeature: Use alternatives for VHE cpu_enable Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 04/26] arm64: alternative: Apply alternatives early in boot process Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25 10:00   ` Suzuki K Poulose
2018-05-25 10:00     ` Suzuki K Poulose
2018-05-25 10:25     ` Julien Thierry
2018-05-25 10:25       ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 05/26] irqchip/gic: Unify GIC priority definitions Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 06/26] irqchip/gic: Lower priority of GIC interrupts Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 07/26] irqchip/gic-v3: Remove acknowledge loop Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 08/26] arm64: daifflags: Use irqflags functions for daifflags Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 09/26] arm64: Use daifflag_restore after bp_hardening Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 10/26] arm64: Delay daif masking for user return Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 11/26] arm64: Make PMR part of task context Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 12/26] arm64: Unmask PMR before going idle Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 13/26] arm/arm64: gic-v3: Add helper functions to manage IRQ priorities Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 14/26] arm64: kvm: Unmask PMR before entering guest Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 15/26] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 16/26] arm64: daifflags: Include PMR in daifflags restore operations Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 17/26] irqchip/gic-v3: Factor group0 detection into functions Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 18/26] irqchip/gic-v3: Do not overwrite PMR value Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 19/26] irqchip/gic-v3: Switch to PMR masking after IRQ acknowledge Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 20/26] arm64: Switch to PMR masking when starting CPUs Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 21/26] arm64: Add build option for IRQ masking via priority Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 22/26] arm64: Detect current view of GIC priorities Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 23/26] irqchip/gic: Add functions to access irq priorities Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 24/26] irqchip/gic-v3: Add base support for pseudo-NMI Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-06-13 11:14   ` Julien Thierry
2018-06-13 11:14     ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 25/26] irqchip/gic-v3: Provide NMI handlers Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 26/26] irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI Julien Thierry
2018-05-25  9:49   ` Julien Thierry
2018-06-13 11:07   ` Julien Thierry
2018-06-13 11:07     ` Julien Thierry
2018-05-25 10:16 ` [PATCH v4 00/26] arm64: provide pseudo NMI with GICv3 Daniel Thompson
2018-05-25 10:16   ` Daniel Thompson
2018-05-25 10:40   ` Julien Thierry
2018-05-25 10:40     ` Julien Thierry
2018-05-25 13:42     ` Julien Thierry [this message]
2018-05-25 13:42       ` Julien Thierry
2018-07-20 15:09 ` Daniel Thompson
2018-07-20 15:09   ` Daniel Thompson
2018-07-23 12:39   ` Julien Thierry
2018-07-23 12:39     ` Julien Thierry

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