* [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock}
@ 2021-01-07 11:25 Anshuman Gupta
2021-01-07 18:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Anshuman Gupta @ 2021-01-07 11:25 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
We need a power_domain wakeref in pps_{lock,unlock} to prevent
a race while resetting pps state in intel_power_sequencer_reset().
intel_power_sequencer_reset() need a pps_mutex to access pps_pipe
but it can't grab pps_mutex due to deadlock with power_well
functions are called while holding pps_mutex.
intel_power_sequencer_reset() is called by power_well function
associated with legacy platforms like vlv and chv therefore re-use
the POWER_DOMAIN_DISPLAY_CORE power domain, which only used
by vlv and chv display power domain.
This will avoids the unnecessary noise of unrelated power wells
in pps_{lock,unlock}.
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 8a00e609085f..4f190a82d4ad 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -895,9 +895,7 @@ pps_lock(struct intel_dp *intel_dp)
* See intel_power_sequencer_reset() why we need
* a power domain reference here.
*/
- wakeref = intel_display_power_get(dev_priv,
- intel_aux_power_domain(dp_to_dig_port(intel_dp)));
-
+ wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
mutex_lock(&dev_priv->pps_mutex);
return wakeref;
@@ -909,9 +907,7 @@ pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
mutex_unlock(&dev_priv->pps_mutex);
- intel_display_power_put(dev_priv,
- intel_aux_power_domain(dp_to_dig_port(intel_dp)),
- wakeref);
+ intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return 0;
}
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock}
2021-01-07 11:25 [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock} Anshuman Gupta
@ 2021-01-07 18:24 ` Patchwork
2021-01-07 23:09 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-08 9:38 ` [Intel-gfx] [PATCH] " Jani Nikula
2 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2021-01-07 18:24 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 3325 bytes --]
== Series Details ==
Series: drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock}
URL : https://patchwork.freedesktop.org/series/85582/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9562 -> Patchwork_19281
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/index.html
Known issues
------------
Here are the changes found in Patchwork_19281 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@query-info:
- fi-tgl-y: NOTRUN -> [SKIP][1] ([fdo#109315] / [i915#2575])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/fi-tgl-y/igt@amdgpu/amd_basic@query-info.html
* igt@prime_self_import@basic-with_one_bo_two_files:
- fi-tgl-y: [PASS][2] -> [DMESG-WARN][3] ([i915#402])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-y: [DMESG-WARN][4] ([i915#2411] / [i915#402]) -> [PASS][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
* igt@i915_selftest@live@sanitycheck:
- fi-kbl-7500u: [DMESG-WARN][6] ([i915#2605]) -> [PASS][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/fi-kbl-7500u/igt@i915_selftest@live@sanitycheck.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/fi-kbl-7500u/igt@i915_selftest@live@sanitycheck.html
* igt@prime_vgem@basic-fence-flip:
- fi-tgl-y: [DMESG-WARN][8] ([i915#402]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2605]: https://gitlab.freedesktop.org/drm/intel/issues/2605
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (43 -> 38)
------------------------------
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9562 -> Patchwork_19281
CI-20190529: 20190529
CI_DRM_9562: fc8d32007355b4babc37b621b3c9a4e0fe998d27 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5946: 641e5545213dd9a82d80a4e065013a138afb58ff @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19281: 60b4502979d34a8e9b8b1b57dae40cd213ca7dca @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
60b4502979d3 drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock}
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/index.html
[-- Attachment #1.2: Type: text/html, Size: 4175 bytes --]
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock}
2021-01-07 11:25 [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock} Anshuman Gupta
2021-01-07 18:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
@ 2021-01-07 23:09 ` Patchwork
2021-01-08 9:38 ` [Intel-gfx] [PATCH] " Jani Nikula
2 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2021-01-07 23:09 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 20570 bytes --]
== Series Details ==
Series: drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock}
URL : https://patchwork.freedesktop.org/series/85582/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9562_full -> Patchwork_19281_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19281_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@perf_pmu@rc6-suspend}:
- shard-snb: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-snb6/igt@perf_pmu@rc6-suspend.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-snb4/igt@perf_pmu@rc6-suspend.html
Known issues
------------
Here are the changes found in Patchwork_19281_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@engines-hostile:
- shard-hsw: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-hsw4/igt@gem_ctx_persistence@engines-hostile.html
* igt@gem_ctx_persistence@legacy-engines-mixed:
- shard-snb: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1099])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-snb6/igt@gem_ctx_persistence@legacy-engines-mixed.html
* igt@gem_exec_whisper@basic-forked-all:
- shard-glk: [PASS][5] -> [DMESG-WARN][6] ([i915#118] / [i915#95]) +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-glk9/igt@gem_exec_whisper@basic-forked-all.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-glk8/igt@gem_exec_whisper@basic-forked-all.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][7] -> [SKIP][8] ([i915#2190])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-tglb1/igt@gem_huc_copy@huc-copy.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-tglb6/igt@gem_huc_copy@huc-copy.html
* igt@gem_userptr_blits@mmap-offset-invalidate-active@wb:
- shard-snb: NOTRUN -> [SKIP][9] ([fdo#109271]) +48 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-snb6/igt@gem_userptr_blits@mmap-offset-invalidate-active@wb.html
* igt@gem_userptr_blits@process-exit-mmap@wc:
- shard-hsw: NOTRUN -> [SKIP][10] ([fdo#109271]) +161 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-hsw7/igt@gem_userptr_blits@process-exit-mmap@wc.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-apl: [PASS][11] -> [INCOMPLETE][12] ([i915#1630] / [i915#2405])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-apl8/igt@gem_workarounds@suspend-resume-fd.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-apl8/igt@gem_workarounds@suspend-resume-fd.html
* igt@i915_module_load@reload:
- shard-skl: [PASS][13] -> [DMESG-WARN][14] ([i915#1982])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl7/igt@i915_module_load@reload.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl1/igt@i915_module_load@reload.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-skl: [PASS][15] -> [FAIL][16] ([i915#2521])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl6/igt@kms_async_flips@alternate-sync-async-flip.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl8/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
- shard-snb: NOTRUN -> [SKIP][17] ([fdo#109271] / [fdo#111827]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-snb6/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html
* igt@kms_color_chamelium@pipe-d-ctm-0-25:
- shard-skl: NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111827]) +9 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl5/igt@kms_color_chamelium@pipe-d-ctm-0-25.html
* igt@kms_color_chamelium@pipe-invalid-gamma-lut-sizes:
- shard-hsw: NOTRUN -> [SKIP][19] ([fdo#109271] / [fdo#111827]) +9 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-hsw4/igt@kms_color_chamelium@pipe-invalid-gamma-lut-sizes.html
* igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen:
- shard-skl: NOTRUN -> [FAIL][20] ([i915#54])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html
* igt@kms_cursor_crc@pipe-b-cursor-128x42-random:
- shard-skl: [PASS][21] -> [FAIL][22] ([i915#54]) +5 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-128x42-random.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl4/igt@kms_cursor_crc@pipe-b-cursor-128x42-random.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [PASS][23] -> [FAIL][24] ([i915#72])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-glk5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-glk3/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-atomic:
- shard-skl: NOTRUN -> [FAIL][25] ([i915#2346])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-atomic.html
* igt@kms_cursor_legacy@pipe-d-torture-move:
- shard-skl: NOTRUN -> [SKIP][26] ([fdo#109271]) +81 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl9/igt@kms_cursor_legacy@pipe-d-torture-move.html
* igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1:
- shard-glk: [PASS][27] -> [FAIL][28] ([i915#79]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-glk4/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-glk9/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
* igt@kms_flip@plain-flip-ts-check@a-edp1:
- shard-skl: [PASS][29] -> [FAIL][30] ([i915#2122])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl9/igt@kms_flip@plain-flip-ts-check@a-edp1.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl2/igt@kms_flip@plain-flip-ts-check@a-edp1.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
- shard-skl: NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#533])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl5/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [PASS][32] -> [SKIP][33] ([fdo#109441]) +1 similar issue
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-iclb4/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_psr@suspend:
- shard-skl: [PASS][34] -> [INCOMPLETE][35] ([i915#198])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl9/igt@kms_psr@suspend.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl2/igt@kms_psr@suspend.html
* igt@perf@polling-parameterized:
- shard-skl: [PASS][36] -> [FAIL][37] ([i915#1542])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl6/igt@perf@polling-parameterized.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl7/igt@perf@polling-parameterized.html
* igt@perf@polling-small-buf:
- shard-skl: NOTRUN -> [FAIL][38] ([i915#1722])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl5/igt@perf@polling-small-buf.html
* igt@sysfs_heartbeat_interval@mixed@rcs0:
- shard-skl: [PASS][39] -> [FAIL][40] ([i915#1731])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl6/igt@sysfs_heartbeat_interval@mixed@rcs0.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl8/igt@sysfs_heartbeat_interval@mixed@rcs0.html
#### Possible fixes ####
* igt@gem_ctx_isolation@preservation-s3@vcs0:
- shard-skl: [INCOMPLETE][41] ([i915#198]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl3/igt@gem_ctx_isolation@preservation-s3@vcs0.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl5/igt@gem_ctx_isolation@preservation-s3@vcs0.html
* {igt@gem_exec_fair@basic-deadline}:
- shard-kbl: [FAIL][43] ([i915#2846]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-kbl6/igt@gem_exec_fair@basic-deadline.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-kbl2/igt@gem_exec_fair@basic-deadline.html
* {igt@gem_exec_fair@basic-flow@rcs0}:
- shard-tglb: [FAIL][45] ([i915#2842]) -> [PASS][46] +2 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-tglb5/igt@gem_exec_fair@basic-flow@rcs0.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-tglb7/igt@gem_exec_fair@basic-flow@rcs0.html
* {igt@gem_exec_fair@basic-none-share@rcs0}:
- shard-iclb: [FAIL][47] ([i915#2842]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-iclb5/igt@gem_exec_fair@basic-none-share@rcs0.html
* {igt@gem_exec_fair@basic-pace-share@rcs0}:
- shard-glk: [FAIL][49] ([i915#2842]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-glk5/igt@gem_exec_fair@basic-pace-share@rcs0.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-glk5/igt@gem_exec_fair@basic-pace-share@rcs0.html
* {igt@gem_exec_fair@basic-pace@vcs0}:
- shard-kbl: [SKIP][51] ([fdo#109271]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-kbl1/igt@gem_exec_fair@basic-pace@vcs0.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs0.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy@uc:
- shard-snb: [INCOMPLETE][53] -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-snb6/igt@gem_userptr_blits@map-fixed-invalidate-busy@uc.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-snb6/igt@gem_userptr_blits@map-fixed-invalidate-busy@uc.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [DMESG-WARN][55] ([i915#1436] / [i915#716]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl5/igt@gen9_exec_parse@allowed-single.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl6/igt@gen9_exec_parse@allowed-single.html
* igt@kms_cursor_crc@pipe-b-cursor-128x128-random:
- shard-skl: [FAIL][57] ([i915#54]) -> [PASS][58] +8 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-128x128-random.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl5/igt@kms_cursor_crc@pipe-b-cursor-128x128-random.html
* igt@kms_cursor_edge_walk@pipe-a-128x128-top-edge:
- shard-snb: [SKIP][59] ([fdo#109271]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-snb4/igt@kms_cursor_edge_walk@pipe-a-128x128-top-edge.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-snb4/igt@kms_cursor_edge_walk@pipe-a-128x128-top-edge.html
* igt@kms_cursor_edge_walk@pipe-c-256x256-right-edge:
- shard-skl: [DMESG-WARN][61] ([i915#1982]) -> [PASS][62] +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl2/igt@kms_cursor_edge_walk@pipe-c-256x256-right-edge.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl7/igt@kms_cursor_edge_walk@pipe-c-256x256-right-edge.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
- shard-skl: [FAIL][63] ([i915#2122]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl5/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [FAIL][65] ([i915#1188]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl5/igt@kms_hdr@bpc-switch-dpms.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl2/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [FAIL][67] ([fdo#108145] / [i915#265]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][69] ([fdo#109642] / [fdo#111068]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-iclb6/igt@kms_psr2_su@frontbuffer.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_dpms:
- shard-iclb: [SKIP][71] ([fdo#109441]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-iclb8/igt@kms_psr@psr2_dpms.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-iclb2/igt@kms_psr@psr2_dpms.html
* igt@perf@polling-parameterized:
- shard-glk: [FAIL][73] ([i915#1542]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-glk8/igt@perf@polling-parameterized.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-glk2/igt@perf@polling-parameterized.html
#### Warnings ####
* igt@kms_async_flips@test-time-stamp:
- shard-tglb: [FAIL][75] ([i915#2574]) -> [FAIL][76] ([i915#2597])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-tglb6/igt@kms_async_flips@test-time-stamp.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-tglb2/igt@kms_async_flips@test-time-stamp.html
* igt@runner@aborted:
- shard-iclb: [FAIL][77] ([i915#2295] / [i915#2724] / [i915#483]) -> [FAIL][78] ([i915#2295] / [i915#2724])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-iclb5/igt@runner@aborted.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-iclb4/igt@runner@aborted.html
- shard-apl: [FAIL][79] ([i915#2295]) -> ([FAIL][80], [FAIL][81]) ([i915#1610] / [i915#2295] / [i915#2426])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-apl4/igt@runner@aborted.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-apl2/igt@runner@aborted.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-apl1/igt@runner@aborted.html
- shard-tglb: [FAIL][82] ([i915#2295] / [i915#2667]) -> ([FAIL][83], [FAIL][84]) ([i915#2295] / [i915#2426] / [i915#2667] / [i915#2803])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-tglb1/igt@runner@aborted.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-tglb1/igt@runner@aborted.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-tglb7/igt@runner@aborted.html
- shard-skl: ([FAIL][85], [FAIL][86]) ([i915#1436] / [i915#2295] / [i915#483]) -> ([FAIL][87], [FAIL][88]) ([i915#2295] / [i915#2426] / [i915#483])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl5/igt@runner@aborted.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9562/shard-skl5/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl9/igt@runner@aborted.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/shard-skl6/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
[i915#1630]: https://gitlab.freedesktop.org/drm/intel/issues/1630
[i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
[i915#1731]: https://gitlab.freedesktop.org/drm/intel/issues/1731
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2405]: https://gitlab.freedesktop.org/drm/intel/issues/2405
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#2574]: https://gitlab.freedesktop.org/drm/intel/issues/2574
[i915#2597]: https://gitlab.freedesktop.org/drm/intel/issues/2597
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2667]: https://gitlab.freedesktop.org/drm/intel/issues/2667
[i915#2724]: https://gitlab.freedesktop.org/drm/intel/issues/2724
[i915#2803]: https://gitlab.freedesktop.org/drm/intel/issues/2803
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2849]: https://gitlab.freedesktop.org/drm/intel/issues/2849
[i915#483]: https://gitlab.freedesktop.org/drm/intel/issues/483
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_9562 -> Patchwork_19281
CI-20190529: 20190529
CI_DRM_9562: fc8d32007355b4babc37b621b3c9a4e0fe998d27 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5946: 641e5545213dd9a82d80a4e065013a138afb58ff @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19281: 60b4502979d34a8e9b8b1b57dae40cd213ca7dca @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19281/index.html
[-- Attachment #1.2: Type: text/html, Size: 24627 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock}
2021-01-07 11:25 [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock} Anshuman Gupta
2021-01-07 18:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-01-07 23:09 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2021-01-08 9:38 ` Jani Nikula
2021-01-08 14:33 ` Imre Deak
2 siblings, 1 reply; 7+ messages in thread
From: Jani Nikula @ 2021-01-08 9:38 UTC (permalink / raw)
To: Anshuman Gupta, intel-gfx
On Thu, 07 Jan 2021, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
> We need a power_domain wakeref in pps_{lock,unlock} to prevent
> a race while resetting pps state in intel_power_sequencer_reset().
>
> intel_power_sequencer_reset() need a pps_mutex to access pps_pipe
> but it can't grab pps_mutex due to deadlock with power_well
> functions are called while holding pps_mutex.
> intel_power_sequencer_reset() is called by power_well function
> associated with legacy platforms like vlv and chv therefore re-use
> the POWER_DOMAIN_DISPLAY_CORE power domain, which only used
> by vlv and chv display power domain.
>
> This will avoids the unnecessary noise of unrelated power wells
> in pps_{lock,unlock}.
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Imre convinced me yesterday on irc that this should work.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
On the surface, this reduces the need to enable/disable the aux power so
much. It's unnecessary, so it stands to reason to optimize it. We should
only grab the domain references we actually need.
However, this *also* papers over an issue we've been seeing [1]. We need
to be aware the root cause for that remains unknown, and needs to be
figured out.
I presume simply doing aux transfers won't reproduce the problem,
because that disables the power asynchronously since commit f39194a7a8b9
("drm/i915: Disable power asynchronously during DP AUX
transfers"). Perhaps we wouldn't have seen this at all if pps_unlock()
also did that as suggested in the commit message.
Anyway, I'd like to get acks or rb's from Imre and Ville before merging
this.
BR,
Jani.
[1] http://lore.kernel.org/r/20201204081845.26528-1-anshuman.gupta@intel.com
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 8a00e609085f..4f190a82d4ad 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -895,9 +895,7 @@ pps_lock(struct intel_dp *intel_dp)
> * See intel_power_sequencer_reset() why we need
> * a power domain reference here.
> */
> - wakeref = intel_display_power_get(dev_priv,
> - intel_aux_power_domain(dp_to_dig_port(intel_dp)));
> -
> + wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
> mutex_lock(&dev_priv->pps_mutex);
>
> return wakeref;
> @@ -909,9 +907,7 @@ pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref)
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>
> mutex_unlock(&dev_priv->pps_mutex);
> - intel_display_power_put(dev_priv,
> - intel_aux_power_domain(dp_to_dig_port(intel_dp)),
> - wakeref);
> + intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
> return 0;
> }
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock}
2021-01-08 9:38 ` [Intel-gfx] [PATCH] " Jani Nikula
@ 2021-01-08 14:33 ` Imre Deak
2021-01-08 16:40 ` Jani Nikula
0 siblings, 1 reply; 7+ messages in thread
From: Imre Deak @ 2021-01-08 14:33 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Fri, Jan 08, 2021 at 11:38:04AM +0200, Jani Nikula wrote:
> On Thu, 07 Jan 2021, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
> > We need a power_domain wakeref in pps_{lock,unlock} to prevent
> > a race while resetting pps state in intel_power_sequencer_reset().
> >
> > intel_power_sequencer_reset() need a pps_mutex to access pps_pipe
> > but it can't grab pps_mutex due to deadlock with power_well
> > functions are called while holding pps_mutex.
> > intel_power_sequencer_reset() is called by power_well function
> > associated with legacy platforms like vlv and chv therefore re-use
> > the POWER_DOMAIN_DISPLAY_CORE power domain, which only used
> > by vlv and chv display power domain.
> >
> > This will avoids the unnecessary noise of unrelated power wells
> > in pps_{lock,unlock}.
> >
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
>
> Imre convinced me yesterday on irc that this should work.
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>
> On the surface, this reduces the need to enable/disable the aux power so
> much. It's unnecessary, so it stands to reason to optimize it. We should
> only grab the domain references we actually need.
>
> However, this *also* papers over an issue we've been seeing [1]. We need
> to be aware the root cause for that remains unknown, and needs to be
> figured out.
>
> I presume simply doing aux transfers won't reproduce the problem,
> because that disables the power asynchronously since commit f39194a7a8b9
> ("drm/i915: Disable power asynchronously during DP AUX
> transfers"). Perhaps we wouldn't have seen this at all if pps_unlock()
> also did that as suggested in the commit message.
>
> Anyway, I'd like to get acks or rb's from Imre and Ville before merging
> this.
Looks ok to me:
Acked-by: Imre Deak <imre.deak@intel.com>
>
>
> BR,
> Jani.
>
>
> [1] http://lore.kernel.org/r/20201204081845.26528-1-anshuman.gupta@intel.com
>
>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 8 ++------
> > 1 file changed, 2 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 8a00e609085f..4f190a82d4ad 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -895,9 +895,7 @@ pps_lock(struct intel_dp *intel_dp)
> > * See intel_power_sequencer_reset() why we need
> > * a power domain reference here.
> > */
> > - wakeref = intel_display_power_get(dev_priv,
> > - intel_aux_power_domain(dp_to_dig_port(intel_dp)));
> > -
> > + wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
> > mutex_lock(&dev_priv->pps_mutex);
> >
> > return wakeref;
> > @@ -909,9 +907,7 @@ pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref)
> > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> >
> > mutex_unlock(&dev_priv->pps_mutex);
> > - intel_display_power_put(dev_priv,
> > - intel_aux_power_domain(dp_to_dig_port(intel_dp)),
> > - wakeref);
> > + intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
> > return 0;
> > }
>
> --
> Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock}
2021-01-08 14:33 ` Imre Deak
@ 2021-01-08 16:40 ` Jani Nikula
0 siblings, 0 replies; 7+ messages in thread
From: Jani Nikula @ 2021-01-08 16:40 UTC (permalink / raw)
To: imre.deak; +Cc: intel-gfx
On Fri, 08 Jan 2021, Imre Deak <imre.deak@intel.com> wrote:
> On Fri, Jan 08, 2021 at 11:38:04AM +0200, Jani Nikula wrote:
>> On Thu, 07 Jan 2021, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
>> > We need a power_domain wakeref in pps_{lock,unlock} to prevent
>> > a race while resetting pps state in intel_power_sequencer_reset().
>> >
>> > intel_power_sequencer_reset() need a pps_mutex to access pps_pipe
>> > but it can't grab pps_mutex due to deadlock with power_well
>> > functions are called while holding pps_mutex.
>> > intel_power_sequencer_reset() is called by power_well function
>> > associated with legacy platforms like vlv and chv therefore re-use
>> > the POWER_DOMAIN_DISPLAY_CORE power domain, which only used
>> > by vlv and chv display power domain.
>> >
>> > This will avoids the unnecessary noise of unrelated power wells
>> > in pps_{lock,unlock}.
>> >
>> > Cc: Jani Nikula <jani.nikula@intel.com>
>> > Cc: Imre Deak <imre.deak@intel.com>
>> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
>>
>> Imre convinced me yesterday on irc that this should work.
>>
>> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>>
>> On the surface, this reduces the need to enable/disable the aux power so
>> much. It's unnecessary, so it stands to reason to optimize it. We should
>> only grab the domain references we actually need.
>>
>> However, this *also* papers over an issue we've been seeing [1]. We need
>> to be aware the root cause for that remains unknown, and needs to be
>> figured out.
>>
>> I presume simply doing aux transfers won't reproduce the problem,
>> because that disables the power asynchronously since commit f39194a7a8b9
>> ("drm/i915: Disable power asynchronously during DP AUX
>> transfers"). Perhaps we wouldn't have seen this at all if pps_unlock()
>> also did that as suggested in the commit message.
>>
>> Anyway, I'd like to get acks or rb's from Imre and Ville before merging
>> this.
>
> Looks ok to me:
> Acked-by: Imre Deak <imre.deak@intel.com>
Thanks, pushed to din.
BR,
Jani.
>
>>
>>
>> BR,
>> Jani.
>>
>>
>> [1] http://lore.kernel.org/r/20201204081845.26528-1-anshuman.gupta@intel.com
>>
>>
>> > ---
>> > drivers/gpu/drm/i915/display/intel_dp.c | 8 ++------
>> > 1 file changed, 2 insertions(+), 6 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> > index 8a00e609085f..4f190a82d4ad 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> > @@ -895,9 +895,7 @@ pps_lock(struct intel_dp *intel_dp)
>> > * See intel_power_sequencer_reset() why we need
>> > * a power domain reference here.
>> > */
>> > - wakeref = intel_display_power_get(dev_priv,
>> > - intel_aux_power_domain(dp_to_dig_port(intel_dp)));
>> > -
>> > + wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
>> > mutex_lock(&dev_priv->pps_mutex);
>> >
>> > return wakeref;
>> > @@ -909,9 +907,7 @@ pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref)
>> > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>> >
>> > mutex_unlock(&dev_priv->pps_mutex);
>> > - intel_display_power_put(dev_priv,
>> > - intel_aux_power_domain(dp_to_dig_port(intel_dp)),
>> > - wakeref);
>> > + intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
>> > return 0;
>> > }
>>
>> --
>> Jani Nikula, Intel Open Source Graphics Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [Intel-gfx] [RFC v2] drm/i915/pps: Add PPS power domain
@ 2021-01-06 4:34 Anshuman Gupta
2021-01-07 11:23 ` [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock} Anshuman Gupta
0 siblings, 1 reply; 7+ messages in thread
From: Anshuman Gupta @ 2021-01-06 4:34 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
It abstracts getting the AUX power domain in pps_lock under
PPS power domain. This makes sure that the platforms which really
requires AUX power in order to access PPS registers will get the
reference to necessary power wells.
PPS power domain requires only to track the AUX_A associated
power wells as the platforms need AUX power in order to access PPS
registers supports eDP only on PORT_A.
v2:
- Fixed missed POWER_DOMAIN_PPS in pps_unlock().
Cc: Imre Deak <imre.deak@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_power.c | 7 +++++++
drivers/gpu/drm/i915/display/intel_display_power.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 7 ++-----
3 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index d52374f01316..1dc4ca9e5d1a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -107,6 +107,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "VGA";
case POWER_DOMAIN_AUDIO:
return "AUDIO";
+ case POWER_DOMAIN_PPS:
+ return "PPS";
case POWER_DOMAIN_AUX_A:
return "AUX_A";
case POWER_DOMAIN_AUX_B:
@@ -2651,11 +2653,13 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915,
BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
BIT_ULL(POWER_DOMAIN_MODESET) | \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
+ BIT_ULL(POWER_DOMAIN_PPS) | \
BIT_ULL(POWER_DOMAIN_GMBUS) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define BXT_DPIO_CMN_A_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_PORT_DDI_A_LANES) | \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
+ BIT_ULL(POWER_DOMAIN_PPS) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define BXT_DPIO_CMN_BC_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \
@@ -2688,6 +2692,7 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915,
#define GLK_DPIO_CMN_A_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_PORT_DDI_A_LANES) | \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
+ BIT_ULL(POWER_DOMAIN_PPS) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define GLK_DPIO_CMN_B_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \
@@ -2700,6 +2705,7 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915,
#define GLK_DISPLAY_AUX_A_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \
+ BIT_ULL(POWER_DOMAIN_PPS) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define GLK_DISPLAY_AUX_B_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_AUX_B) | \
@@ -2712,6 +2718,7 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915,
BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
BIT_ULL(POWER_DOMAIN_MODESET) | \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
+ BIT_ULL(POWER_DOMAIN_PPS) | \
BIT_ULL(POWER_DOMAIN_GMBUS) | \
BIT_ULL(POWER_DOMAIN_INIT))
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index bc30c479be53..7642be3c8e2e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -55,6 +55,7 @@ enum intel_display_power_domain {
POWER_DOMAIN_PORT_OTHER,
POWER_DOMAIN_VGA,
POWER_DOMAIN_AUDIO,
+ POWER_DOMAIN_PPS,
POWER_DOMAIN_AUX_A,
POWER_DOMAIN_AUX_B,
POWER_DOMAIN_AUX_C,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 8a00e609085f..99b4bec3c926 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -895,8 +895,7 @@ pps_lock(struct intel_dp *intel_dp)
* See intel_power_sequencer_reset() why we need
* a power domain reference here.
*/
- wakeref = intel_display_power_get(dev_priv,
- intel_aux_power_domain(dp_to_dig_port(intel_dp)));
+ wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_PPS);
mutex_lock(&dev_priv->pps_mutex);
@@ -909,9 +908,7 @@ pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
mutex_unlock(&dev_priv->pps_mutex);
- intel_display_power_put(dev_priv,
- intel_aux_power_domain(dp_to_dig_port(intel_dp)),
- wakeref);
+ intel_display_power_put(dev_priv, POWER_DOMAIN_PPS, wakeref);
return 0;
}
--
2.26.2
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock}
2021-01-06 4:34 [Intel-gfx] [RFC v2] drm/i915/pps: Add PPS power domain Anshuman Gupta
@ 2021-01-07 11:23 ` Anshuman Gupta
0 siblings, 0 replies; 7+ messages in thread
From: Anshuman Gupta @ 2021-01-07 11:23 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
We need a power_domain wakeref in pps_{lock,unlock} to prevent
a race while resetting pps state in intel_power_sequencer_reset().
intel_power_sequencer_reset() need a pps_mutex to access pps_pipe
but it can't grab pps_mutex due to deadlock with power_well
functions are called while holding pps_mutex.
intel_power_sequencer_reset() is called by power_well function
associated with legacy platforms like vlv and chv therefore re-use
the POWER_DOMAIN_DISPLAY_CORE power domain, which only used
by vlv and chv display power domain.
This will avoids the unnecessary noise of unrelated power wells
in pps_{lock,unlock}.
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 8a00e609085f..4f190a82d4ad 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -895,9 +895,7 @@ pps_lock(struct intel_dp *intel_dp)
* See intel_power_sequencer_reset() why we need
* a power domain reference here.
*/
- wakeref = intel_display_power_get(dev_priv,
- intel_aux_power_domain(dp_to_dig_port(intel_dp)));
-
+ wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
mutex_lock(&dev_priv->pps_mutex);
return wakeref;
@@ -909,9 +907,7 @@ pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
mutex_unlock(&dev_priv->pps_mutex);
- intel_display_power_put(dev_priv,
- intel_aux_power_domain(dp_to_dig_port(intel_dp)),
- wakeref);
+ intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return 0;
}
--
2.26.2
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-01-08 16:41 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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2021-01-07 11:25 [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock} Anshuman Gupta
2021-01-07 18:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-01-07 23:09 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-08 9:38 ` [Intel-gfx] [PATCH] " Jani Nikula
2021-01-08 14:33 ` Imre Deak
2021-01-08 16:40 ` Jani Nikula
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2021-01-06 4:34 [Intel-gfx] [RFC v2] drm/i915/pps: Add PPS power domain Anshuman Gupta
2021-01-07 11:23 ` [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock} Anshuman Gupta
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