From: "Allen-KH Cheng (程冠勳)" <Allen-KH.Cheng@mediatek.com> To: "matthias.bgg@gmail.com" <matthias.bgg@gmail.com>, "lee@kernel.org" <lee@kernel.org>, "krzysztof.kozlowski@linaro.org" <krzysztof.kozlowski@linaro.org>, "angelogioacchino.delregno@collabora.com" <angelogioacchino.delregno@collabora.com>, "robh+dt@kernel.org" <robh+dt@kernel.org> Cc: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "linux-mediatek@lists.infradead.org" <linux-mediatek@lists.infradead.org>, "hsinyi@chromium.org" <hsinyi@chromium.org>, Project_Global_Chrome_Upstream_Group <Project_Global_Chrome_Upstream_Group@mediatek.com>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org> Subject: Re: [PATCH 3/5] arm64: dts: mt8186: Add IOMMU and SMI nodes Date: Tue, 27 Sep 2022 13:53:02 +0000 [thread overview] Message-ID: <8d1b3ce07de7974ec77976cf98d337e68967b11f.camel@mediatek.com> (raw) In-Reply-To: <6f1deed3-87e5-6d73-74b7-f5123c7f4362@collabora.com> Hi Angelo, On Tue, 2022-09-27 at 15:40 +0200, AngeloGioacchino Del Regno wrote: > Il 23/09/22 15:11, Allen-KH Cheng ha scritto: > > Add iommu and smi nodes for mt8186 SoC. > > > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > > --- > > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 173 > > +++++++++++++++++++++++ > > 1 file changed, 173 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > index 833e7037fe22..68f06bef88f3 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > @@ -7,6 +7,7 @@ > > #include <dt-bindings/clock/mt8186-clk.h> > > #include <dt-bindings/interrupt-controller/arm-gic.h> > > #include <dt-bindings/interrupt-controller/irq.h> > > +#include <dt-bindings/memory/mt8186-memory-port.h> > > #include <dt-bindings/pinctrl/mt8186-pinfunc.h> > > #include <dt-bindings/power/mt8186-power.h> > > #include <dt-bindings/phy/phy.h> > > @@ -944,24 +945,113 @@ > > #reset-cells = <1>; > > }; > > > > + smi_common: smi@14002000 { > > + compatible = "mediatek,mt8186-smi-common"; > > + reg = <0 0x14002000 0 0x1000>; > > + clocks = <&mmsys CLK_MM_SMI_COMMON>, <&mmsys > > CLK_MM_SMI_COMMON>, > > + <&mmsys CLK_MM_SMI_GALS>, <&mmsys > > CLK_MM_SMI_GALS>; > > + clock-names = "apb", "smi", "gals0", "gals1"; > > + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; > > + }; > > + > > + larb0: smi@14003000 { > > + compatible = "mediatek,mt8186-smi-larb"; > > + reg = <0 0x14003000 0 0x1000>; > > + mediatek,larb-id = <0>; > > + mediatek,smi = <&smi_common>; > > Order by name after reg please... > > compatible > reg > clocks > clock-names > mediatek,larb-id > mediatek,smi > power-domains > Ok, no problem. In the next version, I will solve this. Thanks, Allen > > + clocks = <&mmsys CLK_MM_SMI_COMMON>, > > + <&mmsys CLK_MM_SMI_COMMON>; > > + clock-names = "apb", "smi"; > > + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; > > + }; > > + > > + larb1: smi@14004000 { > > + compatible = "mediatek,mt8186-smi-larb"; > > + reg = <0 0x14004000 0 0x1000>; > > + mediatek,larb-id = <1>; > > + mediatek,smi = <&smi_common>; > > + clocks = <&mmsys CLK_MM_SMI_COMMON>, > > + <&mmsys CLK_MM_SMI_COMMON>; > > + clock-names = "apb", "smi"; > > + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; > > + }; > > + > > + iommu_mm: iommu@14016000 { > > + compatible = "mediatek,mt8186-iommu-mm"; > > + reg = <0 0x14016000 0 0x1000>; > > + mediatek,larbs = <&larb0 &larb1 &larb2 &larb4 > > + &larb7 &larb8 &larb9 &larb11 > > + &larb13 &larb14 &larb16 > > &larb17 > > + &larb19 &larb20>; > > + interrupts = <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH > > 0>; > > + clocks = <&mmsys CLK_MM_SMI_IOMMU>; > > + clock-names = "bclk"; > > clocks > clock-names > interrupts > mediatek,larbs > power-domains > > ...etc :-) > > P.S.: Same comment for the other commits, too! > > Regards, > Angelo > >
WARNING: multiple messages have this Message-ID (diff)
From: "Allen-KH Cheng (程冠勳)" <Allen-KH.Cheng@mediatek.com> To: "matthias.bgg@gmail.com" <matthias.bgg@gmail.com>, "lee@kernel.org" <lee@kernel.org>, "krzysztof.kozlowski@linaro.org" <krzysztof.kozlowski@linaro.org>, "angelogioacchino.delregno@collabora.com" <angelogioacchino.delregno@collabora.com>, "robh+dt@kernel.org" <robh+dt@kernel.org> Cc: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "linux-mediatek@lists.infradead.org" <linux-mediatek@lists.infradead.org>, "hsinyi@chromium.org" <hsinyi@chromium.org>, Project_Global_Chrome_Upstream_Group <Project_Global_Chrome_Upstream_Group@mediatek.com>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org> Subject: Re: [PATCH 3/5] arm64: dts: mt8186: Add IOMMU and SMI nodes Date: Tue, 27 Sep 2022 13:53:02 +0000 [thread overview] Message-ID: <8d1b3ce07de7974ec77976cf98d337e68967b11f.camel@mediatek.com> (raw) In-Reply-To: <6f1deed3-87e5-6d73-74b7-f5123c7f4362@collabora.com> Hi Angelo, On Tue, 2022-09-27 at 15:40 +0200, AngeloGioacchino Del Regno wrote: > Il 23/09/22 15:11, Allen-KH Cheng ha scritto: > > Add iommu and smi nodes for mt8186 SoC. > > > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > > --- > > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 173 > > +++++++++++++++++++++++ > > 1 file changed, 173 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > index 833e7037fe22..68f06bef88f3 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > @@ -7,6 +7,7 @@ > > #include <dt-bindings/clock/mt8186-clk.h> > > #include <dt-bindings/interrupt-controller/arm-gic.h> > > #include <dt-bindings/interrupt-controller/irq.h> > > +#include <dt-bindings/memory/mt8186-memory-port.h> > > #include <dt-bindings/pinctrl/mt8186-pinfunc.h> > > #include <dt-bindings/power/mt8186-power.h> > > #include <dt-bindings/phy/phy.h> > > @@ -944,24 +945,113 @@ > > #reset-cells = <1>; > > }; > > > > + smi_common: smi@14002000 { > > + compatible = "mediatek,mt8186-smi-common"; > > + reg = <0 0x14002000 0 0x1000>; > > + clocks = <&mmsys CLK_MM_SMI_COMMON>, <&mmsys > > CLK_MM_SMI_COMMON>, > > + <&mmsys CLK_MM_SMI_GALS>, <&mmsys > > CLK_MM_SMI_GALS>; > > + clock-names = "apb", "smi", "gals0", "gals1"; > > + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; > > + }; > > + > > + larb0: smi@14003000 { > > + compatible = "mediatek,mt8186-smi-larb"; > > + reg = <0 0x14003000 0 0x1000>; > > + mediatek,larb-id = <0>; > > + mediatek,smi = <&smi_common>; > > Order by name after reg please... > > compatible > reg > clocks > clock-names > mediatek,larb-id > mediatek,smi > power-domains > Ok, no problem. In the next version, I will solve this. Thanks, Allen > > + clocks = <&mmsys CLK_MM_SMI_COMMON>, > > + <&mmsys CLK_MM_SMI_COMMON>; > > + clock-names = "apb", "smi"; > > + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; > > + }; > > + > > + larb1: smi@14004000 { > > + compatible = "mediatek,mt8186-smi-larb"; > > + reg = <0 0x14004000 0 0x1000>; > > + mediatek,larb-id = <1>; > > + mediatek,smi = <&smi_common>; > > + clocks = <&mmsys CLK_MM_SMI_COMMON>, > > + <&mmsys CLK_MM_SMI_COMMON>; > > + clock-names = "apb", "smi"; > > + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; > > + }; > > + > > + iommu_mm: iommu@14016000 { > > + compatible = "mediatek,mt8186-iommu-mm"; > > + reg = <0 0x14016000 0 0x1000>; > > + mediatek,larbs = <&larb0 &larb1 &larb2 &larb4 > > + &larb7 &larb8 &larb9 &larb11 > > + &larb13 &larb14 &larb16 > > &larb17 > > + &larb19 &larb20>; > > + interrupts = <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH > > 0>; > > + clocks = <&mmsys CLK_MM_SMI_IOMMU>; > > + clock-names = "bclk"; > > clocks > clock-names > interrupts > mediatek,larbs > power-domains > > ...etc :-) > > P.S.: Same comment for the other commits, too! > > Regards, > Angelo > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-09-27 13:53 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-23 13:11 [PATCH 0/5] Add some driver nodes for MT8186 SoC Allen-KH Cheng 2022-09-23 13:11 ` Allen-KH Cheng 2022-09-23 13:11 ` [PATCH 1/5] dt-bindings: mfd: mediatek: Add scpsys compatible for mt8186 Allen-KH Cheng 2022-09-23 13:11 ` Allen-KH Cheng 2022-09-23 17:47 ` Krzysztof Kozlowski 2022-09-23 17:47 ` Krzysztof Kozlowski 2022-09-26 7:48 ` Lee Jones 2022-09-26 7:48 ` Lee Jones 2022-09-23 13:11 ` [PATCH 2/5] arm64: dts: mt8186: Add power domains controller Allen-KH Cheng 2022-09-23 13:11 ` Allen-KH Cheng 2022-09-27 13:47 ` AngeloGioacchino Del Regno 2022-09-27 13:47 ` AngeloGioacchino Del Regno 2022-09-23 13:11 ` [PATCH 3/5] arm64: dts: mt8186: Add IOMMU and SMI nodes Allen-KH Cheng 2022-09-23 13:11 ` Allen-KH Cheng 2022-09-27 13:40 ` AngeloGioacchino Del Regno 2022-09-27 13:40 ` AngeloGioacchino Del Regno 2022-09-27 13:53 ` Allen-KH Cheng (程冠勳) [this message] 2022-09-27 13:53 ` Allen-KH Cheng (程冠勳) 2022-09-23 13:11 ` [PATCH 4/5] arm64: dts: mt8186: Add dpi node Allen-KH Cheng 2022-09-23 13:11 ` Allen-KH Cheng 2022-09-23 13:11 ` [PATCH 5/5] arm64: dts: mt8186: Add xhci nodes Allen-KH Cheng 2022-09-23 13:11 ` Allen-KH Cheng 2022-09-27 13:48 ` AngeloGioacchino Del Regno 2022-09-27 13:48 ` AngeloGioacchino Del Regno
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