* Re: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
2016-10-23 3:21 ` Ding Tianhong
@ 2016-10-23 12:04 ` Shawn Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2016-10-23 12:04 UTC (permalink / raw)
To: Ding Tianhong
Cc: Catalin Marinas, Will Deacon, Marc Zyngier, Mark Rutland,
Scott Wood, devicetree-u79uwXL29TY76Z2rM5mHXA,
stuart.yoder-3arQi8VN3Tc,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Sun, Oct 23, 2016 at 11:21:10AM +0800, Ding Tianhong wrote:
> This erratum describes a bug in logic outside the core, so MIDR can't be
> used to identify its presence, and reading an SoC-specific revision
> register from common arch timer code would be awkward. So, describe it
> in the device tree.
>
> Signed-off-by: Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
> ---
> Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
> index ef5fbe9..26bc837 100644
> --- a/Documentation/devicetree/bindings/arm/arch_timer.txt
> +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
> @@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
> This also affects writes to the tval register, due to the implicit
> counter read.
>
> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
> + QorIQ erratum 161201, which says that reading the counter is
QorIQ is a Freescale/NXP specific name, and shouldn't be there.
Shawn
> + unreliable unless the small range of value is returned by back-to-back reads.
> + This also affects writes to the tval register, due to the implicit
> + counter read.
> +
> ** Optional properties:
>
> - arm,cpu-registers-not-fw-configured : Firmware does not initialize
> --
> 1.9.0
>
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
@ 2016-10-23 12:04 ` Shawn Guo
0 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2016-10-23 12:04 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, Oct 23, 2016 at 11:21:10AM +0800, Ding Tianhong wrote:
> This erratum describes a bug in logic outside the core, so MIDR can't be
> used to identify its presence, and reading an SoC-specific revision
> register from common arch timer code would be awkward. So, describe it
> in the device tree.
>
> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
> ---
> Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
> index ef5fbe9..26bc837 100644
> --- a/Documentation/devicetree/bindings/arm/arch_timer.txt
> +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
> @@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
> This also affects writes to the tval register, due to the implicit
> counter read.
>
> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
> + QorIQ erratum 161201, which says that reading the counter is
QorIQ is a Freescale/NXP specific name, and shouldn't be there.
Shawn
> + unreliable unless the small range of value is returned by back-to-back reads.
> + This also affects writes to the tval register, due to the implicit
> + counter read.
> +
> ** Optional properties:
>
> - arm,cpu-registers-not-fw-configured : Firmware does not initialize
> --
> 1.9.0
>
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
2016-10-23 12:04 ` Shawn Guo
@ 2016-10-24 5:46 ` Ding Tianhong
-1 siblings, 0 replies; 22+ messages in thread
From: Ding Tianhong @ 2016-10-24 5:46 UTC (permalink / raw)
To: Shawn Guo
Cc: Catalin Marinas, Will Deacon, Marc Zyngier, Mark Rutland,
Scott Wood, devicetree-u79uwXL29TY76Z2rM5mHXA,
stuart.yoder-3arQi8VN3Tc,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 2016/10/23 20:04, Shawn Guo wrote:
> On Sun, Oct 23, 2016 at 11:21:10AM +0800, Ding Tianhong wrote:
>> This erratum describes a bug in logic outside the core, so MIDR can't be
>> used to identify its presence, and reading an SoC-specific revision
>> register from common arch timer code would be awkward. So, describe it
>> in the device tree.
>>
>> Signed-off-by: Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>> ---
>> Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> index ef5fbe9..26bc837 100644
>> --- a/Documentation/devicetree/bindings/arm/arch_timer.txt
>> +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> @@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
>> This also affects writes to the tval register, due to the implicit
>> counter read.
>>
>> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
>> + QorIQ erratum 161201, which says that reading the counter is
>
> QorIQ is a Freescale/NXP specific name, and shouldn't be there.
>
> Shawn
>
Got it, will wait other feedback and fix them together, thanks.
Ding
>> + unreliable unless the small range of value is returned by back-to-back reads.
>> + This also affects writes to the tval register, due to the implicit
>> + counter read.
>> +
>> ** Optional properties:
>>
>> - arm,cpu-registers-not-fw-configured : Firmware does not initialize
>> --
>> 1.9.0
>>
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> .
>
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To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
@ 2016-10-24 5:46 ` Ding Tianhong
0 siblings, 0 replies; 22+ messages in thread
From: Ding Tianhong @ 2016-10-24 5:46 UTC (permalink / raw)
To: linux-arm-kernel
On 2016/10/23 20:04, Shawn Guo wrote:
> On Sun, Oct 23, 2016 at 11:21:10AM +0800, Ding Tianhong wrote:
>> This erratum describes a bug in logic outside the core, so MIDR can't be
>> used to identify its presence, and reading an SoC-specific revision
>> register from common arch timer code would be awkward. So, describe it
>> in the device tree.
>>
>> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
>> ---
>> Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> index ef5fbe9..26bc837 100644
>> --- a/Documentation/devicetree/bindings/arm/arch_timer.txt
>> +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> @@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
>> This also affects writes to the tval register, due to the implicit
>> counter read.
>>
>> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
>> + QorIQ erratum 161201, which says that reading the counter is
>
> QorIQ is a Freescale/NXP specific name, and shouldn't be there.
>
> Shawn
>
Got it, will wait other feedback and fix them together, thanks.
Ding
>> + unreliable unless the small range of value is returned by back-to-back reads.
>> + This also affects writes to the tval register, due to the implicit
>> + counter read.
>> +
>> ** Optional properties:
>>
>> - arm,cpu-registers-not-fw-configured : Firmware does not initialize
>> --
>> 1.9.0
>>
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
2016-10-23 3:21 ` Ding Tianhong
@ 2016-10-24 8:36 ` Marc Zyngier
-1 siblings, 0 replies; 22+ messages in thread
From: Marc Zyngier @ 2016-10-24 8:36 UTC (permalink / raw)
To: Ding Tianhong, Catalin Marinas, Will Deacon, Mark Rutland
Cc: Scott Wood, devicetree-u79uwXL29TY76Z2rM5mHXA, Shawn Guo,
stuart.yoder-3arQi8VN3Tc,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 23/10/16 04:21, Ding Tianhong wrote:
> This erratum describes a bug in logic outside the core, so MIDR can't be
> used to identify its presence, and reading an SoC-specific revision
> register from common arch timer code would be awkward. So, describe it
> in the device tree.
>
> Signed-off-by: Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
> ---
> Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
> index ef5fbe9..26bc837 100644
> --- a/Documentation/devicetree/bindings/arm/arch_timer.txt
> +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
> @@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
> This also affects writes to the tval register, due to the implicit
> counter read.
>
> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
> + QorIQ erratum 161201, which says that reading the counter is
Other than the copy/paste of the FSL erratum, please document the actual
erratum number. Is that 161x01 or 161201?
> + unreliable unless the small range of value is returned by back-to-back reads.
That's a detail that doesn't belong in the DT, but that would be much
better next to the code doing the actual handling.
> + This also affects writes to the tval register, due to the implicit
> + counter read.
> +
> ** Optional properties:
>
> - arm,cpu-registers-not-fw-configured : Firmware does not initialize
>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
@ 2016-10-24 8:36 ` Marc Zyngier
0 siblings, 0 replies; 22+ messages in thread
From: Marc Zyngier @ 2016-10-24 8:36 UTC (permalink / raw)
To: linux-arm-kernel
On 23/10/16 04:21, Ding Tianhong wrote:
> This erratum describes a bug in logic outside the core, so MIDR can't be
> used to identify its presence, and reading an SoC-specific revision
> register from common arch timer code would be awkward. So, describe it
> in the device tree.
>
> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
> ---
> Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
> index ef5fbe9..26bc837 100644
> --- a/Documentation/devicetree/bindings/arm/arch_timer.txt
> +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
> @@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
> This also affects writes to the tval register, due to the implicit
> counter read.
>
> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
> + QorIQ erratum 161201, which says that reading the counter is
Other than the copy/paste of the FSL erratum, please document the actual
erratum number. Is that 161x01 or 161201?
> + unreliable unless the small range of value is returned by back-to-back reads.
That's a detail that doesn't belong in the DT, but that would be much
better next to the code doing the actual handling.
> + This also affects writes to the tval register, due to the implicit
> + counter read.
> +
> ** Optional properties:
>
> - arm,cpu-registers-not-fw-configured : Firmware does not initialize
>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 22+ messages in thread
[parent not found: <3a29c03a-2da1-7bfe-28ff-21dada50ee8d-5wv7dgnIgG8@public.gmane.org>]
* Re: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
2016-10-24 8:36 ` Marc Zyngier
@ 2016-10-24 8:43 ` Ding Tianhong
-1 siblings, 0 replies; 22+ messages in thread
From: Ding Tianhong @ 2016-10-24 8:43 UTC (permalink / raw)
To: Marc Zyngier, Catalin Marinas, Will Deacon, Mark Rutland
Cc: Scott Wood, devicetree-u79uwXL29TY76Z2rM5mHXA, Shawn Guo,
stuart.yoder-3arQi8VN3Tc,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 2016/10/24 16:36, Marc Zyngier wrote:
> On 23/10/16 04:21, Ding Tianhong wrote:
>> This erratum describes a bug in logic outside the core, so MIDR can't be
>> used to identify its presence, and reading an SoC-specific revision
>> register from common arch timer code would be awkward. So, describe it
>> in the device tree.
>>
>> Signed-off-by: Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>> ---
>> Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> index ef5fbe9..26bc837 100644
>> --- a/Documentation/devicetree/bindings/arm/arch_timer.txt
>> +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> @@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
>> This also affects writes to the tval register, due to the implicit
>> counter read.
>>
>> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
>> + QorIQ erratum 161201, which says that reading the counter is
>
> Other than the copy/paste of the FSL erratum, please document the actual
> erratum number. Is that 161x01 or 161201?
>
Sorry for the lazy behavior.
>> + unreliable unless the small range of value is returned by back-to-back reads.
>
> That's a detail that doesn't belong in the DT, but that would be much
> better next to the code doing the actual handling.
>
Got it.
Thanks
Ding
>> + This also affects writes to the tval register, due to the implicit
>> + counter read.
>> +
>> ** Optional properties:
>>
>> - arm,cpu-registers-not-fw-configured : Firmware does not initialize
>>
>
> Thanks,
>
> M.
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
@ 2016-10-24 8:43 ` Ding Tianhong
0 siblings, 0 replies; 22+ messages in thread
From: Ding Tianhong @ 2016-10-24 8:43 UTC (permalink / raw)
To: linux-arm-kernel
On 2016/10/24 16:36, Marc Zyngier wrote:
> On 23/10/16 04:21, Ding Tianhong wrote:
>> This erratum describes a bug in logic outside the core, so MIDR can't be
>> used to identify its presence, and reading an SoC-specific revision
>> register from common arch timer code would be awkward. So, describe it
>> in the device tree.
>>
>> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
>> ---
>> Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> index ef5fbe9..26bc837 100644
>> --- a/Documentation/devicetree/bindings/arm/arch_timer.txt
>> +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> @@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
>> This also affects writes to the tval register, due to the implicit
>> counter read.
>>
>> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
>> + QorIQ erratum 161201, which says that reading the counter is
>
> Other than the copy/paste of the FSL erratum, please document the actual
> erratum number. Is that 161x01 or 161201?
>
Sorry for the lazy behavior.
>> + unreliable unless the small range of value is returned by back-to-back reads.
>
> That's a detail that doesn't belong in the DT, but that would be much
> better next to the code doing the actual handling.
>
Got it.
Thanks
Ding
>> + This also affects writes to the tval register, due to the implicit
>> + counter read.
>> +
>> ** Optional properties:
>>
>> - arm,cpu-registers-not-fw-configured : Firmware does not initialize
>>
>
> Thanks,
>
> M.
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
2016-10-23 3:21 ` Ding Tianhong
@ 2016-10-24 11:16 ` Mark Rutland
-1 siblings, 0 replies; 22+ messages in thread
From: Mark Rutland @ 2016-10-24 11:16 UTC (permalink / raw)
To: Ding Tianhong
Cc: Catalin Marinas, Will Deacon, Marc Zyngier, Scott Wood,
devicetree-u79uwXL29TY76Z2rM5mHXA, Shawn Guo,
stuart.yoder-3arQi8VN3Tc,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Sun, Oct 23, 2016 at 11:21:10AM +0800, Ding Tianhong wrote:
> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
> + QorIQ erratum 161201, which says that reading the counter is
> + unreliable unless the small range of value is returned by back-to-back reads.
> + This also affects writes to the tval register, due to the implicit
> + counter read.
Is "161x01" the *exact* erratum number, or is the 'x' a wildcard? Please
use the *exact* erratum number, even if that means we have to list
several.
Is "161x01" an *erratum* number, or the *part* number of affected
devices?
Thanks,
Mark.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
@ 2016-10-24 11:16 ` Mark Rutland
0 siblings, 0 replies; 22+ messages in thread
From: Mark Rutland @ 2016-10-24 11:16 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, Oct 23, 2016 at 11:21:10AM +0800, Ding Tianhong wrote:
> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
> + QorIQ erratum 161201, which says that reading the counter is
> + unreliable unless the small range of value is returned by back-to-back reads.
> + This also affects writes to the tval register, due to the implicit
> + counter read.
Is "161x01" the *exact* erratum number, or is the 'x' a wildcard? Please
use the *exact* erratum number, even if that means we have to list
several.
Is "161x01" an *erratum* number, or the *part* number of affected
devices?
Thanks,
Mark.
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
2016-10-24 11:16 ` Mark Rutland
@ 2016-10-24 12:40 ` Ding Tianhong
-1 siblings, 0 replies; 22+ messages in thread
From: Ding Tianhong @ 2016-10-24 12:40 UTC (permalink / raw)
To: Mark Rutland
Cc: devicetree, Marc Zyngier, Catalin Marinas, Will Deacon,
stuart.yoder, Scott Wood, Shawn Guo, linux-arm-kernel
On 2016/10/24 19:16, Mark Rutland wrote:
> On Sun, Oct 23, 2016 at 11:21:10AM +0800, Ding Tianhong wrote:
>> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
>> + QorIQ erratum 161201, which says that reading the counter is
>> + unreliable unless the small range of value is returned by back-to-back reads.
>> + This also affects writes to the tval register, due to the implicit
>> + counter read.
>
> Is "161x01" the *exact* erratum number, or is the 'x' a wildcard? Please
> use the *exact* erratum number, even if that means we have to list
> several.
>
Hi Mark:
The 'x' is a wildcard, it will cover 161001 to 161601 several numbers, I will discuss to
the chip develop and get a exact erratum number.
Thanks.
Ding
> Is "161x01" an *erratum* number, or the *part* number of affected
> devices?
>
> Thanks,
> Mark.
>
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
@ 2016-10-24 12:40 ` Ding Tianhong
0 siblings, 0 replies; 22+ messages in thread
From: Ding Tianhong @ 2016-10-24 12:40 UTC (permalink / raw)
To: linux-arm-kernel
On 2016/10/24 19:16, Mark Rutland wrote:
> On Sun, Oct 23, 2016 at 11:21:10AM +0800, Ding Tianhong wrote:
>> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
>> + QorIQ erratum 161201, which says that reading the counter is
>> + unreliable unless the small range of value is returned by back-to-back reads.
>> + This also affects writes to the tval register, due to the implicit
>> + counter read.
>
> Is "161x01" the *exact* erratum number, or is the 'x' a wildcard? Please
> use the *exact* erratum number, even if that means we have to list
> several.
>
Hi Mark:
The 'x' is a wildcard, it will cover 161001 to 161601 several numbers, I will discuss to
the chip develop and get a exact erratum number.
Thanks.
Ding
> Is "161x01" an *erratum* number, or the *part* number of affected
> devices?
>
> Thanks,
> Mark.
>
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread
[parent not found: <7e839df8-f8f7-3b16-8321-4ff45b6c5884-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>]
* Re: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
2016-10-24 12:40 ` Ding Tianhong
@ 2016-10-24 13:16 ` Mark Rutland
-1 siblings, 0 replies; 22+ messages in thread
From: Mark Rutland @ 2016-10-24 13:16 UTC (permalink / raw)
To: Ding Tianhong
Cc: Catalin Marinas, Will Deacon, Marc Zyngier, Scott Wood,
devicetree-u79uwXL29TY76Z2rM5mHXA, Shawn Guo,
stuart.yoder-3arQi8VN3Tc,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Mon, Oct 24, 2016 at 08:40:01PM +0800, Ding Tianhong wrote:
> On 2016/10/24 19:16, Mark Rutland wrote:
> > Is "161x01" the *exact* erratum number, or is the 'x' a wildcard?
>
> The 'x' is a wildcard, it will cover 161001 to 161601 several numbers,
Given you're using a wildcard, I take it that this is a *part* number?
Thanks,
Mark.
--
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
@ 2016-10-24 13:16 ` Mark Rutland
0 siblings, 0 replies; 22+ messages in thread
From: Mark Rutland @ 2016-10-24 13:16 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Oct 24, 2016 at 08:40:01PM +0800, Ding Tianhong wrote:
> On 2016/10/24 19:16, Mark Rutland wrote:
> > Is "161x01" the *exact* erratum number, or is the 'x' a wildcard?
>
> The 'x' is a wildcard, it will cover 161001 to 161601 several numbers,
Given you're using a wildcard, I take it that this is a *part* number?
Thanks,
Mark.
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
2016-10-24 13:16 ` Mark Rutland
@ 2016-10-24 13:23 ` Ding Tianhong
-1 siblings, 0 replies; 22+ messages in thread
From: Ding Tianhong @ 2016-10-24 13:23 UTC (permalink / raw)
To: Mark Rutland
Cc: Catalin Marinas, Will Deacon, Marc Zyngier, Scott Wood,
devicetree-u79uwXL29TY76Z2rM5mHXA, Shawn Guo,
stuart.yoder-3arQi8VN3Tc,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 2016/10/24 21:16, Mark Rutland wrote:
> On Mon, Oct 24, 2016 at 08:40:01PM +0800, Ding Tianhong wrote:
>> On 2016/10/24 19:16, Mark Rutland wrote:
>>> Is "161x01" the *exact* erratum number, or is the 'x' a wildcard?
>>
>> The 'x' is a wildcard, it will cover 161001 to 161601 several numbers,
>
> Given you're using a wildcard, I take it that this is a *part* number?
>
Yes, I was doubt how to fix this, should I choose a better erratum number?
> Thanks,
> Mark.
>
> .
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
@ 2016-10-24 13:23 ` Ding Tianhong
0 siblings, 0 replies; 22+ messages in thread
From: Ding Tianhong @ 2016-10-24 13:23 UTC (permalink / raw)
To: linux-arm-kernel
On 2016/10/24 21:16, Mark Rutland wrote:
> On Mon, Oct 24, 2016 at 08:40:01PM +0800, Ding Tianhong wrote:
>> On 2016/10/24 19:16, Mark Rutland wrote:
>>> Is "161x01" the *exact* erratum number, or is the 'x' a wildcard?
>>
>> The 'x' is a wildcard, it will cover 161001 to 161601 several numbers,
>
> Given you're using a wildcard, I take it that this is a *part* number?
>
Yes, I was doubt how to fix this, should I choose a better erratum number?
> Thanks,
> Mark.
>
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread
[parent not found: <1dcfb21a-7417-282e-f187-425d2c148672-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>]
* Re: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
2016-10-24 13:23 ` Ding Tianhong
@ 2016-10-24 13:39 ` Mark Rutland
-1 siblings, 0 replies; 22+ messages in thread
From: Mark Rutland @ 2016-10-24 13:39 UTC (permalink / raw)
To: Ding Tianhong
Cc: Catalin Marinas, Will Deacon, Marc Zyngier, Scott Wood,
devicetree-u79uwXL29TY76Z2rM5mHXA, Shawn Guo,
stuart.yoder-3arQi8VN3Tc,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Mon, Oct 24, 2016 at 09:23:10PM +0800, Ding Tianhong wrote:
> On 2016/10/24 21:16, Mark Rutland wrote:
> > On Mon, Oct 24, 2016 at 08:40:01PM +0800, Ding Tianhong wrote:
> >> On 2016/10/24 19:16, Mark Rutland wrote:
> >>> Is "161x01" the *exact* erratum number, or is the 'x' a wildcard?
> >>
> >> The 'x' is a wildcard, it will cover 161001 to 161601 several numbers,
> >
> > Given you're using a wildcard, I take it that this is a *part* number?
>
> Yes, I was doubt how to fix this, should I choose a better erratum number?
Typically, we expect that each vendor has some central database of their
errata, with each having a unique ID.
If Huawei do not have such a database, I do not think that we should
invent an erratum number here.
Thanks,
Mark.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
@ 2016-10-24 13:39 ` Mark Rutland
0 siblings, 0 replies; 22+ messages in thread
From: Mark Rutland @ 2016-10-24 13:39 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Oct 24, 2016 at 09:23:10PM +0800, Ding Tianhong wrote:
> On 2016/10/24 21:16, Mark Rutland wrote:
> > On Mon, Oct 24, 2016 at 08:40:01PM +0800, Ding Tianhong wrote:
> >> On 2016/10/24 19:16, Mark Rutland wrote:
> >>> Is "161x01" the *exact* erratum number, or is the 'x' a wildcard?
> >>
> >> The 'x' is a wildcard, it will cover 161001 to 161601 several numbers,
> >
> > Given you're using a wildcard, I take it that this is a *part* number?
>
> Yes, I was doubt how to fix this, should I choose a better erratum number?
Typically, we expect that each vendor has some central database of their
errata, with each having a unique ID.
If Huawei do not have such a database, I do not think that we should
invent an erratum number here.
Thanks,
Mark.
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
2016-10-24 13:39 ` Mark Rutland
@ 2016-10-26 2:59 ` Ding Tianhong
-1 siblings, 0 replies; 22+ messages in thread
From: Ding Tianhong @ 2016-10-26 2:59 UTC (permalink / raw)
To: Mark Rutland
Cc: Catalin Marinas, Will Deacon, Marc Zyngier, Scott Wood,
devicetree-u79uwXL29TY76Z2rM5mHXA, Shawn Guo,
stuart.yoder-3arQi8VN3Tc,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 2016/10/24 21:39, Mark Rutland wrote:
> On Mon, Oct 24, 2016 at 09:23:10PM +0800, Ding Tianhong wrote:
>> On 2016/10/24 21:16, Mark Rutland wrote:
>>> On Mon, Oct 24, 2016 at 08:40:01PM +0800, Ding Tianhong wrote:
>>>> On 2016/10/24 19:16, Mark Rutland wrote:
>>>>> Is "161x01" the *exact* erratum number, or is the 'x' a wildcard?
>>>>
>>>> The 'x' is a wildcard, it will cover 161001 to 161601 several numbers,
>>>
>>> Given you're using a wildcard, I take it that this is a *part* number?
>>
>> Yes, I was doubt how to fix this, should I choose a better erratum number?
>
> Typically, we expect that each vendor has some central database of their
> errata, with each having a unique ID.
>
> If Huawei do not have such a database, I do not think that we should
> invent an erratum number here.
>
Hi Marko<\x1a
After discussion with our chip developer, we decide the 161601 as the *exact* erratum number for this chip to cover
all the problem and register this in our company's database, thanks.
Ding
> Thanks,
> Mark.
>
> .
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
@ 2016-10-26 2:59 ` Ding Tianhong
0 siblings, 0 replies; 22+ messages in thread
From: Ding Tianhong @ 2016-10-26 2:59 UTC (permalink / raw)
To: linux-arm-kernel
On 2016/10/24 21:39, Mark Rutland wrote:
> On Mon, Oct 24, 2016 at 09:23:10PM +0800, Ding Tianhong wrote:
>> On 2016/10/24 21:16, Mark Rutland wrote:
>>> On Mon, Oct 24, 2016 at 08:40:01PM +0800, Ding Tianhong wrote:
>>>> On 2016/10/24 19:16, Mark Rutland wrote:
>>>>> Is "161x01" the *exact* erratum number, or is the 'x' a wildcard?
>>>>
>>>> The 'x' is a wildcard, it will cover 161001 to 161601 several numbers,
>>>
>>> Given you're using a wildcard, I take it that this is a *part* number?
>>
>> Yes, I was doubt how to fix this, should I choose a better erratum number?
>
> Typically, we expect that each vendor has some central database of their
> errata, with each having a unique ID.
>
> If Huawei do not have such a database, I do not think that we should
> invent an erratum number here.
>
Hi Marko<\x1a
After discussion with our chip developer, we decide the 161601 as the *exact* erratum number for this chip to cover
all the problem and register this in our company's database, thanks.
Ding
> Thanks,
> Mark.
>
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread