From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> To: Tomer Maimon <tmaimon77@gmail.com> Cc: "Avi Fishman" <avifishman70@gmail.com>, "Tali Perry" <tali.perry1@gmail.com>, "Joel Stanley" <joel@jms.id.au>, "Patrick Venture" <venture@google.com>, "Nancy Yuen" <yuenn@google.com>, "Benjamin Fair" <benjaminfair@google.com>, "Rob Herring" <robh+dt@kernel.org>, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, "Philipp Zabel" <p.zabel@pengutronix.de>, "Greg KH" <gregkh@linuxfoundation.org>, "Daniel Lezcano" <daniel.lezcano@linaro.org>, "Thomas Gleixner" <tglx@linutronix.de>, "Wim Van Sebroeck" <wim@linux-watchdog.org>, "Guenter Roeck" <linux@roeck-us.net>, catalin.marinas@arm.com, will@kernel.org, "Arnd Bergmann" <arnd@arndb.de>, "Olof Johansson" <olof@lixom.net>, jirislaby@kernel.org, shawnguo@kernel.org, bjorn.andersson@linaro.org, geert+renesas@glider.be, marcel.ziswiler@toradex.com, "Vinod Koul" <vkoul@kernel.org>, biju.das.jz@bp.renesas.com, nobuhiro1.iwamatsu@toshiba.co.jp, robert.hancock@calian.com, "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>, lkundrak@v3.sk, soc@kernel.org, devicetree <devicetree@vger.kernel.org>, "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-watchdog@vger.kernel.org, "Linux ARM" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH v1 11/19] dt-bindings: reset: npcm: Add support for NPCM8XX Date: Mon, 23 May 2022 16:23:41 +0200 [thread overview] Message-ID: <96ab5563-ea03-806b-f38e-39ef1ed04093@linaro.org> (raw) In-Reply-To: <CAP6Zq1i2Wj4FCA4-eseVoJyMof5=ocFCUcitVquJqYJ4Z3JTYQ@mail.gmail.com> On 23/05/2022 16:03, Tomer Maimon wrote: > Hi Krzysztof, > > Thanks for your comments. Please stop replying in HTML. It's not the format of emails used in the Linux. It makes very difficult to read your replies. > > > On Mon, 23 May 2022 at 12:01, Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org <mailto:krzysztof.kozlowski@linaro.org>> > wrote: > > On 22/05/2022 17:50, Tomer Maimon wrote: > > Add binding document and device tree binding > > constants for Nuvoton BMC NPCM8XX reset controller. > > > > Signed-off-by: Tomer Maimon <tmaimon77@gmail.com > <mailto:tmaimon77@gmail.com>> > > --- > > .../bindings/reset/nuvoton,npcm-reset.txt | 17 ++- > > .../dt-bindings/reset/nuvoton,npcm8xx-reset.h | 124 > ++++++++++++++++++ > > 2 files changed, 139 insertions(+), 2 deletions(-) > > create mode 100644 include/dt-bindings/reset/nuvoton,npcm8xx-reset.h > > > > diff --git > a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt > b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt > > index cb1613092ee7..b7eb8615b68b 100644 > > --- a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt > > +++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt > > @@ -1,14 +1,15 @@ > > Nuvoton NPCM Reset controller > > > > Required properties: > > -- compatible : "nuvoton,npcm750-reset" for NPCM7XX BMC > > +- compatible : "nuvoton,npcm750-reset" for Poleg NPCM7XX BMC. > > + "nuvoton,npcm845-reset" for Arbel NPCM8XX BMC. > > - reg : specifies physical base address and size of the register. > > - #reset-cells: must be set to 2 > > - syscon: a phandle to access GCR registers. > > > > Optional property: > > - nuvoton,sw-reset-number - Contains the software reset number to > restart the SoC. > > - NPCM7xx contain four software reset that represent numbers 1 to 4. > > + NPCM7xx and NPCM8xx contain four software reset that represent > numbers 1 to 4. > > > > If 'nuvoton,sw-reset-number' is not specified software reset is > disabled. > > > > @@ -32,3 +33,15 @@ example: > > }; > > > > The index could be found in > <dt-bindings/reset/nuvoton,npcm7xx-reset.h>. > > + > > +Specifying reset lines connected to IP NPCM8XX modules > > +====================================================== > > we prefer to use the same explanation as the NPCM7XX reset explanation > in the reset binding document. ?? > > No need to document consumers. Just mention the header. What explanation? Consumers are trivial. Once you convert it to DT schema there should be no such code at all. > > > +example: > > + > > + spi0: spi@..... { > > + ... > > + resets = <&rstc NPCM8XX_RESET_IPSRST2 > NPCM8XX_RESET_PSPI1>; > > + ... > > + }; > > + > > +The index could be found in > <dt-bindings/reset/nuvoton,npcm8xx-reset.h>. > > diff --git a/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h > b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h > > new file mode 100644 > > index 000000000000..4b832a0fd1dd > > --- /dev/null > > +++ b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h > > @@ -0,0 +1,124 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > Dual license. > > O.K. > > > > +// Copyright (c) 2022 Nuvoton Technology corporation. > > + > > +#ifndef _DT_BINDINGS_NPCM8XX_RESET_H > > +#define _DT_BINDINGS_NPCM8XX_RESET_H > > + > > +#define NPCM8XX_RESET_IPSRST1 0x20 > > +#define NPCM8XX_RESET_IPSRST2 0x24 > > +#define NPCM8XX_RESET_IPSRST3 0x34 > > +#define NPCM8XX_RESET_IPSRST4 0x74 > > What are these? All IDs should be incremental, decimal and start from 0. > > Register offset, we use the same method in NPCM7xx. please refer > https://elixir.bootlin.com/linux/v5.18/source/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h > <https://elixir.bootlin.com/linux/v5.18/source/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h> > > and the driver asserts the reset according to the reset include definitions Register offsets, a device programming model, are not part of bindings. Bindings should be independent of programming model, so only IDs are allowed. Why did you add register offsets to bindings at the first place? > > > > + > > +/* Reset lines on IP1 reset module (NPCM8XX_RESET_IPSRST1) */ > > +#define NPCM8XX_RESET_GDMA0 3 > > IDs start from 0 and do not have holes. > > This represents the reset BIT in the reset register. Again, not programming model in the bindings. No bits, not register values, no register offsets. Best regards, Krzysztof
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> To: Tomer Maimon <tmaimon77@gmail.com> Cc: "Avi Fishman" <avifishman70@gmail.com>, "Tali Perry" <tali.perry1@gmail.com>, "Joel Stanley" <joel@jms.id.au>, "Patrick Venture" <venture@google.com>, "Nancy Yuen" <yuenn@google.com>, "Benjamin Fair" <benjaminfair@google.com>, "Rob Herring" <robh+dt@kernel.org>, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, "Philipp Zabel" <p.zabel@pengutronix.de>, "Greg KH" <gregkh@linuxfoundation.org>, "Daniel Lezcano" <daniel.lezcano@linaro.org>, "Thomas Gleixner" <tglx@linutronix.de>, "Wim Van Sebroeck" <wim@linux-watchdog.org>, "Guenter Roeck" <linux@roeck-us.net>, catalin.marinas@arm.com, will@kernel.org, "Arnd Bergmann" <arnd@arndb.de>, "Olof Johansson" <olof@lixom.net>, jirislaby@kernel.org, shawnguo@kernel.org, bjorn.andersson@linaro.org, geert+renesas@glider.be, marcel.ziswiler@toradex.com, "Vinod Koul" <vkoul@kernel.org>, biju.das.jz@bp.renesas.com, nobuhiro1.iwamatsu@toshiba.co.jp, robert.hancock@calian.com, "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>, lkundrak@v3.sk, soc@kernel.org, devicetree <devicetree@vger.kernel.org>, "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-watchdog@vger.kernel.org, "Linux ARM" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH v1 11/19] dt-bindings: reset: npcm: Add support for NPCM8XX Date: Mon, 23 May 2022 16:23:41 +0200 [thread overview] Message-ID: <96ab5563-ea03-806b-f38e-39ef1ed04093@linaro.org> (raw) In-Reply-To: <CAP6Zq1i2Wj4FCA4-eseVoJyMof5=ocFCUcitVquJqYJ4Z3JTYQ@mail.gmail.com> On 23/05/2022 16:03, Tomer Maimon wrote: > Hi Krzysztof, > > Thanks for your comments. Please stop replying in HTML. It's not the format of emails used in the Linux. It makes very difficult to read your replies. > > > On Mon, 23 May 2022 at 12:01, Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org <mailto:krzysztof.kozlowski@linaro.org>> > wrote: > > On 22/05/2022 17:50, Tomer Maimon wrote: > > Add binding document and device tree binding > > constants for Nuvoton BMC NPCM8XX reset controller. > > > > Signed-off-by: Tomer Maimon <tmaimon77@gmail.com > <mailto:tmaimon77@gmail.com>> > > --- > > .../bindings/reset/nuvoton,npcm-reset.txt | 17 ++- > > .../dt-bindings/reset/nuvoton,npcm8xx-reset.h | 124 > ++++++++++++++++++ > > 2 files changed, 139 insertions(+), 2 deletions(-) > > create mode 100644 include/dt-bindings/reset/nuvoton,npcm8xx-reset.h > > > > diff --git > a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt > b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt > > index cb1613092ee7..b7eb8615b68b 100644 > > --- a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt > > +++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt > > @@ -1,14 +1,15 @@ > > Nuvoton NPCM Reset controller > > > > Required properties: > > -- compatible : "nuvoton,npcm750-reset" for NPCM7XX BMC > > +- compatible : "nuvoton,npcm750-reset" for Poleg NPCM7XX BMC. > > + "nuvoton,npcm845-reset" for Arbel NPCM8XX BMC. > > - reg : specifies physical base address and size of the register. > > - #reset-cells: must be set to 2 > > - syscon: a phandle to access GCR registers. > > > > Optional property: > > - nuvoton,sw-reset-number - Contains the software reset number to > restart the SoC. > > - NPCM7xx contain four software reset that represent numbers 1 to 4. > > + NPCM7xx and NPCM8xx contain four software reset that represent > numbers 1 to 4. > > > > If 'nuvoton,sw-reset-number' is not specified software reset is > disabled. > > > > @@ -32,3 +33,15 @@ example: > > }; > > > > The index could be found in > <dt-bindings/reset/nuvoton,npcm7xx-reset.h>. > > + > > +Specifying reset lines connected to IP NPCM8XX modules > > +====================================================== > > we prefer to use the same explanation as the NPCM7XX reset explanation > in the reset binding document. ?? > > No need to document consumers. Just mention the header. What explanation? Consumers are trivial. Once you convert it to DT schema there should be no such code at all. > > > +example: > > + > > + spi0: spi@..... { > > + ... > > + resets = <&rstc NPCM8XX_RESET_IPSRST2 > NPCM8XX_RESET_PSPI1>; > > + ... > > + }; > > + > > +The index could be found in > <dt-bindings/reset/nuvoton,npcm8xx-reset.h>. > > diff --git a/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h > b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h > > new file mode 100644 > > index 000000000000..4b832a0fd1dd > > --- /dev/null > > +++ b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h > > @@ -0,0 +1,124 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > Dual license. > > O.K. > > > > +// Copyright (c) 2022 Nuvoton Technology corporation. > > + > > +#ifndef _DT_BINDINGS_NPCM8XX_RESET_H > > +#define _DT_BINDINGS_NPCM8XX_RESET_H > > + > > +#define NPCM8XX_RESET_IPSRST1 0x20 > > +#define NPCM8XX_RESET_IPSRST2 0x24 > > +#define NPCM8XX_RESET_IPSRST3 0x34 > > +#define NPCM8XX_RESET_IPSRST4 0x74 > > What are these? All IDs should be incremental, decimal and start from 0. > > Register offset, we use the same method in NPCM7xx. please refer > https://elixir.bootlin.com/linux/v5.18/source/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h > <https://elixir.bootlin.com/linux/v5.18/source/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h> > > and the driver asserts the reset according to the reset include definitions Register offsets, a device programming model, are not part of bindings. Bindings should be independent of programming model, so only IDs are allowed. Why did you add register offsets to bindings at the first place? > > > > + > > +/* Reset lines on IP1 reset module (NPCM8XX_RESET_IPSRST1) */ > > +#define NPCM8XX_RESET_GDMA0 3 > > IDs start from 0 and do not have holes. > > This represents the reset BIT in the reset register. Again, not programming model in the bindings. No bits, not register values, no register offsets. Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-05-23 14:23 UTC|newest] Thread overview: 101+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-22 15:50 [PATCH v1 00/19] Introduce Nuvoton Arbel NPCM8XX BMC SoC Tomer Maimon 2022-05-22 15:50 ` [PATCH v1 01/19] dt-bindings: timer: npcm: Add npcm845 compatible string Tomer Maimon 2022-05-23 7:31 ` Krzysztof Kozlowski 2022-05-23 7:31 ` Krzysztof Kozlowski 2022-05-22 15:50 ` [PATCH v1 02/19] clocksource: timer-npcm7xx: Add NPCM845 timer support Tomer Maimon 2022-05-22 15:50 ` [PATCH v1 03/19] dt-bindings: serial: 8250: Add npcm845 compatible string Tomer Maimon 2022-05-23 7:32 ` Krzysztof Kozlowski 2022-05-23 7:32 ` Krzysztof Kozlowski 2022-05-22 15:50 ` [PATCH v1 04/19] tty: serial: 8250: Add NPCM845 UART support Tomer Maimon 2022-05-23 9:56 ` Arnd Bergmann 2022-05-23 9:56 ` Arnd Bergmann 2022-05-23 12:58 ` Tomer Maimon 2022-05-23 13:06 ` Krzysztof Kozlowski 2022-05-23 13:06 ` Krzysztof Kozlowski 2022-05-23 13:14 ` Tomer Maimon 2022-05-22 15:50 ` [PATCH v1 05/19] dt-bindings: watchdog: npcm: Add npcm845 compatible string Tomer Maimon 2022-05-23 7:32 ` Krzysztof Kozlowski 2022-05-23 7:32 ` Krzysztof Kozlowski 2022-05-22 15:50 ` [PATCH v1 06/19] watchdog: npcm_wdt: Add NPCM845 watchdog support Tomer Maimon 2022-05-22 16:45 ` Guenter Roeck 2022-05-22 16:45 ` Guenter Roeck 2022-05-22 15:50 ` [PATCH v1 07/19] dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock Tomer Maimon 2022-05-23 7:35 ` Krzysztof Kozlowski 2022-05-23 7:35 ` Krzysztof Kozlowski 2022-05-23 13:35 ` Tomer Maimon 2022-05-26 19:24 ` Stephen Boyd 2022-05-26 19:24 ` Stephen Boyd 2022-05-30 14:39 ` Tomer Maimon 2022-05-30 14:39 ` Tomer Maimon 2022-05-22 15:50 ` [PATCH v1 08/19] clk: npcm8xx: add clock controller Tomer Maimon 2022-05-23 7:07 ` Ilpo Järvinen 2022-05-23 7:07 ` Ilpo Järvinen 2022-05-23 12:48 ` Tomer Maimon 2022-05-26 19:36 ` Stephen Boyd 2022-05-26 19:36 ` Stephen Boyd 2022-05-30 14:36 ` Tomer Maimon 2022-05-30 14:36 ` Tomer Maimon 2022-05-22 15:50 ` [PATCH v1 09/19] dt-bindings: reset: add syscon property Tomer Maimon 2022-05-23 7:39 ` Krzysztof Kozlowski 2022-05-23 7:39 ` Krzysztof Kozlowski 2022-05-23 13:44 ` Tomer Maimon 2022-05-23 13:45 ` Krzysztof Kozlowski 2022-05-23 13:45 ` Krzysztof Kozlowski 2022-05-22 15:50 ` [PATCH v1 10/19] reset: npcm: using syscon instead of device data Tomer Maimon 2022-05-23 8:54 ` Krzysztof Kozlowski 2022-05-23 8:54 ` Krzysztof Kozlowski 2022-05-23 13:53 ` Tomer Maimon 2022-05-22 15:50 ` [PATCH v1 11/19] dt-bindings: reset: npcm: Add support for NPCM8XX Tomer Maimon 2022-05-23 9:01 ` Krzysztof Kozlowski 2022-05-23 9:01 ` Krzysztof Kozlowski 2022-05-23 14:03 ` Tomer Maimon 2022-05-23 14:22 ` Geert Uytterhoeven 2022-05-23 14:22 ` Geert Uytterhoeven 2022-05-23 14:26 ` Krzysztof Kozlowski 2022-05-23 14:26 ` Krzysztof Kozlowski 2022-05-23 15:11 ` Geert Uytterhoeven 2022-05-23 15:11 ` Geert Uytterhoeven 2022-05-23 15:22 ` Krzysztof Kozlowski 2022-05-23 15:22 ` Krzysztof Kozlowski 2022-05-23 15:24 ` Krzysztof Kozlowski 2022-05-23 15:24 ` Krzysztof Kozlowski 2022-05-24 7:26 ` Tomer Maimon 2022-05-24 7:26 ` Tomer Maimon 2022-05-23 14:23 ` Krzysztof Kozlowski [this message] 2022-05-23 14:23 ` Krzysztof Kozlowski 2022-05-22 15:50 ` [PATCH v1 12/19] reset: npcm: Add NPCM8XX support Tomer Maimon 2022-05-23 10:44 ` Arnd Bergmann 2022-05-23 10:44 ` Arnd Bergmann 2022-05-22 15:50 ` [PATCH v1 13/19] dt-bindings: arm: npcm: Add maintainer Tomer Maimon 2022-06-02 12:58 ` Rob Herring 2022-06-02 12:58 ` Rob Herring 2022-05-22 15:50 ` [PATCH v1 14/19] dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string Tomer Maimon 2022-05-23 9:02 ` Krzysztof Kozlowski 2022-05-23 9:02 ` Krzysztof Kozlowski 2022-05-22 15:50 ` [PATCH v1 15/19] dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR " Tomer Maimon 2022-05-23 9:02 ` Krzysztof Kozlowski 2022-05-23 9:02 ` [PATCH v1 15/19] dt-bindings: arm: npcm: Add nuvoton, npcm845 " Krzysztof Kozlowski 2022-05-23 9:02 ` [PATCH v1 15/19] dt-bindings: arm: npcm: Add nuvoton,npcm845 " Krzysztof Kozlowski 2022-05-23 9:02 ` [PATCH v1 15/19] dt-bindings: arm: npcm: Add nuvoton, npcm845 " Krzysztof Kozlowski 2022-05-22 15:50 ` [PATCH v1 16/19] arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC Tomer Maimon 2022-05-22 15:50 ` [PATCH v1 17/19] arm64: dts: nuvoton: Add initial NPCM8XX device tree Tomer Maimon 2022-05-23 9:08 ` Krzysztof Kozlowski 2022-05-23 9:08 ` Krzysztof Kozlowski 2022-05-23 13:58 ` Geert Uytterhoeven 2022-05-23 13:58 ` Geert Uytterhoeven 2022-05-23 14:16 ` Krzysztof Kozlowski 2022-05-23 14:16 ` Krzysztof Kozlowski 2022-05-22 15:50 ` [PATCH v1 18/19] arm64: dts: nuvoton: Add initial NPCM845 EVB " Tomer Maimon 2022-05-23 9:26 ` Krzysztof Kozlowski 2022-05-23 9:26 ` Krzysztof Kozlowski 2022-05-23 9:39 ` Arnd Bergmann 2022-05-23 9:39 ` Arnd Bergmann 2022-05-23 14:17 ` Tomer Maimon 2022-05-23 15:37 ` Krzysztof Kozlowski 2022-05-23 15:37 ` Krzysztof Kozlowski 2022-05-22 15:50 ` [PATCH v1 19/19] arm64: defconfig: Add Nuvoton NPCM family support Tomer Maimon 2022-05-23 9:52 ` [PATCH v1 00/19] Introduce Nuvoton Arbel NPCM8XX BMC SoC Arnd Bergmann 2022-05-23 9:52 ` Arnd Bergmann 2022-05-23 12:20 ` Tomer Maimon 2022-05-30 12:24 ` Andy Shevchenko 2022-05-30 12:24 ` Andy Shevchenko
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