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From: Stephane Eranian <eranian@google.com>
To: Lin Ming <lin@ming.vg>
Cc: Andi Kleen <andi@firstfloor.org>,
	a.p.zijlstra@chello.nl, linux-kernel@vger.kernel.org,
	x86@kernel.org, Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH 3/4] perf-events: Add support for supplementary event registers v3
Date: Mon, 22 Nov 2010 13:47:59 +0100	[thread overview]
Message-ID: <AANLkTin3K_ffY8SeCo6JK570eDx_zHXzQ6ANA_ixy3tP@mail.gmail.com> (raw)
In-Reply-To: <AANLkTinFxc5R-CgWv3XnoDrBcwQv_zwz1_4oCwTOOqGh@mail.gmail.com>

On Mon, Nov 22, 2010 at 1:23 PM, Lin Ming <lin@ming.vg> wrote:
> On Thu, Nov 18, 2010 at 6:47 PM, Andi Kleen <andi@firstfloor.org> wrote:
>> From: Andi Kleen <ak@linux.intel.com>
>>
>> Intel Nehalem/Westmere have a special OFFCORE_RESPONSE event
>> that can be used to monitor any offcore accesses from a core.
>> This is a very useful event for various tunings, and it's
>> also needed to implement the generic LLC-* events correctly.
>>
>> Unfortunately this event requires programming a mask in a separate
>> register. And worse this separate register is per core, not per
>> CPU thread.
>
> This "separate register" is MSR_OFFCORE_RSP_0, right?
> But from the SDM,  MSR_OFFCORE_RSP_0 is "thread" scope,
> see SDM 3b, Appendix B.4 MSRS IN THE INTEL® MICROARCHITECTURE CODENAME NEHALEM
>
> Or am I missing some obvious thing?
>
The manual is wrong on this.

> Thanks,
> Lin Ming
>

  reply	other threads:[~2010-11-22 12:48 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-11-18 10:47 perf offcore patchkit for merge Andi Kleen
2010-11-18 10:47 ` [PATCH 1/4] x86: set cpu masks before calling CPU_STARTING notifiers Andi Kleen
2010-11-18 11:52   ` Thomas Gleixner
2010-11-18 13:39     ` Andi Kleen
2010-11-26 15:05   ` [tip:perf/core] x86: Set " tip-bot for Andi Kleen
2010-11-18 10:47 ` [PATCH 2/4] perf: Document enhanced event encoding for OFFCORE_MSR Andi Kleen
2010-11-18 10:47 ` [PATCH 3/4] perf-events: Add support for supplementary event registers v3 Andi Kleen
2010-11-18 11:12   ` Peter Zijlstra
2010-11-18 11:16     ` Andi Kleen
2010-11-18 11:46       ` Peter Zijlstra
2010-11-26 15:28         ` Peter Zijlstra
2010-11-26 15:30           ` Peter Zijlstra
2010-11-18 12:07   ` Peter Zijlstra
2010-11-22 12:23   ` Lin Ming
2010-11-22 12:47     ` Stephane Eranian [this message]
2010-11-22 13:01       ` Lin Ming
2010-12-01 14:27   ` Peter Zijlstra
2010-12-01 16:19     ` Peter Zijlstra
2010-11-18 10:47 ` [PATCH 4/4] perf-events: Fix LLC-* events on Intel Nehalem/Westmere v2 Andi Kleen

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