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From: Wei Fu <wefu@redhat.com>
To: Christoph Hellwig <hch@infradead.org>
Cc: "Anup Patel" <anup.patel@wdc.com>,
	"Atish Patra" <atish.patra@wdc.com>,
	"Palmer Dabbelt" <palmerdabbelt@google.com>,
	guoren@kernel.org, christoph.muellner@vrull.eu,
	"Philipp Tomsich" <philipp.tomsich@vrull.eu>,
	"Christoph Hellwig" <hch@lst.de>,
	"Liu Shaohua" <liush@allwinnertech.com>,
	"Wei Wu (吴伟)" <lazyparser@gmail.com>,
	"Drew Fustini" <drew@beagleboard.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	taiten.peng@canonical.com, aniket.ponkshe@canonical.com,
	heinrich.schuchardt@canonical.com, gordan.markus@canonical.com,
	guoren@linux.alibaba.com, "Arnd Bergmann" <arnd@arndb.de>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Maxime Ripard" <maxime@cerno.tech>,
	"Daniel Lustig" <dlustig@nvidia.com>,
	"Greg Favor" <gfavor@ventanamicro.com>,
	"Andrea Mondelli" <andrea.mondelli@huawei.com>,
	"Jonathan Behrens" <behrensj@mit.edu>,
	Xinhaoqu <xinhaoqu@huawei.com>,
	"Bill Huffman" <huffman@cadence.com>,
	"Nick Kossifidis" <mick@ics.forth.gr>,
	"Allen Baum" <allen.baum@esperantotech.com>,
	"Josh Scheid" <jscheid@ventanamicro.com>,
	"Richard Trauben" <rtrauben@gmail.com>
Subject: Re: [RESEND PATCH V3 2/2] riscv: add RISC-V Svpbmt extension supports
Date: Mon, 25 Oct 2021 18:55:09 +0800	[thread overview]
Message-ID: <CA+YCwKkX64A8p9vfLJHC3+LqOWyDg99eDBR0mjfB=H45BOyJLQ@mail.gmail.com> (raw)
In-Reply-To: <YXZU/3/YmRGFrOXK@infradead.org>

Hi Christoph,

Great thanks for your review.

On Mon, Oct 25, 2021 at 2:57 PM Christoph Hellwig <hch@infradead.org> wrote:
>
> On Mon, Oct 25, 2021 at 12:06:07PM +0800, wefu@redhat.com wrote:
> >  static inline pmd_t *pud_pgtable(pud_t pud)
> >  {
> > -     return (pmd_t *)pfn_to_virt(pud_val(pud) >> _PAGE_PFN_SHIFT);
> > +     return (pmd_t *)pfn_to_virt((pud_val(pud) & _PAGE_CHG_MASK)
> > +                                             >> _PAGE_PFN_SHIFT);
> >  }
> >
> >  static inline struct page *pud_page(pud_t pud)
> >  {
> > -     return pfn_to_page(pud_val(pud) >> _PAGE_PFN_SHIFT);
> > +     return pfn_to_page((pud_val(pud) & _PAGE_CHG_MASK)
> > +                                             >> _PAGE_PFN_SHIFT);
>
> >  static inline unsigned long _pmd_pfn(pmd_t pmd)
> >  {
> > -     return pmd_val(pmd) >> _PAGE_PFN_SHIFT;
> > +     return (pmd_val(pmd) & _PAGE_CHG_MASK) >> _PAGE_PFN_SHIFT;
> >  }
>
> The "(pud_val(pud) & _PAGE_CHG_MASK) >> _PAGE_PFN_SHIFT" expression begs
> for readable and well-documented helper.
>
> > +#define _SVPBMT_PMA          ((unsigned long)0x0 << 61)
> > +#define _SVPBMT_NC           ((unsigned long)0x1 << 61)
> > +#define _SVPBMT_IO           ((unsigned long)0x2 << 61)
>
> 0UL << 61
> 1UL << 61

How about this macro:
#define _SVPBMT_PMA         0x0UL
#define _SVPBMT_NC         BIT(61)
#define _SVPBMT_IO         BIT(62)
#define _SVPBMT_MASK         GENMASK(62, 61)

> ...
>
> > +#define _SVPBMT_MASK         (_SVPBMT_PMA | _SVPBMT_NC | _SVPBMT_IO)
> > +
> > +extern struct __riscv_svpbmt_struct {
> > +     unsigned long mask;
> > +     unsigned long mt_pma;
> > +     unsigned long mt_nc;
> > +     unsigned long mt_io;
> > +} __riscv_svpbmt;
> > +
> > +#define _PAGE_MT_MASK                __riscv_svpbmt.mask
> > +#define _PAGE_MT_PMA         __riscv_svpbmt.mt_pma
> > +#define _PAGE_MT_NC          __riscv_svpbmt.mt_nc
> > +#define _PAGE_MT_IO          __riscv_svpbmt.mt_io
>
> Using a struct over individual variables seems a little odd here.
>
> Also why not use the standard names for these _PAGE bits used by
> most other architectures?

Which names are you suggesting? Would you mind providing an example ?
_PAGE_BIT_   for _PAGE_KERNEL_ ??

>
> > -     return (unsigned long)pfn_to_virt(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
> > +     return (unsigned long)pfn_to_virt((pmd_val(pmd) & _PAGE_CHG_MASK) >> _PAGE_PFN_SHIFT);
>
> Overly long line, could use a helper.  Btw, what is the point in having
> this _PAGE_PFN_SHIFT macro to start with?
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
>


WARNING: multiple messages have this Message-ID (diff)
From: Wei Fu <wefu@redhat.com>
To: Christoph Hellwig <hch@infradead.org>
Cc: "Anup Patel" <anup.patel@wdc.com>,
	"Atish Patra" <atish.patra@wdc.com>,
	"Palmer Dabbelt" <palmerdabbelt@google.com>,
	guoren@kernel.org, christoph.muellner@vrull.eu,
	"Philipp Tomsich" <philipp.tomsich@vrull.eu>,
	"Christoph Hellwig" <hch@lst.de>,
	"Liu Shaohua" <liush@allwinnertech.com>,
	"Wei Wu (吴伟)" <lazyparser@gmail.com>,
	"Drew Fustini" <drew@beagleboard.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	taiten.peng@canonical.com, aniket.ponkshe@canonical.com,
	heinrich.schuchardt@canonical.com, gordan.markus@canonical.com,
	guoren@linux.alibaba.com, "Arnd Bergmann" <arnd@arndb.de>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Maxime Ripard" <maxime@cerno.tech>,
	"Daniel Lustig" <dlustig@nvidia.com>,
	"Greg Favor" <gfavor@ventanamicro.com>,
	"Andrea Mondelli" <andrea.mondelli@huawei.com>,
	"Jonathan Behrens" <behrensj@mit.edu>,
	Xinhaoqu <xinhaoqu@huawei.com>,
	"Bill Huffman" <huffman@cadence.com>,
	"Nick Kossifidis" <mick@ics.forth.gr>,
	"Allen Baum" <allen.baum@esperantotech.com>,
	"Josh Scheid" <jscheid@ventanamicro.com>,
	"Richard Trauben" <rtrauben@gmail.com>
Subject: Re: [RESEND PATCH V3 2/2] riscv: add RISC-V Svpbmt extension supports
Date: Mon, 25 Oct 2021 18:55:09 +0800	[thread overview]
Message-ID: <CA+YCwKkX64A8p9vfLJHC3+LqOWyDg99eDBR0mjfB=H45BOyJLQ@mail.gmail.com> (raw)
In-Reply-To: <YXZU/3/YmRGFrOXK@infradead.org>

Hi Christoph,

Great thanks for your review.

On Mon, Oct 25, 2021 at 2:57 PM Christoph Hellwig <hch@infradead.org> wrote:
>
> On Mon, Oct 25, 2021 at 12:06:07PM +0800, wefu@redhat.com wrote:
> >  static inline pmd_t *pud_pgtable(pud_t pud)
> >  {
> > -     return (pmd_t *)pfn_to_virt(pud_val(pud) >> _PAGE_PFN_SHIFT);
> > +     return (pmd_t *)pfn_to_virt((pud_val(pud) & _PAGE_CHG_MASK)
> > +                                             >> _PAGE_PFN_SHIFT);
> >  }
> >
> >  static inline struct page *pud_page(pud_t pud)
> >  {
> > -     return pfn_to_page(pud_val(pud) >> _PAGE_PFN_SHIFT);
> > +     return pfn_to_page((pud_val(pud) & _PAGE_CHG_MASK)
> > +                                             >> _PAGE_PFN_SHIFT);
>
> >  static inline unsigned long _pmd_pfn(pmd_t pmd)
> >  {
> > -     return pmd_val(pmd) >> _PAGE_PFN_SHIFT;
> > +     return (pmd_val(pmd) & _PAGE_CHG_MASK) >> _PAGE_PFN_SHIFT;
> >  }
>
> The "(pud_val(pud) & _PAGE_CHG_MASK) >> _PAGE_PFN_SHIFT" expression begs
> for readable and well-documented helper.
>
> > +#define _SVPBMT_PMA          ((unsigned long)0x0 << 61)
> > +#define _SVPBMT_NC           ((unsigned long)0x1 << 61)
> > +#define _SVPBMT_IO           ((unsigned long)0x2 << 61)
>
> 0UL << 61
> 1UL << 61

How about this macro:
#define _SVPBMT_PMA         0x0UL
#define _SVPBMT_NC         BIT(61)
#define _SVPBMT_IO         BIT(62)
#define _SVPBMT_MASK         GENMASK(62, 61)

> ...
>
> > +#define _SVPBMT_MASK         (_SVPBMT_PMA | _SVPBMT_NC | _SVPBMT_IO)
> > +
> > +extern struct __riscv_svpbmt_struct {
> > +     unsigned long mask;
> > +     unsigned long mt_pma;
> > +     unsigned long mt_nc;
> > +     unsigned long mt_io;
> > +} __riscv_svpbmt;
> > +
> > +#define _PAGE_MT_MASK                __riscv_svpbmt.mask
> > +#define _PAGE_MT_PMA         __riscv_svpbmt.mt_pma
> > +#define _PAGE_MT_NC          __riscv_svpbmt.mt_nc
> > +#define _PAGE_MT_IO          __riscv_svpbmt.mt_io
>
> Using a struct over individual variables seems a little odd here.
>
> Also why not use the standard names for these _PAGE bits used by
> most other architectures?

Which names are you suggesting? Would you mind providing an example ?
_PAGE_BIT_   for _PAGE_KERNEL_ ??

>
> > -     return (unsigned long)pfn_to_virt(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
> > +     return (unsigned long)pfn_to_virt((pmd_val(pmd) & _PAGE_CHG_MASK) >> _PAGE_PFN_SHIFT);
>
> Overly long line, could use a helper.  Btw, what is the point in having
> this _PAGE_PFN_SHIFT macro to start with?
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
>


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2021-10-25 10:55 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-25  4:06 [RESEND PATCH V3 0/2] riscv: add RISC-V Svpbmt Standard Extension supports wefu
2021-10-25  4:06 ` wefu
2021-10-25  4:06 ` [RESEND PATCH V3 1/2] dt-bindings: riscv: add mmu-supports-svpbmt for Svpbmt wefu
2021-10-25  4:06   ` wefu
2021-10-25  4:17   ` Anup Patel
2021-10-25  4:17     ` Anup Patel
2021-10-25  6:00     ` Guo Ren
2021-10-25  6:00       ` Guo Ren
2021-10-25  6:08       ` Anup Patel
2021-10-25  6:08         ` Anup Patel
2021-10-25 13:21         ` Philipp Tomsich
2021-10-25 13:21           ` Philipp Tomsich
2021-10-25  6:09   ` Guo Ren
2021-10-25  6:09     ` Guo Ren
2021-10-25  4:06 ` [RESEND PATCH V3 2/2] riscv: add RISC-V Svpbmt extension supports wefu
2021-10-25  4:06   ` wefu
2021-10-25  6:55   ` Christoph Hellwig
2021-10-25  6:55     ` Christoph Hellwig
2021-10-25 10:55     ` Wei Fu [this message]
2021-10-25 10:55       ` Wei Fu
2021-11-02  6:07       ` Christoph Hellwig
2021-11-02  6:07         ` Christoph Hellwig
2021-11-07  7:23         ` Wei Fu
2021-11-07  7:23           ` Wei Fu
2021-10-25 14:49     ` Wei Fu
2021-10-25 14:49       ` Wei Fu
2021-11-02  6:04       ` Christoph Hellwig
2021-11-02  6:04         ` Christoph Hellwig
2021-11-07  6:54         ` Wei Fu
2021-11-07  6:54           ` Wei Fu
2021-10-27  0:12 ` [RESEND PATCH V3 0/2] riscv: add RISC-V Svpbmt Standard Extension supports Palmer Dabbelt
2021-10-27  0:12   ` Palmer Dabbelt
2021-10-27  7:54   ` Heinrich Schuchardt
2021-10-27  7:54     ` Heinrich Schuchardt
2021-11-02  2:07   ` Guo Ren
2021-11-02  2:07     ` Guo Ren
2021-11-02  5:58     ` Christoph Hellwig
2021-11-02  5:58       ` Christoph Hellwig
2021-11-02  8:51       ` Guo Ren
2021-11-02  8:51         ` Guo Ren
2021-11-07  7:12         ` Wei Fu
2021-11-07  7:12           ` Wei Fu
2021-11-08  7:52           ` Christoph Hellwig
2021-11-08  7:52             ` Christoph Hellwig
2021-11-26 16:23             ` Wei Fu
2021-11-26 16:23               ` Wei Fu

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