From: Linus Walleij <linus.walleij@linaro.org>
To: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>,
OpenBMC Maillist <openbmc@lists.ozlabs.org>,
Tomer Maimon <tmaimon77@gmail.com>, Joel Stanley <joel@jms.id.au>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/8] ARM: dts: wpcm450: Add global control registers (GCR) node
Date: Fri, 4 Jun 2021 10:01:07 +0200 [thread overview]
Message-ID: <CACRpkdY7AqcE4CMAdZHR-DfV-3ZCO3h9kYUZoZCUodLQmyyfXw@mail.gmail.com> (raw)
In-Reply-To: <20210602120329.2444672-4-j.neuschaefer@gmx.net>
On Wed, Jun 2, 2021 at 2:04 PM Jonathan Neuschäfer
<j.neuschaefer@gmx.net> wrote:
> The Global Control Registers (GCR) are a block of registers in Nuvoton
> SoCs that expose misc functionality such as chip model and version
> information or pinmux settings.
>
> This patch adds a GCR node to nuvoton-wpcm450.dtsi in preparation for
> enabling pinctrl on this SoC.
>
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
As noted I would name this architecture-neutral with
syscon@...
Yours,
Linus Walleij
WARNING: multiple messages have this Message-ID (diff)
From: Linus Walleij <linus.walleij@linaro.org>
To: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>, Tomer Maimon <tmaimon77@gmail.com>,
OpenBMC Maillist <openbmc@lists.ozlabs.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>
Subject: Re: [PATCH 3/8] ARM: dts: wpcm450: Add global control registers (GCR) node
Date: Fri, 4 Jun 2021 10:01:07 +0200 [thread overview]
Message-ID: <CACRpkdY7AqcE4CMAdZHR-DfV-3ZCO3h9kYUZoZCUodLQmyyfXw@mail.gmail.com> (raw)
In-Reply-To: <20210602120329.2444672-4-j.neuschaefer@gmx.net>
On Wed, Jun 2, 2021 at 2:04 PM Jonathan Neuschäfer
<j.neuschaefer@gmx.net> wrote:
> The Global Control Registers (GCR) are a block of registers in Nuvoton
> SoCs that expose misc functionality such as chip model and version
> information or pinmux settings.
>
> This patch adds a GCR node to nuvoton-wpcm450.dtsi in preparation for
> enabling pinctrl on this SoC.
>
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
As noted I would name this architecture-neutral with
syscon@...
Yours,
Linus Walleij
next prev parent reply other threads:[~2021-06-04 8:02 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-02 12:03 [PATCH 0/8] Nuvoton WPCM450 pinctrl and GPIO driver Jonathan Neuschäfer
2021-06-02 12:03 ` Jonathan Neuschäfer
2021-06-02 12:03 ` [PATCH 1/8] dt-bindings: arm/npcm: Add binding for global control registers (GCR) Jonathan Neuschäfer
2021-06-02 12:03 ` Jonathan Neuschäfer
2021-06-04 8:00 ` Linus Walleij
2021-06-04 8:00 ` Linus Walleij
2021-06-13 9:20 ` Jonathan Neuschäfer
2021-06-13 9:20 ` Jonathan Neuschäfer
2021-06-15 23:43 ` Rob Herring
2021-06-15 23:43 ` Rob Herring
2021-06-19 10:08 ` Jonathan Neuschäfer
2021-06-19 10:08 ` Jonathan Neuschäfer
2021-06-02 12:03 ` [PATCH 2/8] MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture Jonathan Neuschäfer
2021-06-02 12:03 ` Jonathan Neuschäfer
2021-06-02 12:03 ` [PATCH 3/8] ARM: dts: wpcm450: Add global control registers (GCR) node Jonathan Neuschäfer
2021-06-02 12:03 ` Jonathan Neuschäfer
2021-06-04 8:01 ` Linus Walleij [this message]
2021-06-04 8:01 ` Linus Walleij
2021-06-13 9:23 ` Jonathan Neuschäfer
2021-06-13 9:23 ` Jonathan Neuschäfer
2021-06-02 12:03 ` [PATCH 4/8] dt-bindings: pinctrl: Add Nuvoton WPCM450 Jonathan Neuschäfer
2021-06-02 12:03 ` Jonathan Neuschäfer
2021-06-04 9:35 ` Linus Walleij
2021-06-04 9:35 ` Linus Walleij
2021-06-13 9:53 ` Jonathan Neuschäfer
2021-06-13 9:53 ` Jonathan Neuschäfer
2021-06-15 23:45 ` Rob Herring
2021-06-15 23:45 ` Rob Herring
2021-06-19 10:17 ` Jonathan Neuschäfer
2021-06-19 10:17 ` Jonathan Neuschäfer
2021-06-02 12:03 ` [PATCH 5/8] pinctrl: nuvoton: Add driver for WPCM450 Jonathan Neuschäfer
2021-06-02 12:03 ` Jonathan Neuschäfer
2021-06-02 12:50 ` Andy Shevchenko
2021-06-02 12:50 ` Andy Shevchenko
2021-06-12 23:20 ` Jonathan Neuschäfer
2021-06-12 23:20 ` Jonathan Neuschäfer
2021-06-13 10:06 ` Andy Shevchenko
2021-06-13 10:06 ` Andy Shevchenko
2021-06-13 19:08 ` Jonathan Neuschäfer
2021-06-13 19:08 ` Jonathan Neuschäfer
2021-06-02 14:31 ` kernel test robot
2021-06-02 14:31 ` kernel test robot
2021-06-02 14:31 ` kernel test robot
2021-06-03 18:33 ` kernel test robot
2021-06-03 18:33 ` kernel test robot
2021-06-03 18:33 ` kernel test robot
2021-06-04 9:31 ` Linus Walleij
2021-06-04 9:31 ` Linus Walleij
2021-06-13 10:26 ` Jonathan Neuschäfer
2021-06-13 10:26 ` Jonathan Neuschäfer
2021-06-02 12:03 ` [PATCH 6/8] ARM: dts: wpcm450: Add pinctrl node Jonathan Neuschäfer
2021-06-02 12:03 ` Jonathan Neuschäfer
2021-06-02 12:03 ` [PATCH 7/8] ARM: dts: wpcm450: Add pin functions Jonathan Neuschäfer
2021-06-02 12:03 ` Jonathan Neuschäfer
2021-06-02 12:03 ` [PATCH 8/8] ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons Jonathan Neuschäfer
2021-06-02 12:03 ` Jonathan Neuschäfer
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