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From: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Andrew Jeffery <andrew-zrmu5oMJ5Fs@public.gmane.org>
Cc: Joel Stanley <joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org>,
	Alexandre Courbot
	<gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Benjamin Herrenschmidt
	<benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>,
	Jeremy Kerr <jk-mnsaURCQ41sdnm+yROfE0A@public.gmane.org>,
	"linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH v2 5/8] pinctrl: Add core support for Aspeed SoCs
Date: Mon, 22 Aug 2016 15:45:48 +0200	[thread overview]
Message-ID: <CACRpkdaBuwqGPbfLK8bR5A4NSefifw8VqPyUbgtAtweqoEnD7g@mail.gmail.com> (raw)
In-Reply-To: <20160819124414.24242-6-andrew-zrmu5oMJ5Fs@public.gmane.org>

On Fri, Aug 19, 2016 at 2:44 PM, Andrew Jeffery <andrew-zrmu5oMJ5Fs@public.gmane.org> wrote:

> +++ b/drivers/pinctrl/aspeed/Kconfig
> @@ -0,0 +1,8 @@
> +config PINCTRL_ASPEED
> +       bool
> +       depends on (ARCH_ASPEED || COMPILE_TEST) && OF
> +       select PINMUX
> +       select PINCONF
> +       select GENERIC_PINCONF
> +       select MFD_SYSCON
> +       select REGMAP_MMIO

Since this device is spawn from the syscon, should it not be
"depends on MFD_SYSCON"?

(No big deal, if you think this is right then go with it.)

> +#include <linux/io.h>

What is this include for?

> +#include <linux/mfd/syscon.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/string.h>
> +#include "../core.h"
> +#include "pinctrl-aspeed.h"

No #include <linux/regmap.h>?

Maybe some #includes are centralized to pinctrl-aspeed.h
I don't know, just make sure you don't have implicit includes.

> +               if (regmap_read(map, desc->reg, &val) < 0)
> +                       return false;
> +
> +               val &= ~desc->mask;
> +               val |= pattern << __ffs(desc->mask);
> +
> +               if (regmap_write(map, desc->reg, val) < 0)
> +                       return false;

Use:

regmap_update_bits(map,
                              desc->reg,
                              desc->mask,
                              pattern << __ffs->desc->mask);

Or something like that instead of reimplementing
mask-and-set. Regmap already knows how to do the
business.

(Applied everywhere in the driver where you have a
mask-and-set like this).

The expression core engine is still a complete mystery
for me, I will just trust you that it works as intended.

Yours,
Linus Walleij
--
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WARNING: multiple messages have this Message-ID (diff)
From: Linus Walleij <linus.walleij@linaro.org>
To: Andrew Jeffery <andrew@aj.id.au>
Cc: Joel Stanley <joel@jms.id.au>,
	Alexandre Courbot <gnurou@gmail.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Jeremy Kerr <jk@ozlabs.org>,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v2 5/8] pinctrl: Add core support for Aspeed SoCs
Date: Mon, 22 Aug 2016 15:45:48 +0200	[thread overview]
Message-ID: <CACRpkdaBuwqGPbfLK8bR5A4NSefifw8VqPyUbgtAtweqoEnD7g@mail.gmail.com> (raw)
In-Reply-To: <20160819124414.24242-6-andrew@aj.id.au>

On Fri, Aug 19, 2016 at 2:44 PM, Andrew Jeffery <andrew@aj.id.au> wrote:

> +++ b/drivers/pinctrl/aspeed/Kconfig
> @@ -0,0 +1,8 @@
> +config PINCTRL_ASPEED
> +       bool
> +       depends on (ARCH_ASPEED || COMPILE_TEST) && OF
> +       select PINMUX
> +       select PINCONF
> +       select GENERIC_PINCONF
> +       select MFD_SYSCON
> +       select REGMAP_MMIO

Since this device is spawn from the syscon, should it not be
"depends on MFD_SYSCON"?

(No big deal, if you think this is right then go with it.)

> +#include <linux/io.h>

What is this include for?

> +#include <linux/mfd/syscon.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/string.h>
> +#include "../core.h"
> +#include "pinctrl-aspeed.h"

No #include <linux/regmap.h>?

Maybe some #includes are centralized to pinctrl-aspeed.h
I don't know, just make sure you don't have implicit includes.

> +               if (regmap_read(map, desc->reg, &val) < 0)
> +                       return false;
> +
> +               val &= ~desc->mask;
> +               val |= pattern << __ffs(desc->mask);
> +
> +               if (regmap_write(map, desc->reg, val) < 0)
> +                       return false;

Use:

regmap_update_bits(map,
                              desc->reg,
                              desc->mask,
                              pattern << __ffs->desc->mask);

Or something like that instead of reimplementing
mask-and-set. Regmap already knows how to do the
business.

(Applied everywhere in the driver where you have a
mask-and-set like this).

The expression core engine is still a complete mystery
for me, I will just trust you that it works as intended.

Yours,
Linus Walleij

  parent reply	other threads:[~2016-08-22 13:45 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-19 12:44 [PATCH v2 0/8] aspeed: Add pinctrl and gpio drivers Andrew Jeffery
2016-08-19 12:44 ` [PATCH v2 1/8] MAINTAINERS: Add glob for Aspeed devicetree bindings Andrew Jeffery
     [not found]   ` <20160819124414.24242-2-andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-08-30  6:04     ` Joel Stanley
2016-08-30  6:04       ` Joel Stanley
2016-08-19 12:44 ` [PATCH v2 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Andrew Jeffery
2016-08-23 17:19   ` Rob Herring
2016-08-30  6:04   ` Joel Stanley
     [not found] ` <20160819124414.24242-1-andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-08-19 12:44   ` [PATCH v2 3/8] pinctrl: dt-bindings: Add documentation for Aspeed pin controllers Andrew Jeffery
2016-08-19 12:44     ` Andrew Jeffery
     [not found]     ` <20160819124414.24242-4-andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-08-23 17:23       ` Rob Herring
2016-08-23 17:23         ` Rob Herring
2016-08-24  0:06         ` Andrew Jeffery
2016-08-30  6:05       ` Joel Stanley
2016-08-30  6:05         ` Joel Stanley
2016-08-19 12:44   ` [PATCH v2 6/8] pinctrl: Add pinctrl-aspeed-g4 driver Andrew Jeffery
2016-08-19 12:44     ` Andrew Jeffery
2016-08-30  6:04     ` Joel Stanley
2016-08-19 12:44 ` [PATCH v2 4/8] gpio: dt-bindings: Add documentation for Aspeed GPIO controllers Andrew Jeffery
     [not found]   ` <20160819124414.24242-5-andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-08-19 14:36     ` Rob Herring
2016-08-19 14:36       ` Rob Herring
2016-08-22  0:16       ` Andrew Jeffery
2016-08-30  6:04         ` Joel Stanley
2016-08-19 12:44 ` [PATCH v2 5/8] pinctrl: Add core support for Aspeed SoCs Andrew Jeffery
     [not found]   ` <20160819124414.24242-6-andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-08-22 13:45     ` Linus Walleij [this message]
2016-08-22 13:45       ` Linus Walleij
2016-08-23  2:30       ` Andrew Jeffery
2016-08-30  6:04         ` Joel Stanley
2016-08-19 12:44 ` [PATCH v2 7/8] pinctrl: Add pinctrl-aspeed-g5 driver Andrew Jeffery
2016-08-30  6:04   ` Joel Stanley
2016-08-19 12:44 ` [PATCH v2 8/8] gpio: Add Aspeed driver Andrew Jeffery
2016-08-22 13:48   ` Linus Walleij

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