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From: Bin Meng <bmeng.cn@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 3/9] riscv: implement IPI platform functions using SBI
Date: Sun, 10 Mar 2019 21:01:12 +0800	[thread overview]
Message-ID: <CAEUhbmWAWG0168iNLazcmE+MqwHKpa04jZ10w5Zwv0=bPru_OA@mail.gmail.com> (raw)
In-Reply-To: <20190305225331.1353-4-lukas.auer@aisec.fraunhofer.de>

On Wed, Mar 6, 2019 at 6:54 AM Lukas Auer
<lukas.auer@aisec.fraunhofer.de> wrote:
>
> The supervisor binary interface (SBI) provides the necessary functions
> to implement the platform IPI functions riscv_send_ipi() and
> riscv_clear_ipi(). Use it to implement them.
>
> This adds support for inter-processor interrupts (IPIs) on RISC-V CPUs
> running in supervisor mode. Support for machine mode is already
> available for CPUs that include the SiFive CLINT.
>
> Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
> Reviewed-by: Anup Patel <anup.patel@wdc.com>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> Changes in v2: None
>
>  arch/riscv/Kconfig       |  5 +++++
>  arch/riscv/lib/Makefile  |  1 +
>  arch/riscv/lib/sbi_ipi.c | 25 +++++++++++++++++++++++++
>  3 files changed, 31 insertions(+)
>  create mode 100644 arch/riscv/lib/sbi_ipi.c
>

Tested-by: Bin Meng <bmeng.cn@gmail.com>

  parent reply	other threads:[~2019-03-10 13:01 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-05 22:53 [U-Boot] [PATCH v2 0/9] SMP support for RISC-V Lukas Auer
2019-03-05 22:53 ` [U-Boot] [PATCH v2 1/9] riscv: add infrastructure for calling functions on other harts Lukas Auer
2019-03-06  3:55   ` Anup Patel
2019-03-07  3:20   ` Atish Patra
2019-03-10 14:41     ` Auer, Lukas
2019-03-10 13:01   ` Bin Meng
2019-03-05 22:53 ` [U-Boot] [PATCH v2 2/9] riscv: import the supervisor binary interface header file Lukas Auer
2019-03-07  3:21   ` Atish Patra
2019-03-05 22:53 ` [U-Boot] [PATCH v2 3/9] riscv: implement IPI platform functions using SBI Lukas Auer
2019-03-07  3:23   ` Atish Patra
2019-03-10 13:01   ` Bin Meng [this message]
2019-03-05 22:53 ` [U-Boot] [PATCH v2 4/9] riscv: delay initialization of caches and debug UART Lukas Auer
2019-03-05 22:53 ` [U-Boot] [PATCH v2 5/9] riscv: add support for multi-hart systems Lukas Auer
2019-03-06  3:56   ` Anup Patel
2019-03-10 13:01   ` Bin Meng
2019-03-10 13:46     ` Auer, Lukas
2019-03-05 22:53 ` [U-Boot] [PATCH v2 6/9] riscv: boot images passed to bootm on all harts Lukas Auer
2019-03-10 13:01   ` Bin Meng
2019-03-05 22:53 ` [U-Boot] [PATCH v2 7/9] riscv: do not rely on hart ID passed by previous boot stage Lukas Auer
2019-03-06  3:56   ` Anup Patel
2019-03-07  3:26   ` Atish Patra
2019-03-10 13:01   ` Bin Meng
     [not found]   ` <752D002CFF5D0F4FA35C0100F1D73F3FA40983DC@ATCPCS16.andestech.com>
2019-03-13  2:10     ` Rick Chen
2019-03-05 22:53 ` [U-Boot] [PATCH v2 8/9] riscv: fu540: enable SMP Lukas Auer
2019-03-10 13:01   ` Bin Meng
2019-03-05 22:53 ` [U-Boot] [PATCH v2 9/9] riscv: qemu: " Lukas Auer
2019-03-10 13:01   ` Bin Meng
2019-03-06  4:00 ` [U-Boot] [PATCH v2 0/9] SMP support for RISC-V Anup Patel
2019-03-06  9:22   ` Auer, Lukas
2019-03-06 10:07     ` Anup Patel
2019-03-06 10:56       ` Andreas Schwab
2019-03-06 11:24         ` Anup Patel
2019-03-06 11:47           ` Andreas Schwab
2019-03-06 11:49             ` Anup Patel
2019-03-06 12:01               ` Andreas Schwab
2019-03-06 12:15                 ` Auer, Lukas
2019-03-06 12:32                   ` Anup Patel
2019-03-06 23:50                     ` Atish Patra
2019-03-07  4:47                       ` Anup Patel
2019-03-07  9:20                         ` Andreas Schwab
2019-03-08  3:37                           ` Anup Patel
2019-03-11  9:17                             ` Andreas Schwab
2019-03-11 11:56                             ` Palmer Dabbelt
2019-03-11 16:10                               ` Anup Patel
2019-03-06 12:17       ` Auer, Lukas

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