From: Auer, Lukas <lukas.auer@aisec.fraunhofer.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 0/9] SMP support for RISC-V
Date: Wed, 6 Mar 2019 12:15:40 +0000 [thread overview]
Message-ID: <05c785e234b2aaf33892369376883c010a765cff.camel@aisec.fraunhofer.de> (raw)
In-Reply-To: <mvmef7kxlcg.fsf@suse.de>
On Wed, 2019-03-06 at 13:01 +0100, Andreas Schwab wrote:
> On Mär 06 2019, Anup Patel <anup@brainfault.org> wrote:
>
> > On Wed, Mar 6, 2019 at 5:17 PM Andreas Schwab <schwab@suse.de>
> > wrote:
> > > On Mär 06 2019, Anup Patel <Anup.Patel@wdc.com> wrote:
> > >
> > > > > -----Original Message-----
> > > > > From: Andreas Schwab <schwab@suse.de>
> > > > > Sent: Wednesday, March 6, 2019 4:27 PM
> > > > > To: Anup Patel <Anup.Patel@wdc.com>
> > > > > Cc: Auer, Lukas <lukas.auer@aisec.fraunhofer.de>;
> > > > > u-boot at lists.denx.de;
> > > > > paul.walmsley at sifive.com; agraf at suse.de; anup at brainfault.org;
> > > > > baruch at tkos.co.il; daniel.schwierzeck at gmail.com;
> > > > > bmeng.cn at gmail.com;
> > > > > rick at andestech.com; sr at denx.de; palmer at sifive.com; Atish
> > > > > Patra
> > > > > <Atish.Patra@wdc.com>
> > > > > Subject: Re: [PATCH v2 0/9] SMP support for RISC-V
> > > > >
> > > > > Apparently sometimes u-boot tries to boot the kernel on heart
> > > > > 0 (the E51
> > > > > core), which will then fail to start userspace, since that
> > > > > cannot cope with the
> > > > > missing fpu.
> > > >
> > > > That's not possible
> > >
> > > Yes, it is.
> > >
> > >
> > > OpenSBI v0.3 (Mar 6 2019 10:55:01)
> > > ____ _____ ____ _____
> > > / __ \ / ____| _ \_ _|
> > > | | | |_ __ ___ _ __ | (___ | |_) || |
> > > | | | | '_ \ / _ \ '_ \ \___ \| _ < | |
> > > | |__| | |_) | __/ | | |____) | |_) || |_
> > > \____/| .__/ \___|_| |_|_____/|____/_____|
> > > | |
> > > |_|
> > >
> > > Platform Name : SiFive Freedom U540
> > > Platform HART Features : RV64ACDFIMSU
> > > Platform Max HARTs : 5
> > > Current Hart : 2
> > > Firmware Base : 0x80000000
> > > Firmware Size : 88 KB
> > > Runtime SBI Version : 0.1
> > >
> > > PMP0: 0x0000000080000000-0x000000008001ffff (A)
> > > PMP1: 0x0000000000000000-0x0000007fffffffff (A,R,W,X)
> > >
> > >
> > > U-Boot 2019.04-rc3-00010-g3ea5582c09 (Mar 06 2019 - 10:06:10
> > > +0100)
> > >
> > > CPU: rv64imac
> > > Model: sifive,hifive-unleashed-a00
> > > DRAM: 8 GiB
> >
> > How does this prove that U-Boot is booting on HART 0?
>
> See the CPU isa.
>
Interesting.. U-Boot assumes that it can run on any core it is started
on. In this case, OpenSBI must have booted its payload on hart 0.
Lukas
next prev parent reply other threads:[~2019-03-06 12:15 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-05 22:53 [U-Boot] [PATCH v2 0/9] SMP support for RISC-V Lukas Auer
2019-03-05 22:53 ` [U-Boot] [PATCH v2 1/9] riscv: add infrastructure for calling functions on other harts Lukas Auer
2019-03-06 3:55 ` Anup Patel
2019-03-07 3:20 ` Atish Patra
2019-03-10 14:41 ` Auer, Lukas
2019-03-10 13:01 ` Bin Meng
2019-03-05 22:53 ` [U-Boot] [PATCH v2 2/9] riscv: import the supervisor binary interface header file Lukas Auer
2019-03-07 3:21 ` Atish Patra
2019-03-05 22:53 ` [U-Boot] [PATCH v2 3/9] riscv: implement IPI platform functions using SBI Lukas Auer
2019-03-07 3:23 ` Atish Patra
2019-03-10 13:01 ` Bin Meng
2019-03-05 22:53 ` [U-Boot] [PATCH v2 4/9] riscv: delay initialization of caches and debug UART Lukas Auer
2019-03-05 22:53 ` [U-Boot] [PATCH v2 5/9] riscv: add support for multi-hart systems Lukas Auer
2019-03-06 3:56 ` Anup Patel
2019-03-10 13:01 ` Bin Meng
2019-03-10 13:46 ` Auer, Lukas
2019-03-05 22:53 ` [U-Boot] [PATCH v2 6/9] riscv: boot images passed to bootm on all harts Lukas Auer
2019-03-10 13:01 ` Bin Meng
2019-03-05 22:53 ` [U-Boot] [PATCH v2 7/9] riscv: do not rely on hart ID passed by previous boot stage Lukas Auer
2019-03-06 3:56 ` Anup Patel
2019-03-07 3:26 ` Atish Patra
2019-03-10 13:01 ` Bin Meng
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FA40983DC@ATCPCS16.andestech.com>
2019-03-13 2:10 ` Rick Chen
2019-03-05 22:53 ` [U-Boot] [PATCH v2 8/9] riscv: fu540: enable SMP Lukas Auer
2019-03-10 13:01 ` Bin Meng
2019-03-05 22:53 ` [U-Boot] [PATCH v2 9/9] riscv: qemu: " Lukas Auer
2019-03-10 13:01 ` Bin Meng
2019-03-06 4:00 ` [U-Boot] [PATCH v2 0/9] SMP support for RISC-V Anup Patel
2019-03-06 9:22 ` Auer, Lukas
2019-03-06 10:07 ` Anup Patel
2019-03-06 10:56 ` Andreas Schwab
2019-03-06 11:24 ` Anup Patel
2019-03-06 11:47 ` Andreas Schwab
2019-03-06 11:49 ` Anup Patel
2019-03-06 12:01 ` Andreas Schwab
2019-03-06 12:15 ` Auer, Lukas [this message]
2019-03-06 12:32 ` Anup Patel
2019-03-06 23:50 ` Atish Patra
2019-03-07 4:47 ` Anup Patel
2019-03-07 9:20 ` Andreas Schwab
2019-03-08 3:37 ` Anup Patel
2019-03-11 9:17 ` Andreas Schwab
2019-03-11 11:56 ` Palmer Dabbelt
2019-03-11 16:10 ` Anup Patel
2019-03-06 12:17 ` Auer, Lukas
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