* [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
@ 2020-07-08 17:25 Paolo Bonzini
2020-07-08 17:25 ` [PULL v2 09/52] target/i386: fix IEEE SSE floating-point exception raising Paolo Bonzini
` (3 more replies)
0 siblings, 4 replies; 21+ messages in thread
From: Paolo Bonzini @ 2020-07-08 17:25 UTC (permalink / raw)
To: qemu-devel
The following changes since commit eb2c66b10efd2b914b56b20ae90655914310c925:
Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2020-07-06' into staging (2020-07-07 19:47:26 +0100)
are available in the Git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for you to fetch changes up to 392f34e59755f99d69586a63e0f5d80a7ef67f94:
apic: Report current_count via 'info lapic' (2020-07-08 10:01:08 -0400)
----------------------------------------------------------------
* Make checkpatch say 'qemu' instead of 'kernel' (Aleksandar)
* Fix PSE guests with emulated NPT (Alexander B. #1)
* Fix leak (Alexander B. #2)
* HVF fixes (Roman, Cameron)
* New Sapphire Rapids CPUID bits (Cathy)
* cpus.c and softmmu/ cleanups (Claudio)
* TAP driver tweaks (Daniel, Havard)
* object-add bugfix and testcases (Eric A.)
* Fix Coverity MIN_CONST and MAX_CONST (Eric B.)
* "info lapic" improvement (Jan)
* SSE fixes (Joseph)
* "-msg guest-name" option (Mario)
* support for AMD nested live migration (myself)
* Small i386 TCG fixes (myself)
* improved error reporting for Xen (myself)
* fix "-cpu host -overcommit cpu-pm=on" (myself)
* Add accel/Kconfig (Philippe)
* KVM API cleanup (Philippe)
* iscsi sense handling fixes (Yongji)
* Misc bugfixes
----------------------------------------------------------------
v1->v2: add TCG stub for "target/i386: fix IEEE SSE floating-point exception raising"
remove "cpu-timers, icount: new modules" due to s390 failures
remove "chardev/tcp: fix error message double free error" which was merged independently
add "apic: Report current_count via 'info lapic'"
fix semantic conflict
Aleksandar Markovic (1):
checkpatch: Change occurences of 'kernel' to 'qemu' in user messages
Alexander Boettcher (1):
tcg/svm: use host cr4 during NPT page table walk
Alexander Bulekov (1):
pc: fix leak in pc_system_flash_cleanup_unused
Cameron Esfahani (1):
i386: hvf: Make long mode enter and exit clearer
Cathy Zhang (2):
target/i386: Add SERIALIZE cpu feature
target/i386: Enable TSX Suspend Load Address Tracking feature
Claudio Fontana (2):
softmmu: move softmmu only files from root
cpu-throttle: new module, extracted from cpus.c
Daniel P. Berrangé (1):
scripts: improve message when TAP based tests fail
Eric Auger (3):
qom: Introduce object_property_try_add_child()
tests/qmp-cmd-test: Add qmp/object-add-duplicate-id
tests/qmp-cmd-test: Add qmp/object-add-failure-modes
Eric Blake (1):
coverity: provide Coverity-friendly MIN_CONST and MAX_CONST
Havard Skinnemoen (1):
tests: Inject test name also when the test fails
Jan Kiszka (1):
apic: Report current_count via 'info lapic'
Joseph Myers (2):
target/i386: set SSE FTZ in correct floating-point state
target/i386: fix IEEE SSE floating-point exception raising
Luwei Kang (1):
target/i386: Correct the warning message of Intel PT
Mario Smarduch (1):
util/qemu-error: prepend guest name to error message to identify affected VM owner
Paolo Bonzini (7):
KVM: add support for AMD nested live migration
Makefile: simplify MINIKCONF rules
target/i386: remove gen_io_end
target/i386: implement undocumented "smsw r32" behavior
KVM: x86: believe what KVM says about WAITPKG
target/i386: sev: provide proper error reporting for query-sev-capabilities
target/i386: sev: fail query-sev-capabilities if QEMU cannot use SEV
Philippe Mathieu-Daudé (16):
hw/core/null-machine: Do not initialize unused chardev backends
MAINTAINERS: Fix KVM path expansion glob
MAINTAINERS: Add an 'overall' entry for accelerators
MAINTAINERS: Cover the HAX accelerator stub
Makefile: Remove dangerous EOL trailing backslash
Makefile: Write MINIKCONF variables as one entry per line
accel/Kconfig: Extract accel selectors into their own config
accel/Kconfig: Add the TCG selector
accel/tcg: Add stub for probe_access()
cpus: Move CPU code from exec.c to cpus-common.c
accel/kvm: Let kvm_check_extension use global KVM state
accel/kvm: Simplify kvm_check_extension()
accel/kvm: Simplify kvm_check_extension_list()
target/i386/kvm: Simplify get_para_features()
target/i386/kvm: Simplify kvm_get_mce_cap_supported()
target/i386/kvm: Simplify kvm_get_supported_[feature]_msrs()
Roman Bolshakov (7):
i386: hvf: Set env->eip in macvm_set_rip()
i386: hvf: Move synchronize functions to sysemu
i386: hvf: Add hvf_cpu_synchronize_pre_loadvm()
i386: hvf: Move Guest LMA reset to macvm_set_cr0()
i386: hvf: Don't duplicate register reset
i386: hvf: Clean up synchronize functions
MAINTAINERS: Add Cameron as HVF co-maintainer
Thomas Huth (1):
softmmu/vl: Remove the check for colons in -accel parameters
Xie Yongji (2):
iscsi: handle check condition status in retry loop
iscsi: return -EIO when sense fields are meaningless
Kconfig | 4 +
Kconfig.host | 7 -
MAINTAINERS | 29 +-
Makefile | 12 +-
Makefile.target | 7 +-
accel/Kconfig | 9 +
accel/kvm/kvm-all.c | 72 +--
accel/stubs/tcg-stub.c | 7 +
block/iscsi.c | 22 +-
cpus-common.c | 18 +
exec.c | 22 -
hw/core/null-machine.c | 5 +
hw/hyperv/hyperv.c | 2 +-
hw/i386/kvm/clock.c | 2 +-
hw/i386/kvm/i8254.c | 4 +-
hw/i386/kvm/ioapic.c | 2 +-
hw/i386/pc_sysfw.c | 5 +
hw/intc/apic.c | 18 -
hw/intc/apic_common.c | 19 +
hw/intc/arm_gic_kvm.c | 2 +-
hw/intc/openpic_kvm.c | 2 +-
hw/intc/xics_kvm.c | 2 +-
hw/s390x/s390-stattrib-kvm.c | 2 +-
include/hw/core/cpu.h | 37 --
include/hw/i386/apic_internal.h | 1 +
include/qemu/error-report.h | 2 +
include/qemu/main-loop.h | 5 +
include/qemu/osdep.h | 21 +-
include/qom/object.h | 26 +-
include/sysemu/cpu-throttle.h | 68 +++
include/sysemu/hvf.h | 2 +-
include/sysemu/hw_accel.h | 13 +
include/sysemu/kvm.h | 2 +-
migration/migration.c | 1 +
migration/ram.c | 1 +
qemu-options.hx | 12 +-
qom/object.c | 21 +-
qom/object_interfaces.c | 7 +-
scripts/checkpatch.pl | 6 +-
scripts/tap-driver.pl | 2 +-
softmmu/Makefile.objs | 11 +
arch_init.c => softmmu/arch_init.c | 0
balloon.c => softmmu/balloon.c | 0
softmmu/cpu-throttle.c | 122 ++++
cpus.c => softmmu/cpus.c | 107 +---
ioport.c => softmmu/ioport.c | 0
memory.c => softmmu/memory.c | 0
memory_mapping.c => softmmu/memory_mapping.c | 0
qtest.c => softmmu/qtest.c | 0
softmmu/vl.c | 14 +-
target/arm/kvm.c | 18 +-
target/arm/kvm32.c | 2 +-
target/arm/kvm64.c | 15 +-
target/i386/Makefile.objs | 1 +
target/i386/cpu.c | 13 +-
target/i386/cpu.h | 10 +
target/i386/excp_helper.c | 4 +-
target/i386/fpu_helper.c | 37 +-
target/i386/gdbstub.c | 1 +
target/i386/helper.c | 6 +-
target/i386/helper.h | 1 +
target/i386/hvf/hvf.c | 137 +----
target/i386/hvf/vmx.h | 17 +-
target/i386/kvm.c | 143 +++--
target/i386/kvm_i386.h | 1 +
target/i386/machine.c | 31 +-
target/i386/monitor.c | 10 +-
target/i386/ops_sse.h | 28 +-
target/i386/sev-stub.c | 3 +-
target/i386/sev.c | 27 +-
target/i386/sev_i386.h | 2 +-
target/i386/svm.h | 1 +
target/i386/svm_helper.c | 7 +-
target/i386/tcg-stub.c | 25 +
target/i386/translate.c | 36 +-
target/mips/kvm.c | 4 +-
target/ppc/kvm.c | 34 +-
target/s390x/cpu_models.c | 3 +-
target/s390x/kvm.c | 30 +-
tests/Makefile.include | 2 +-
tests/qtest/qmp-cmd-test.c | 109 +++-
tests/tcg/i386/Makefile.target | 4 +
tests/tcg/i386/test-i386-sse-exceptions.c | 813 +++++++++++++++++++++++++++
util/qemu-error.c | 7 +
84 files changed, 1750 insertions(+), 587 deletions(-)
create mode 100644 Kconfig
create mode 100644 accel/Kconfig
create mode 100644 include/sysemu/cpu-throttle.h
rename arch_init.c => softmmu/arch_init.c (100%)
rename balloon.c => softmmu/balloon.c (100%)
create mode 100644 softmmu/cpu-throttle.c
rename cpus.c => softmmu/cpus.c (95%)
rename ioport.c => softmmu/ioport.c (100%)
rename memory.c => softmmu/memory.c (100%)
rename memory_mapping.c => softmmu/memory_mapping.c (100%)
rename qtest.c => softmmu/qtest.c (100%)
create mode 100644 target/i386/tcg-stub.c
create mode 100644 tests/tcg/i386/test-i386-sse-exceptions.c
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PULL v2 09/52] target/i386: fix IEEE SSE floating-point exception raising
2020-07-08 17:25 [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze Paolo Bonzini
@ 2020-07-08 17:25 ` Paolo Bonzini
2020-07-08 17:25 ` [PULL v2 44/52] accel/kvm: Simplify kvm_check_extension() Paolo Bonzini
` (2 subsequent siblings)
3 siblings, 0 replies; 21+ messages in thread
From: Paolo Bonzini @ 2020-07-08 17:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Joseph Myers
From: Joseph Myers <joseph@codesourcery.com>
The SSE instruction implementations all fail to raise the expected
IEEE floating-point exceptions because they do nothing to convert the
exception state from the softfloat machinery into the exception flags
in MXCSR.
Fix this by adding such conversions. Unlike for x87, emulated SSE
floating-point operations might be optimized using hardware floating
point on the host, and so a different approach is taken that is
compatible with such optimizations. The required invariant is that
all exceptions set in env->sse_status (other than "denormal operand",
for which the SSE semantics are different from those in the softfloat
code) are ones that are set in the MXCSR; the emulated MXCSR is
updated lazily when code reads MXCSR, while when code sets MXCSR, the
exceptions in env->sse_status are set accordingly.
A few instructions do not raise all the exceptions that would be
raised by the softfloat code, and those instructions are made to save
and restore the softfloat exception state accordingly.
Nothing is done about "denormal operand"; setting that (only for the
case when input denormals are *not* flushed to zero, the opposite of
the logic in the softfloat code for such an exception) will require
custom code for relevant instructions, or else architecture-specific
conditionals in the softfloat code for when to set such an exception
together with custom code for various SSE conversion and rounding
instructions that do not set that exception.
Nothing is done about trapping exceptions (for which there is minimal
and largely broken support in QEMU's emulation in the x87 case and no
support at all in the SSE case).
Signed-off-by: Joseph Myers <joseph@codesourcery.com>
Message-Id: <alpine.DEB.2.21.2006252358000.3832@digraph.polyomino.org.uk>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/Makefile.objs | 1 +
target/i386/cpu.h | 1 +
target/i386/fpu_helper.c | 35 +
target/i386/gdbstub.c | 1 +
target/i386/helper.c | 1 +
target/i386/helper.h | 1 +
target/i386/ops_sse.h | 28 +-
target/i386/tcg-stub.c | 25 +
target/i386/translate.c | 1 +
tests/tcg/i386/Makefile.target | 4 +
tests/tcg/i386/test-i386-sse-exceptions.c | 813 ++++++++++++++++++++++
11 files changed, 899 insertions(+), 12 deletions(-)
create mode 100644 target/i386/tcg-stub.c
create mode 100644 tests/tcg/i386/test-i386-sse-exceptions.c
diff --git a/target/i386/Makefile.objs b/target/i386/Makefile.objs
index 48e0c28434..0b93143e27 100644
--- a/target/i386/Makefile.objs
+++ b/target/i386/Makefile.objs
@@ -3,6 +3,7 @@ obj-$(CONFIG_TCG) += translate.o
obj-$(CONFIG_TCG) += bpt_helper.o cc_helper.o excp_helper.o fpu_helper.o
obj-$(CONFIG_TCG) += int_helper.o mem_helper.o misc_helper.o mpx_helper.o
obj-$(CONFIG_TCG) += seg_helper.o smm_helper.o svm_helper.o
+obj-$(call lnot,$(CONFIG_TCG)) += tcg-stub.o
obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
ifeq ($(CONFIG_SOFTMMU),y)
obj-y += machine.o arch_memory_mapping.o arch_dump.o monitor.o
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 7d77efd9e4..06b2e3a5c6 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2143,6 +2143,7 @@ static inline bool cpu_vmx_maybe_enabled(CPUX86State *env)
/* fpu_helper.c */
void update_fp_status(CPUX86State *env);
void update_mxcsr_status(CPUX86State *env);
+void update_mxcsr_from_sse_status(CPUX86State *env);
static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
{
diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c
index ec5b9db8b9..f5e6c4b88d 100644
--- a/target/i386/fpu_helper.c
+++ b/target/i386/fpu_helper.c
@@ -2539,6 +2539,7 @@ static void do_xsave_fpu(CPUX86State *env, target_ulong ptr, uintptr_t ra)
static void do_xsave_mxcsr(CPUX86State *env, target_ulong ptr, uintptr_t ra)
{
+ update_mxcsr_from_sse_status(env);
cpu_stl_data_ra(env, ptr + XO(legacy.mxcsr), env->mxcsr, ra);
cpu_stl_data_ra(env, ptr + XO(legacy.mxcsr_mask), 0x0000ffff, ra);
}
@@ -2968,6 +2969,14 @@ void update_mxcsr_status(CPUX86State *env)
}
set_float_rounding_mode(rnd_type, &env->sse_status);
+ /* Set exception flags. */
+ set_float_exception_flags((mxcsr & FPUS_IE ? float_flag_invalid : 0) |
+ (mxcsr & FPUS_ZE ? float_flag_divbyzero : 0) |
+ (mxcsr & FPUS_OE ? float_flag_overflow : 0) |
+ (mxcsr & FPUS_UE ? float_flag_underflow : 0) |
+ (mxcsr & FPUS_PE ? float_flag_inexact : 0),
+ &env->sse_status);
+
/* set denormals are zero */
set_flush_inputs_to_zero((mxcsr & SSE_DAZ) ? 1 : 0, &env->sse_status);
@@ -2975,6 +2984,32 @@ void update_mxcsr_status(CPUX86State *env)
set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->sse_status);
}
+void update_mxcsr_from_sse_status(CPUX86State *env)
+{
+ if (tcg_enabled()) {
+ uint8_t flags = get_float_exception_flags(&env->sse_status);
+ /*
+ * The MXCSR denormal flag has opposite semantics to
+ * float_flag_input_denormal (the softfloat code sets that flag
+ * only when flushing input denormals to zero, but SSE sets it
+ * only when not flushing them to zero), so is not converted
+ * here.
+ */
+ env->mxcsr |= ((flags & float_flag_invalid ? FPUS_IE : 0) |
+ (flags & float_flag_divbyzero ? FPUS_ZE : 0) |
+ (flags & float_flag_overflow ? FPUS_OE : 0) |
+ (flags & float_flag_underflow ? FPUS_UE : 0) |
+ (flags & float_flag_inexact ? FPUS_PE : 0) |
+ (flags & float_flag_output_denormal ? FPUS_UE | FPUS_PE :
+ 0));
+ }
+}
+
+void helper_update_mxcsr(CPUX86State *env)
+{
+ update_mxcsr_from_sse_status(env);
+}
+
void helper_ldmxcsr(CPUX86State *env, uint32_t val)
{
cpu_set_mxcsr(env, val);
diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index b98a99500a..9ae43bda0f 100644
--- a/target/i386/gdbstub.c
+++ b/target/i386/gdbstub.c
@@ -184,6 +184,7 @@ int x86_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
return gdb_get_reg32(mem_buf, 0); /* fop */
case IDX_MXCSR_REG:
+ update_mxcsr_from_sse_status(env);
return gdb_get_reg32(mem_buf, env->mxcsr);
case IDX_CTL_CR0_REG:
diff --git a/target/i386/helper.c b/target/i386/helper.c
index c3a6e4fabe..fa2a1dcdda 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -544,6 +544,7 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags)
for(i = 0; i < 8; i++) {
fptag |= ((!env->fptags[i]) << i);
}
+ update_mxcsr_from_sse_status(env);
qemu_fprintf(f, "FCW=%04x FSW=%04x [ST=%d] FTW=%02x MXCSR=%08x\n",
env->fpuc,
(env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11,
diff --git a/target/i386/helper.h b/target/i386/helper.h
index 8f9e1905c3..c2ae2f7e61 100644
--- a/target/i386/helper.h
+++ b/target/i386/helper.h
@@ -207,6 +207,7 @@ DEF_HELPER_FLAGS_2(pext, TCG_CALL_NO_RWG_SE, tl, tl, tl)
/* MMX/SSE */
DEF_HELPER_2(ldmxcsr, void, env, i32)
+DEF_HELPER_1(update_mxcsr, void, env)
DEF_HELPER_1(enter_mmx, void, env)
DEF_HELPER_1(emms, void, env)
DEF_HELPER_3(movq, void, env, ptr, ptr)
diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 14f2b16abd..c7614f8b0b 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -843,6 +843,7 @@ int64_t helper_cvttsd2sq(CPUX86State *env, ZMMReg *s)
void helper_rsqrtps(CPUX86State *env, ZMMReg *d, ZMMReg *s)
{
+ uint8_t old_flags = get_float_exception_flags(&env->sse_status);
d->ZMM_S(0) = float32_div(float32_one,
float32_sqrt(s->ZMM_S(0), &env->sse_status),
&env->sse_status);
@@ -855,26 +856,33 @@ void helper_rsqrtps(CPUX86State *env, ZMMReg *d, ZMMReg *s)
d->ZMM_S(3) = float32_div(float32_one,
float32_sqrt(s->ZMM_S(3), &env->sse_status),
&env->sse_status);
+ set_float_exception_flags(old_flags, &env->sse_status);
}
void helper_rsqrtss(CPUX86State *env, ZMMReg *d, ZMMReg *s)
{
+ uint8_t old_flags = get_float_exception_flags(&env->sse_status);
d->ZMM_S(0) = float32_div(float32_one,
float32_sqrt(s->ZMM_S(0), &env->sse_status),
&env->sse_status);
+ set_float_exception_flags(old_flags, &env->sse_status);
}
void helper_rcpps(CPUX86State *env, ZMMReg *d, ZMMReg *s)
{
+ uint8_t old_flags = get_float_exception_flags(&env->sse_status);
d->ZMM_S(0) = float32_div(float32_one, s->ZMM_S(0), &env->sse_status);
d->ZMM_S(1) = float32_div(float32_one, s->ZMM_S(1), &env->sse_status);
d->ZMM_S(2) = float32_div(float32_one, s->ZMM_S(2), &env->sse_status);
d->ZMM_S(3) = float32_div(float32_one, s->ZMM_S(3), &env->sse_status);
+ set_float_exception_flags(old_flags, &env->sse_status);
}
void helper_rcpss(CPUX86State *env, ZMMReg *d, ZMMReg *s)
{
+ uint8_t old_flags = get_float_exception_flags(&env->sse_status);
d->ZMM_S(0) = float32_div(float32_one, s->ZMM_S(0), &env->sse_status);
+ set_float_exception_flags(old_flags, &env->sse_status);
}
static inline uint64_t helper_extrq(uint64_t src, int shift, int len)
@@ -1764,6 +1772,7 @@ void glue(helper_phminposuw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
void glue(helper_roundps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
uint32_t mode)
{
+ uint8_t old_flags = get_float_exception_flags(&env->sse_status);
signed char prev_rounding_mode;
prev_rounding_mode = env->sse_status.float_rounding_mode;
@@ -1789,19 +1798,18 @@ void glue(helper_roundps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
d->ZMM_S(2) = float32_round_to_int(s->ZMM_S(2), &env->sse_status);
d->ZMM_S(3) = float32_round_to_int(s->ZMM_S(3), &env->sse_status);
-#if 0 /* TODO */
- if (mode & (1 << 3)) {
+ if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) {
set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
~float_flag_inexact,
&env->sse_status);
}
-#endif
env->sse_status.float_rounding_mode = prev_rounding_mode;
}
void glue(helper_roundpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
uint32_t mode)
{
+ uint8_t old_flags = get_float_exception_flags(&env->sse_status);
signed char prev_rounding_mode;
prev_rounding_mode = env->sse_status.float_rounding_mode;
@@ -1825,19 +1833,18 @@ void glue(helper_roundpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
d->ZMM_D(0) = float64_round_to_int(s->ZMM_D(0), &env->sse_status);
d->ZMM_D(1) = float64_round_to_int(s->ZMM_D(1), &env->sse_status);
-#if 0 /* TODO */
- if (mode & (1 << 3)) {
+ if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) {
set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
~float_flag_inexact,
&env->sse_status);
}
-#endif
env->sse_status.float_rounding_mode = prev_rounding_mode;
}
void glue(helper_roundss, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
uint32_t mode)
{
+ uint8_t old_flags = get_float_exception_flags(&env->sse_status);
signed char prev_rounding_mode;
prev_rounding_mode = env->sse_status.float_rounding_mode;
@@ -1860,19 +1867,18 @@ void glue(helper_roundss, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
d->ZMM_S(0) = float32_round_to_int(s->ZMM_S(0), &env->sse_status);
-#if 0 /* TODO */
- if (mode & (1 << 3)) {
+ if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) {
set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
~float_flag_inexact,
&env->sse_status);
}
-#endif
env->sse_status.float_rounding_mode = prev_rounding_mode;
}
void glue(helper_roundsd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
uint32_t mode)
{
+ uint8_t old_flags = get_float_exception_flags(&env->sse_status);
signed char prev_rounding_mode;
prev_rounding_mode = env->sse_status.float_rounding_mode;
@@ -1895,13 +1901,11 @@ void glue(helper_roundsd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
d->ZMM_D(0) = float64_round_to_int(s->ZMM_D(0), &env->sse_status);
-#if 0 /* TODO */
- if (mode & (1 << 3)) {
+ if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) {
set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
~float_flag_inexact,
&env->sse_status);
}
-#endif
env->sse_status.float_rounding_mode = prev_rounding_mode;
}
diff --git a/target/i386/tcg-stub.c b/target/i386/tcg-stub.c
new file mode 100644
index 0000000000..b00e23d606
--- /dev/null
+++ b/target/i386/tcg-stub.c
@@ -0,0 +1,25 @@
+/*
+ * x86 FPU, MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI helpers
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+
+void update_mxcsr_from_sse_status(CPUX86State *env)
+{
+}
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 5e5dbb41b0..b3fea54411 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -8157,6 +8157,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
break;
}
+ gen_helper_update_mxcsr(cpu_env);
gen_lea_modrm(env, s, modrm);
tcg_gen_ld32u_tl(s->T0, cpu_env, offsetof(CPUX86State, mxcsr));
gen_op_st_v(s, MO_32, s->T0, s->A0);
diff --git a/tests/tcg/i386/Makefile.target b/tests/tcg/i386/Makefile.target
index 1a6463a7dc..a66232a67d 100644
--- a/tests/tcg/i386/Makefile.target
+++ b/tests/tcg/i386/Makefile.target
@@ -10,6 +10,10 @@ ALL_X86_TESTS=$(I386_SRCS:.c=)
SKIP_I386_TESTS=test-i386-ssse3
X86_64_TESTS:=$(filter test-i386-ssse3, $(ALL_X86_TESTS))
+test-i386-sse-exceptions: CFLAGS += -msse4.1 -mfpmath=sse
+run-test-i386-sse-exceptions: QEMU_OPTS += -cpu max
+run-plugin-test-i386-sse-exceptions-%: QEMU_OPTS += -cpu max
+
test-i386-pcmpistri: CFLAGS += -msse4.2
run-test-i386-pcmpistri: QEMU_OPTS += -cpu max
run-plugin-test-i386-pcmpistri-%: QEMU_OPTS += -cpu max
diff --git a/tests/tcg/i386/test-i386-sse-exceptions.c b/tests/tcg/i386/test-i386-sse-exceptions.c
new file mode 100644
index 0000000000..a104f46c11
--- /dev/null
+++ b/tests/tcg/i386/test-i386-sse-exceptions.c
@@ -0,0 +1,813 @@
+/* Test SSE exceptions. */
+
+#include <float.h>
+#include <stdint.h>
+#include <stdio.h>
+
+volatile float f_res;
+volatile double d_res;
+
+volatile float f_snan = __builtin_nansf("");
+volatile float f_half = 0.5f;
+volatile float f_third = 1.0f / 3.0f;
+volatile float f_nan = __builtin_nanl("");
+volatile float f_inf = __builtin_inff();
+volatile float f_ninf = -__builtin_inff();
+volatile float f_one = 1.0f;
+volatile float f_two = 2.0f;
+volatile float f_zero = 0.0f;
+volatile float f_nzero = -0.0f;
+volatile float f_min = FLT_MIN;
+volatile float f_true_min = 0x1p-149f;
+volatile float f_max = FLT_MAX;
+volatile float f_nmax = -FLT_MAX;
+
+volatile double d_snan = __builtin_nans("");
+volatile double d_half = 0.5;
+volatile double d_third = 1.0 / 3.0;
+volatile double d_nan = __builtin_nan("");
+volatile double d_inf = __builtin_inf();
+volatile double d_ninf = -__builtin_inf();
+volatile double d_one = 1.0;
+volatile double d_two = 2.0;
+volatile double d_zero = 0.0;
+volatile double d_nzero = -0.0;
+volatile double d_min = DBL_MIN;
+volatile double d_true_min = 0x1p-1074;
+volatile double d_max = DBL_MAX;
+volatile double d_nmax = -DBL_MAX;
+
+volatile int32_t i32_max = INT32_MAX;
+
+#define IE (1 << 0)
+#define ZE (1 << 2)
+#define OE (1 << 3)
+#define UE (1 << 4)
+#define PE (1 << 5)
+#define EXC (IE | ZE | OE | UE | PE)
+
+uint32_t mxcsr_default = 0x1f80;
+uint32_t mxcsr_ftz = 0x9f80;
+
+int main(void)
+{
+ uint32_t mxcsr;
+ int32_t i32_res;
+ int ret = 0;
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = f_snan;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: widen float snan\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = d_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: narrow float underflow\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = d_max;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (OE | PE)) {
+ printf("FAIL: narrow float overflow\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = d_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: narrow float inexact\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = d_snan;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: narrow float snan\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("roundss $4, %0, %0" : "=x" (f_res) : "0" (f_min));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: roundss min\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("roundss $12, %0, %0" : "=x" (f_res) : "0" (f_min));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: roundss no-inexact min\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("roundss $4, %0, %0" : "=x" (f_res) : "0" (f_snan));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: roundss snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("roundss $12, %0, %0" : "=x" (f_res) : "0" (f_snan));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: roundss no-inexact snan\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("roundsd $4, %0, %0" : "=x" (d_res) : "0" (d_min));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: roundsd min\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("roundsd $12, %0, %0" : "=x" (d_res) : "0" (d_min));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: roundsd no-inexact min\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("roundsd $4, %0, %0" : "=x" (d_res) : "0" (d_snan));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: roundsd snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("roundsd $12, %0, %0" : "=x" (d_res) : "0" (d_snan));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: roundsd no-inexact snan\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("comiss %1, %0" : : "x" (f_nan), "x" (f_zero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: comiss nan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("ucomiss %1, %0" : : "x" (f_nan), "x" (f_zero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: ucomiss nan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("ucomiss %1, %0" : : "x" (f_snan), "x" (f_zero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: ucomiss snan\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("comisd %1, %0" : : "x" (d_nan), "x" (d_zero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: comisd nan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("ucomisd %1, %0" : : "x" (d_nan), "x" (d_zero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: ucomisd nan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("ucomisd %1, %0" : : "x" (d_snan), "x" (d_zero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: ucomisd snan\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_max + f_max;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (OE | PE)) {
+ printf("FAIL: float add overflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_max + f_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: float add inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_inf + f_ninf;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: float add inf -inf\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_snan + f_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: float add snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
+ f_res = f_true_min + f_true_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: float add FTZ underflow\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_max + d_max;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (OE | PE)) {
+ printf("FAIL: double add overflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_max + d_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: double add inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_inf + d_ninf;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: double add inf -inf\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_snan + d_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: double add snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
+ d_res = d_true_min + d_true_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: double add FTZ underflow\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_max - f_nmax;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (OE | PE)) {
+ printf("FAIL: float sub overflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_max - f_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: float sub inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_inf - f_inf;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: float sub inf inf\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_snan - f_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: float sub snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
+ f_res = f_min - f_true_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: float sub FTZ underflow\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_max - d_nmax;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (OE | PE)) {
+ printf("FAIL: double sub overflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_max - d_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: double sub inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_inf - d_inf;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: double sub inf inf\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_snan - d_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: double sub snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
+ d_res = d_min - d_true_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: double sub FTZ underflow\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_max * f_max;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (OE | PE)) {
+ printf("FAIL: float mul overflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_third * f_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: float mul inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_min * f_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: float mul underflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_inf * f_zero;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: float mul inf 0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_snan * f_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: float mul snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
+ f_res = f_min * f_half;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: float mul FTZ underflow\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_max * d_max;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (OE | PE)) {
+ printf("FAIL: double mul overflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_third * d_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: double mul inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_min * d_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: double mul underflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_inf * d_zero;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: double mul inf 0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_snan * d_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: double mul snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
+ d_res = d_min * d_half;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: double mul FTZ underflow\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_max / f_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (OE | PE)) {
+ printf("FAIL: float div overflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_one / f_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: float div inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_min / f_max;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: float div underflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_one / f_zero;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != ZE) {
+ printf("FAIL: float div 1 0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_inf / f_zero;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: float div inf 0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_nan / f_zero;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: float div nan 0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_zero / f_zero;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: float div 0 0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_inf / f_inf;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: float div inf inf\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ f_res = f_snan / f_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: float div snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
+ f_res = f_min / f_two;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: float div FTZ underflow\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_max / d_min;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (OE | PE)) {
+ printf("FAIL: double div overflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_one / d_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: double div inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_min / d_max;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: double div underflow\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_one / d_zero;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != ZE) {
+ printf("FAIL: double div 1 0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_inf / d_zero;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: double div inf 0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_nan / d_zero;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: double div nan 0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_zero / d_zero;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: double div 0 0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_inf / d_inf;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: double div inf inf\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ d_res = d_snan / d_third;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: double div snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
+ d_res = d_min / d_two;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != (UE | PE)) {
+ printf("FAIL: double div FTZ underflow\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) : "0" (f_max));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: sqrtss inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) : "0" (f_nmax));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: sqrtss -max\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) : "0" (f_ninf));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: sqrtss -inf\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) : "0" (f_snan));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: sqrtss snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) : "0" (f_nzero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: sqrtss -0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) :
+ "0" (-__builtin_nanf("")));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: sqrtss -nan\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) : "0" (d_max));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: sqrtsd inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) : "0" (d_nmax));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: sqrtsd -max\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) : "0" (d_ninf));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: sqrtsd -inf\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) : "0" (d_snan));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: sqrtsd snan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) : "0" (d_nzero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: sqrtsd -0\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) :
+ "0" (-__builtin_nan("")));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: sqrtsd -nan\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("maxss %1, %0" : : "x" (f_nan), "x" (f_zero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: maxss nan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("minss %1, %0" : : "x" (f_nan), "x" (f_zero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: minss nan\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("maxsd %1, %0" : : "x" (d_nan), "x" (d_zero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: maxsd nan\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("minsd %1, %0" : : "x" (d_nan), "x" (d_zero));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: minsd nan\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvtsi2ss %1, %0" : "=x" (f_res) : "m" (i32_max));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: cvtsi2ss inexact\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvtsi2sd %1, %0" : "=x" (d_res) : "m" (i32_max));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: cvtsi2sd exact\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvtss2si %1, %0" : "=r" (i32_res) : "x" (1.5f));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: cvtss2si inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvtss2si %1, %0" : "=r" (i32_res) : "x" (0x1p31f));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: cvtss2si 0x1p31\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvtss2si %1, %0" : "=r" (i32_res) : "x" (f_inf));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: cvtss2si inf\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvtsd2si %1, %0" : "=r" (i32_res) : "x" (1.5));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: cvtsd2si inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvtsd2si %1, %0" : "=r" (i32_res) : "x" (0x1p31));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: cvtsd2si 0x1p31\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvtsd2si %1, %0" : "=r" (i32_res) : "x" (d_inf));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: cvtsd2si inf\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvttss2si %1, %0" : "=r" (i32_res) : "x" (1.5f));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: cvttss2si inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvttss2si %1, %0" : "=r" (i32_res) : "x" (0x1p31f));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: cvttss2si 0x1p31\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvttss2si %1, %0" : "=r" (i32_res) : "x" (f_inf));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: cvttss2si inf\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvttsd2si %1, %0" : "=r" (i32_res) : "x" (1.5));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != PE) {
+ printf("FAIL: cvttsd2si inexact\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvttsd2si %1, %0" : "=r" (i32_res) : "x" (0x1p31));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: cvttsd2si 0x1p31\n");
+ ret = 1;
+ }
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("cvttsd2si %1, %0" : "=r" (i32_res) : "x" (d_inf));
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != IE) {
+ printf("FAIL: cvttsd2si inf\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("rcpss %0, %0" : "=x" (f_res) : "0" (f_snan));
+ f_res += f_one;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: rcpss snan\n");
+ ret = 1;
+ }
+
+ __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
+ __asm__ volatile ("rsqrtss %0, %0" : "=x" (f_res) : "0" (f_snan));
+ f_res += f_one;
+ __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
+ if ((mxcsr & EXC) != 0) {
+ printf("FAIL: rsqrtss snan\n");
+ ret = 1;
+ }
+
+ return ret;
+}
--
2.26.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PULL v2 44/52] accel/kvm: Simplify kvm_check_extension()
2020-07-08 17:25 [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze Paolo Bonzini
2020-07-08 17:25 ` [PULL v2 09/52] target/i386: fix IEEE SSE floating-point exception raising Paolo Bonzini
@ 2020-07-08 17:25 ` Paolo Bonzini
2020-07-08 17:25 ` [PULL v2 52/52] apic: Report current_count via 'info lapic' Paolo Bonzini
2020-07-10 12:14 ` [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze Peter Maydell
3 siblings, 0 replies; 21+ messages in thread
From: Paolo Bonzini @ 2020-07-08 17:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Cornelia Huck, Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <philmd@redhat.com>
In previous commit we let kvm_check_extension() use the
global kvm_state. Since the KVMState* argument is now
unused, drop it.
Convert callers with this Coccinelle script:
@@
expression kvm_state, extension;
@@
- kvm_check_extension(kvm_state, extension)
+ kvm_check_extension(extension)
Unused variables manually removed:
- CPUState* in hyperv_enabled()
- KVMState* in kvm_arm_get_max_vm_ipa_size()
Inspired-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20200623105052.1700-3-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
accel/kvm/kvm-all.c | 64 ++++++++++++++++++------------------
hw/hyperv/hyperv.c | 2 +-
hw/i386/kvm/clock.c | 2 +-
hw/i386/kvm/i8254.c | 4 +--
hw/i386/kvm/ioapic.c | 2 +-
hw/intc/arm_gic_kvm.c | 2 +-
hw/intc/openpic_kvm.c | 2 +-
hw/intc/xics_kvm.c | 2 +-
hw/s390x/s390-stattrib-kvm.c | 2 +-
include/sysemu/kvm.h | 2 +-
target/arm/kvm.c | 18 +++++-----
target/arm/kvm32.c | 2 +-
target/arm/kvm64.c | 15 ++++-----
target/i386/kvm.c | 63 ++++++++++++++++-------------------
target/mips/kvm.c | 4 +--
target/ppc/kvm.c | 34 +++++++++----------
target/s390x/cpu_models.c | 3 +-
target/s390x/kvm.c | 30 ++++++++---------
18 files changed, 122 insertions(+), 131 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 3010820d16..963f450769 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -908,7 +908,7 @@ static MemoryListener kvm_coalesced_pio_listener = {
.coalesced_io_del = kvm_coalesce_pio_del,
};
-int kvm_check_extension(KVMState *s, unsigned int extension)
+int kvm_check_extension(unsigned int extension)
{
int ret;
@@ -927,7 +927,7 @@ int kvm_vm_check_extension(KVMState *s, unsigned int extension)
ret = kvm_vm_ioctl(s, KVM_CHECK_EXTENSION, extension);
if (ret < 0) {
/* VM wide version not implemented, use global one instead */
- ret = kvm_check_extension(s, extension);
+ ret = kvm_check_extension(extension);
}
return ret;
@@ -1090,7 +1090,7 @@ static const KVMCapabilityInfo *
kvm_check_extension_list(KVMState *s, const KVMCapabilityInfo *list)
{
while (list->name) {
- if (!kvm_check_extension(s, list->value)) {
+ if (!kvm_check_extension(list->value)) {
return list;
}
list++;
@@ -1393,7 +1393,7 @@ void kvm_init_irq_routing(KVMState *s)
{
int gsi_count, i;
- gsi_count = kvm_check_extension(s, KVM_CAP_IRQ_ROUTING) - 1;
+ gsi_count = kvm_check_extension(KVM_CAP_IRQ_ROUTING) - 1;
if (gsi_count > 0) {
/* Round up so we can search ints using ffs */
s->used_gsi_bitmap = bitmap_new(gsi_count);
@@ -1797,7 +1797,7 @@ int kvm_irqchip_add_hv_sint_route(KVMState *s, uint32_t vcpu, uint32_t sint)
if (!kvm_gsi_routing_enabled()) {
return -ENOSYS;
}
- if (!kvm_check_extension(s, KVM_CAP_HYPERV_SYNIC)) {
+ if (!kvm_check_extension(KVM_CAP_HYPERV_SYNIC)) {
return -ENOSYS;
}
virq = kvm_irqchip_get_virq(s);
@@ -1906,9 +1906,9 @@ static void kvm_irqchip_create(KVMState *s)
int ret;
assert(s->kernel_irqchip_split != ON_OFF_AUTO_AUTO);
- if (kvm_check_extension(s, KVM_CAP_IRQCHIP)) {
+ if (kvm_check_extension(KVM_CAP_IRQCHIP)) {
;
- } else if (kvm_check_extension(s, KVM_CAP_S390_IRQCHIP)) {
+ } else if (kvm_check_extension(KVM_CAP_S390_IRQCHIP)) {
ret = kvm_vm_enable_cap(s, KVM_CAP_S390_IRQCHIP, 0);
if (ret < 0) {
fprintf(stderr, "Enable kernel irqchip failed: %s\n", strerror(-ret));
@@ -1958,13 +1958,13 @@ static int kvm_recommended_vcpus(KVMState *s)
static int kvm_max_vcpus(KVMState *s)
{
- int ret = kvm_check_extension(s, KVM_CAP_MAX_VCPUS);
+ int ret = kvm_check_extension(KVM_CAP_MAX_VCPUS);
return (ret) ? ret : kvm_recommended_vcpus(s);
}
static int kvm_max_vcpu_id(KVMState *s)
{
- int ret = kvm_check_extension(s, KVM_CAP_MAX_VCPU_ID);
+ int ret = kvm_check_extension(KVM_CAP_MAX_VCPU_ID);
return (ret) ? ret : kvm_max_vcpus(s);
}
@@ -2035,15 +2035,15 @@ static int kvm_init(MachineState *ms)
goto err;
}
- kvm_immediate_exit = kvm_check_extension(s, KVM_CAP_IMMEDIATE_EXIT);
- s->nr_slots = kvm_check_extension(s, KVM_CAP_NR_MEMSLOTS);
+ kvm_immediate_exit = kvm_check_extension(KVM_CAP_IMMEDIATE_EXIT);
+ s->nr_slots = kvm_check_extension(KVM_CAP_NR_MEMSLOTS);
/* If unspecified, use the default value */
if (!s->nr_slots) {
s->nr_slots = 32;
}
- s->nr_as = kvm_check_extension(s, KVM_CAP_MULTI_ADDRESS_SPACE);
+ s->nr_as = kvm_check_extension(KVM_CAP_MULTI_ADDRESS_SPACE);
if (s->nr_as <= 1) {
s->nr_as = 1;
}
@@ -2116,12 +2116,12 @@ static int kvm_init(MachineState *ms)
goto err;
}
- s->coalesced_mmio = kvm_check_extension(s, KVM_CAP_COALESCED_MMIO);
+ s->coalesced_mmio = kvm_check_extension(KVM_CAP_COALESCED_MMIO);
s->coalesced_pio = s->coalesced_mmio &&
- kvm_check_extension(s, KVM_CAP_COALESCED_PIO);
+ kvm_check_extension(KVM_CAP_COALESCED_PIO);
dirty_log_manual_caps =
- kvm_check_extension(s, KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2);
+ kvm_check_extension( KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2);
dirty_log_manual_caps &= (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE |
KVM_DIRTY_LOG_INITIALLY_SET);
s->manual_dirty_log_protect = dirty_log_manual_caps;
@@ -2138,46 +2138,46 @@ static int kvm_init(MachineState *ms)
}
#ifdef KVM_CAP_VCPU_EVENTS
- s->vcpu_events = kvm_check_extension(s, KVM_CAP_VCPU_EVENTS);
+ s->vcpu_events = kvm_check_extension(KVM_CAP_VCPU_EVENTS);
#endif
s->robust_singlestep =
- kvm_check_extension(s, KVM_CAP_X86_ROBUST_SINGLESTEP);
+ kvm_check_extension(KVM_CAP_X86_ROBUST_SINGLESTEP);
#ifdef KVM_CAP_DEBUGREGS
- s->debugregs = kvm_check_extension(s, KVM_CAP_DEBUGREGS);
+ s->debugregs = kvm_check_extension(KVM_CAP_DEBUGREGS);
#endif
- s->max_nested_state_len = kvm_check_extension(s, KVM_CAP_NESTED_STATE);
+ s->max_nested_state_len = kvm_check_extension(KVM_CAP_NESTED_STATE);
#ifdef KVM_CAP_IRQ_ROUTING
- kvm_direct_msi_allowed = (kvm_check_extension(s, KVM_CAP_SIGNAL_MSI) > 0);
+ kvm_direct_msi_allowed = (kvm_check_extension(KVM_CAP_SIGNAL_MSI) > 0);
#endif
- s->intx_set_mask = kvm_check_extension(s, KVM_CAP_PCI_2_3);
+ s->intx_set_mask = kvm_check_extension(KVM_CAP_PCI_2_3);
s->irq_set_ioctl = KVM_IRQ_LINE;
- if (kvm_check_extension(s, KVM_CAP_IRQ_INJECT_STATUS)) {
+ if (kvm_check_extension(KVM_CAP_IRQ_INJECT_STATUS)) {
s->irq_set_ioctl = KVM_IRQ_LINE_STATUS;
}
kvm_readonly_mem_allowed =
- (kvm_check_extension(s, KVM_CAP_READONLY_MEM) > 0);
+ (kvm_check_extension(KVM_CAP_READONLY_MEM) > 0);
kvm_eventfds_allowed =
- (kvm_check_extension(s, KVM_CAP_IOEVENTFD) > 0);
+ (kvm_check_extension(KVM_CAP_IOEVENTFD) > 0);
kvm_irqfds_allowed =
- (kvm_check_extension(s, KVM_CAP_IRQFD) > 0);
+ (kvm_check_extension(KVM_CAP_IRQFD) > 0);
kvm_resamplefds_allowed =
- (kvm_check_extension(s, KVM_CAP_IRQFD_RESAMPLE) > 0);
+ (kvm_check_extension(KVM_CAP_IRQFD_RESAMPLE) > 0);
kvm_vm_attributes_allowed =
- (kvm_check_extension(s, KVM_CAP_VM_ATTRIBUTES) > 0);
+ (kvm_check_extension(KVM_CAP_VM_ATTRIBUTES) > 0);
kvm_ioeventfd_any_length_allowed =
- (kvm_check_extension(s, KVM_CAP_IOEVENTFD_ANY_LENGTH) > 0);
+ (kvm_check_extension(KVM_CAP_IOEVENTFD_ANY_LENGTH) > 0);
kvm_state = s;
@@ -2271,7 +2271,7 @@ static int kvm_handle_internal_error(CPUState *cpu, struct kvm_run *run)
fprintf(stderr, "KVM internal error. Suberror: %d\n",
run->internal.suberror);
- if (kvm_check_extension(kvm_state, KVM_CAP_INTERNAL_ERROR_DATA)) {
+ if (kvm_check_extension(KVM_CAP_INTERNAL_ERROR_DATA)) {
int i;
for (i = 0; i < run->internal.ndata; ++i) {
@@ -2740,7 +2740,7 @@ int kvm_has_many_ioeventfds(void)
int kvm_has_gsi_routing(void)
{
#ifdef KVM_CAP_IRQ_ROUTING
- return kvm_check_extension(kvm_state, KVM_CAP_IRQ_ROUTING);
+ return kvm_check_extension(KVM_CAP_IRQ_ROUTING);
#else
return false;
#endif
@@ -2753,7 +2753,7 @@ int kvm_has_intx_set_mask(void)
bool kvm_arm_supports_user_irq(void)
{
- return kvm_check_extension(kvm_state, KVM_CAP_ARM_USER_IRQ);
+ return kvm_check_extension(KVM_CAP_ARM_USER_IRQ);
}
#ifdef KVM_CAP_SET_GUEST_DEBUG
@@ -3026,7 +3026,7 @@ int kvm_create_device(KVMState *s, uint64_t type, bool test)
create_dev.fd = -1;
create_dev.flags = test ? KVM_CREATE_DEVICE_TEST : 0;
- if (!kvm_check_extension(s, KVM_CAP_DEVICE_CTRL)) {
+ if (!kvm_check_extension(KVM_CAP_DEVICE_CTRL)) {
return -ENOTSUP;
}
diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c
index 844d00776d..92720efc3d 100644
--- a/hw/hyperv/hyperv.c
+++ b/hw/hyperv/hyperv.c
@@ -605,7 +605,7 @@ static bool process_event_flags_userspace;
int hyperv_set_event_flag_handler(uint32_t conn_id, EventNotifier *notifier)
{
if (!process_event_flags_userspace &&
- !kvm_check_extension(kvm_state, KVM_CAP_HYPERV_EVENTFD)) {
+ !kvm_check_extension(KVM_CAP_HYPERV_EVENTFD)) {
process_event_flags_userspace = true;
warn_report("Hyper-V event signaling is not supported by this kernel; "
diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c
index 64283358f9..c0bfc69349 100644
--- a/hw/i386/kvm/clock.c
+++ b/hw/i386/kvm/clock.c
@@ -166,7 +166,7 @@ static void kvmclock_vm_state_change(void *opaque, int running,
{
KVMClockState *s = opaque;
CPUState *cpu;
- int cap_clock_ctrl = kvm_check_extension(kvm_state, KVM_CAP_KVMCLOCK_CTRL);
+ int cap_clock_ctrl = kvm_check_extension(KVM_CAP_KVMCLOCK_CTRL);
int ret;
if (running) {
diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c
index 876f5aa6fa..90532df071 100644
--- a/hw/i386/kvm/i8254.c
+++ b/hw/i386/kvm/i8254.c
@@ -264,7 +264,7 @@ static void kvm_pit_realizefn(DeviceState *dev, Error **errp)
};
int ret;
- if (kvm_check_extension(kvm_state, KVM_CAP_PIT2)) {
+ if (kvm_check_extension(KVM_CAP_PIT2)) {
ret = kvm_vm_ioctl(kvm_state, KVM_CREATE_PIT2, &config);
} else {
ret = kvm_vm_ioctl(kvm_state, KVM_CREATE_PIT);
@@ -278,7 +278,7 @@ static void kvm_pit_realizefn(DeviceState *dev, Error **errp)
case LOST_TICK_POLICY_DELAY:
break; /* enabled by default */
case LOST_TICK_POLICY_DISCARD:
- if (kvm_check_extension(kvm_state, KVM_CAP_REINJECT_CONTROL)) {
+ if (kvm_check_extension(KVM_CAP_REINJECT_CONTROL)) {
struct kvm_reinject_control control = { .pit_reinject = 0 };
ret = kvm_vm_ioctl(kvm_state, KVM_REINJECT_CONTROL, &control);
diff --git a/hw/i386/kvm/ioapic.c b/hw/i386/kvm/ioapic.c
index 4ba8e47251..718ed8ec6f 100644
--- a/hw/i386/kvm/ioapic.c
+++ b/hw/i386/kvm/ioapic.c
@@ -25,7 +25,7 @@ void kvm_pc_setup_irq_routing(bool pci_enabled)
KVMState *s = kvm_state;
int i;
- if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
+ if (kvm_check_extension(KVM_CAP_IRQ_ROUTING)) {
for (i = 0; i < 8; ++i) {
if (i == 2) {
continue;
diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c
index d7df423a7a..b98437b265 100644
--- a/hw/intc/arm_gic_kvm.c
+++ b/hw/intc/arm_gic_kvm.c
@@ -551,7 +551,7 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp)
KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true,
&error_abort);
}
- } else if (kvm_check_extension(kvm_state, KVM_CAP_DEVICE_CTRL)) {
+ } else if (kvm_check_extension(KVM_CAP_DEVICE_CTRL)) {
error_setg_errno(errp, -ret, "error creating in-kernel VGIC");
error_append_hint(errp,
"Perhaps the host CPU does not support GICv2?\n");
diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c
index e4bf47d885..b02e914f5f 100644
--- a/hw/intc/openpic_kvm.c
+++ b/hw/intc/openpic_kvm.c
@@ -203,7 +203,7 @@ static void kvm_openpic_realize(DeviceState *dev, Error **errp)
struct kvm_create_device cd = {0};
int ret, i;
- if (!kvm_check_extension(s, KVM_CAP_DEVICE_CTRL)) {
+ if (!kvm_check_extension(KVM_CAP_DEVICE_CTRL)) {
error_setg(errp, "Kernel is lacking Device Control API");
return;
}
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index 8d6156578f..054648d16b 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -365,7 +365,7 @@ int xics_kvm_connect(SpaprInterruptController *intc, uint32_t nr_servers,
return 0;
}
- if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
+ if (!kvm_enabled() || !kvm_check_extension(KVM_CAP_IRQ_XICS)) {
error_setg(errp,
"KVM and IRQ_XICS capability must be present for in-kernel XICS");
return -1;
diff --git a/hw/s390x/s390-stattrib-kvm.c b/hw/s390x/s390-stattrib-kvm.c
index f89d8d9d16..77f536f15a 100644
--- a/hw/s390x/s390-stattrib-kvm.c
+++ b/hw/s390x/s390-stattrib-kvm.c
@@ -22,7 +22,7 @@
Object *kvm_s390_stattrib_create(void)
{
if (kvm_enabled() &&
- kvm_check_extension(kvm_state, KVM_CAP_S390_CMMA_MIGRATION)) {
+ kvm_check_extension(KVM_CAP_S390_CMMA_MIGRATION)) {
return object_new(TYPE_KVM_S390_STATTRIB);
}
return NULL;
diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index b4174d941c..3662641c99 100644
--- a/include/sysemu/kvm.h
+++ b/include/sysemu/kvm.h
@@ -436,7 +436,7 @@ void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg);
bool kvm_arch_stop_on_emulation_error(CPUState *cpu);
-int kvm_check_extension(KVMState *s, unsigned int extension);
+int kvm_check_extension(unsigned int extension);
int kvm_vm_check_extension(KVMState *s, unsigned int extension);
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 8bb7318378..87efb40f51 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -61,7 +61,7 @@ int kvm_arm_vcpu_finalize(CPUState *cs, int feature)
void kvm_arm_init_serror_injection(CPUState *cs)
{
- cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state,
+ cap_has_inject_serror_esr = kvm_check_extension(
KVM_CAP_ARM_INJECT_SERROR_ESR);
}
@@ -211,15 +211,14 @@ void kvm_arm_add_vcpu_properties(Object *obj)
bool kvm_arm_pmu_supported(void)
{
- return kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3);
+ return kvm_check_extension(KVM_CAP_ARM_PMU_V3);
}
int kvm_arm_get_max_vm_ipa_size(MachineState *ms)
{
- KVMState *s = KVM_STATE(ms->accelerator);
int ret;
- ret = kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE);
+ ret = kvm_check_extension(KVM_CAP_ARM_VM_IPA_SIZE);
return ret > 0 ? ret : 40;
}
@@ -237,22 +236,21 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
*/
kvm_halt_in_kernel_allowed = true;
- cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
+ cap_has_mp_state = kvm_check_extension(KVM_CAP_MP_STATE);
if (ms->smp.cpus > 256 &&
- !kvm_check_extension(s, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2)) {
+ !kvm_check_extension(KVM_CAP_ARM_IRQ_LINE_LAYOUT_2)) {
error_report("Using more than 256 vcpus requires a host kernel "
"with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
ret = -EINVAL;
}
- if (kvm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) {
+ if (kvm_check_extension(KVM_CAP_ARM_NISV_TO_USER)) {
if (kvm_vm_enable_cap(s, KVM_CAP_ARM_NISV_TO_USER, 0)) {
error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap");
} else {
/* Set status for supporting the external dabt injection */
- cap_has_inject_ext_dabt = kvm_check_extension(s,
- KVM_CAP_ARM_INJECT_EXT_DABT);
+ cap_has_inject_ext_dabt = kvm_check_extension(KVM_CAP_ARM_INJECT_EXT_DABT);
}
}
@@ -950,7 +948,7 @@ int kvm_arch_irqchip_create(KVMState *s)
/* If we can create the VGIC using the newer device control API, we
* let the device do this when it initializes itself, otherwise we
* fall back to the old API */
- return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
+ return kvm_check_extension(KVM_CAP_DEVICE_CTRL);
}
int kvm_arm_vgic_probe(void)
diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c
index 0af46b41c8..598967986f 100644
--- a/target/arm/kvm32.c
+++ b/target/arm/kvm32.c
@@ -221,7 +221,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
if (cpu->start_powered_off) {
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF;
}
- if (kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PSCI_0_2)) {
+ if (kvm_check_extension(KVM_CAP_ARM_PSCI_0_2)) {
cpu->psci_version = 2;
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2;
}
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 1169237905..aeadee99dc 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -84,14 +84,13 @@ GArray *hw_breakpoints, *hw_watchpoints;
*/
static void kvm_arm_init_debug(CPUState *cs)
{
- have_guest_debug = kvm_check_extension(cs->kvm_state,
- KVM_CAP_SET_GUEST_DEBUG);
+ have_guest_debug = kvm_check_extension(KVM_CAP_SET_GUEST_DEBUG);
- max_hw_wps = kvm_check_extension(cs->kvm_state, KVM_CAP_GUEST_DEBUG_HW_WPS);
+ max_hw_wps = kvm_check_extension(KVM_CAP_GUEST_DEBUG_HW_WPS);
hw_watchpoints = g_array_sized_new(true, true,
sizeof(HWWatchpoint), max_hw_wps);
- max_hw_bps = kvm_check_extension(cs->kvm_state, KVM_CAP_GUEST_DEBUG_HW_BPS);
+ max_hw_bps = kvm_check_extension(KVM_CAP_GUEST_DEBUG_HW_BPS);
hw_breakpoints = g_array_sized_new(true, true,
sizeof(HWBreakpoint), max_hw_bps);
return;
@@ -654,12 +653,12 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
bool kvm_arm_aarch32_supported(void)
{
- return kvm_check_extension(kvm_state, KVM_CAP_ARM_EL1_32BIT);
+ return kvm_check_extension(KVM_CAP_ARM_EL1_32BIT);
}
bool kvm_arm_sve_supported(void)
{
- return kvm_check_extension(kvm_state, KVM_CAP_ARM_SVE);
+ return kvm_check_extension(KVM_CAP_ARM_SVE);
}
QEMU_BUILD_BUG_ON(KVM_ARM64_SVE_VQ_MIN != 1);
@@ -778,14 +777,14 @@ int kvm_arch_init_vcpu(CPUState *cs)
if (cpu->start_powered_off) {
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF;
}
- if (kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PSCI_0_2)) {
+ if (kvm_check_extension(KVM_CAP_ARM_PSCI_0_2)) {
cpu->psci_version = 2;
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2;
}
if (!arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_EL1_32BIT;
}
- if (!kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PMU_V3)) {
+ if (!kvm_check_extension(KVM_CAP_ARM_PMU_V3)) {
cpu->has_pmu = false;
}
if (cpu->has_pmu) {
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index b8455c89ed..466c4c2b14 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -133,12 +133,12 @@ int kvm_has_pit_state2(void)
bool kvm_has_smm(void)
{
- return kvm_check_extension(kvm_state, KVM_CAP_X86_SMM);
+ return kvm_check_extension(KVM_CAP_X86_SMM);
}
bool kvm_has_adjust_clock_stable(void)
{
- int ret = kvm_check_extension(kvm_state, KVM_CAP_ADJUST_CLOCK);
+ int ret = kvm_check_extension(KVM_CAP_ADJUST_CLOCK);
return (ret == KVM_CLOCK_TSC_STABLE);
}
@@ -294,7 +294,7 @@ static int get_para_features(KVMState *s)
int i, features = 0;
for (i = 0; i < ARRAY_SIZE(para_features); i++) {
- if (kvm_check_extension(s, para_features[i].cap)) {
+ if (kvm_check_extension(para_features[i].cap)) {
features |= (1 << para_features[i].feature);
}
}
@@ -386,7 +386,7 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
* and the irqchip is in the kernel.
*/
if (kvm_irqchip_in_kernel() &&
- kvm_check_extension(s, KVM_CAP_TSC_DEADLINE_TIMER)) {
+ kvm_check_extension(KVM_CAP_TSC_DEADLINE_TIMER)) {
ret |= CPUID_EXT_TSC_DEADLINE_TIMER;
}
@@ -398,8 +398,7 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
}
if (enable_cpu_pm) {
- int disable_exits = kvm_check_extension(s,
- KVM_CAP_X86_DISABLE_EXITS);
+ int disable_exits = kvm_check_extension(KVM_CAP_X86_DISABLE_EXITS);
if (disable_exits & KVM_X86_DISABLE_EXITS_MWAIT) {
ret |= CPUID_EXT_MONITOR;
@@ -536,7 +535,7 @@ static int kvm_get_mce_cap_supported(KVMState *s, uint64_t *mce_cap,
{
int r;
- r = kvm_check_extension(s, KVM_CAP_MCE);
+ r = kvm_check_extension(KVM_CAP_MCE);
if (r > 0) {
*max_banks = r;
return kvm_ioctl(s, KVM_X86_GET_MCE_CAP_SUPPORTED, mce_cap);
@@ -728,8 +727,7 @@ unsigned long kvm_arch_vcpu_id(CPUState *cs)
static bool hyperv_enabled(X86CPU *cpu)
{
- CPUState *cs = CPU(cpu);
- return kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV) > 0 &&
+ return kvm_check_extension(KVM_CAP_HYPERV) > 0 &&
((cpu->hyperv_spinlock_attempts != HYPERV_SPINLOCK_NEVER_RETRY) ||
cpu->hyperv_features || cpu->hyperv_passthrough);
}
@@ -761,13 +759,13 @@ static int kvm_arch_set_tsc_khz(CPUState *cs)
return 0;
}
- cur_freq = kvm_check_extension(cs->kvm_state, KVM_CAP_GET_TSC_KHZ) ?
+ cur_freq = kvm_check_extension(KVM_CAP_GET_TSC_KHZ) ?
kvm_vcpu_ioctl(cs, KVM_GET_TSC_KHZ) : -ENOTSUP;
/*
* If TSC scaling is supported, attempt to set TSC frequency.
*/
- if (kvm_check_extension(cs->kvm_state, KVM_CAP_TSC_CONTROL)) {
+ if (kvm_check_extension(KVM_CAP_TSC_CONTROL)) {
set_ioctl = true;
}
@@ -787,7 +785,7 @@ static int kvm_arch_set_tsc_khz(CPUState *cs)
/* When KVM_SET_TSC_KHZ fails, it's an error only if the current
* TSC frequency doesn't match the one we want.
*/
- cur_freq = kvm_check_extension(cs->kvm_state, KVM_CAP_GET_TSC_KHZ) ?
+ cur_freq = kvm_check_extension(KVM_CAP_GET_TSC_KHZ) ?
kvm_vcpu_ioctl(cs, KVM_GET_TSC_KHZ) :
-ENOTSUP;
if (cur_freq <= 0 || cur_freq != env->tsc_khz) {
@@ -1008,7 +1006,7 @@ static struct kvm_cpuid2 *get_supported_hv_cpuid_legacy(CPUState *cs)
entry_recomm->function = HV_CPUID_ENLIGHTMENT_INFO;
entry_recomm->ebx = cpu->hyperv_spinlock_attempts;
- if (kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV) > 0) {
+ if (kvm_check_extension(KVM_CAP_HYPERV) > 0) {
entry_feat->eax |= HV_HYPERCALL_AVAILABLE;
entry_feat->eax |= HV_APIC_ACCESS_AVAILABLE;
entry_feat->edx |= HV_CPU_DYNAMIC_PARTITIONING_AVAILABLE;
@@ -1016,7 +1014,7 @@ static struct kvm_cpuid2 *get_supported_hv_cpuid_legacy(CPUState *cs)
entry_recomm->eax |= HV_APIC_ACCESS_RECOMMENDED;
}
- if (kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_TIME) > 0) {
+ if (kvm_check_extension(KVM_CAP_HYPERV_TIME) > 0) {
entry_feat->eax |= HV_TIME_REF_COUNT_AVAILABLE;
entry_feat->eax |= HV_REFERENCE_TSC_AVAILABLE;
}
@@ -1050,7 +1048,7 @@ static struct kvm_cpuid2 *get_supported_hv_cpuid_legacy(CPUState *cs)
unsigned int cap = cpu->hyperv_synic_kvm_only ?
KVM_CAP_HYPERV_SYNIC : KVM_CAP_HYPERV_SYNIC2;
- if (kvm_check_extension(cs->kvm_state, cap) > 0) {
+ if (kvm_check_extension(cap) > 0) {
entry_feat->eax |= HV_SYNIC_AVAILABLE;
}
}
@@ -1059,19 +1057,16 @@ static struct kvm_cpuid2 *get_supported_hv_cpuid_legacy(CPUState *cs)
entry_feat->eax |= HV_SYNTIMERS_AVAILABLE;
}
- if (kvm_check_extension(cs->kvm_state,
- KVM_CAP_HYPERV_TLBFLUSH) > 0) {
+ if (kvm_check_extension(KVM_CAP_HYPERV_TLBFLUSH) > 0) {
entry_recomm->eax |= HV_REMOTE_TLB_FLUSH_RECOMMENDED;
entry_recomm->eax |= HV_EX_PROCESSOR_MASKS_RECOMMENDED;
}
- if (kvm_check_extension(cs->kvm_state,
- KVM_CAP_HYPERV_ENLIGHTENED_VMCS) > 0) {
+ if (kvm_check_extension(KVM_CAP_HYPERV_ENLIGHTENED_VMCS) > 0) {
entry_recomm->eax |= HV_ENLIGHTENED_VMCS_RECOMMENDED;
}
- if (kvm_check_extension(cs->kvm_state,
- KVM_CAP_HYPERV_SEND_IPI) > 0) {
+ if (kvm_check_extension(KVM_CAP_HYPERV_SEND_IPI) > 0) {
entry_recomm->eax |= HV_CLUSTER_IPI_RECOMMENDED;
entry_recomm->eax |= HV_EX_PROCESSOR_MASKS_RECOMMENDED;
}
@@ -1215,7 +1210,7 @@ static int hyperv_handle_properties(CPUState *cs,
}
}
- if (kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_CPUID) > 0) {
+ if (kvm_check_extension(KVM_CAP_HYPERV_CPUID) > 0) {
cpuid = get_supported_hv_cpuid(cs);
} else {
cpuid = get_supported_hv_cpuid_legacy(cs);
@@ -1496,7 +1491,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
* so that vcpu's TSC frequency can be migrated later via this field.
*/
if (!env->tsc_khz) {
- r = kvm_check_extension(cs->kvm_state, KVM_CAP_GET_TSC_KHZ) ?
+ r = kvm_check_extension(KVM_CAP_GET_TSC_KHZ) ?
kvm_vcpu_ioctl(cs, KVM_GET_TSC_KHZ) :
-ENOTSUP;
if (r > 0) {
@@ -1737,7 +1732,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
if (((env->cpuid_version >> 8)&0xF) >= 6
&& (env->features[FEAT_1_EDX] & (CPUID_MCE | CPUID_MCA)) ==
(CPUID_MCE | CPUID_MCA)
- && kvm_check_extension(cs->kvm_state, KVM_CAP_MCE) > 0) {
+ && kvm_check_extension(KVM_CAP_MCE) > 0) {
uint64_t mcg_cap, unsupported_caps;
int banks;
int ret;
@@ -1932,7 +1927,7 @@ static int kvm_get_supported_feature_msrs(KVMState *s)
return 0;
}
- if (!kvm_check_extension(s, KVM_CAP_GET_MSR_FEATURES)) {
+ if (!kvm_check_extension(KVM_CAP_GET_MSR_FEATURES)) {
return 0;
}
@@ -2128,13 +2123,13 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
int ret;
struct utsname utsname;
- has_xsave = kvm_check_extension(s, KVM_CAP_XSAVE);
- has_xcrs = kvm_check_extension(s, KVM_CAP_XCRS);
- has_pit_state2 = kvm_check_extension(s, KVM_CAP_PIT_STATE2);
+ has_xsave = kvm_check_extension(KVM_CAP_XSAVE);
+ has_xcrs = kvm_check_extension(KVM_CAP_XCRS);
+ has_pit_state2 = kvm_check_extension(KVM_CAP_PIT_STATE2);
- hv_vpindex_settable = kvm_check_extension(s, KVM_CAP_HYPERV_VP_INDEX);
+ hv_vpindex_settable = kvm_check_extension(KVM_CAP_HYPERV_VP_INDEX);
- has_exception_payload = kvm_check_extension(s, KVM_CAP_EXCEPTION_PAYLOAD);
+ has_exception_payload = kvm_check_extension(KVM_CAP_EXCEPTION_PAYLOAD);
if (has_exception_payload) {
ret = kvm_vm_enable_cap(s, KVM_CAP_EXCEPTION_PAYLOAD, 0, true);
if (ret < 0) {
@@ -2165,7 +2160,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
* that case we need to stick with the default, i.e. a 256K maximum BIOS
* size.
*/
- if (kvm_check_extension(s, KVM_CAP_SET_IDENTITY_MAP_ADDR)) {
+ if (kvm_check_extension(KVM_CAP_SET_IDENTITY_MAP_ADDR)) {
/* Allows up to 16M BIOSes. */
identity_base = 0xfeffc000;
@@ -2197,7 +2192,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
}
}
- if (kvm_check_extension(s, KVM_CAP_X86_SMM) &&
+ if (kvm_check_extension(KVM_CAP_X86_SMM) &&
object_dynamic_cast(OBJECT(ms), TYPE_X86_MACHINE) &&
x86_machine_is_smm_enabled(X86_MACHINE(ms))) {
smram_machine_done.notify = register_smram_listener;
@@ -2205,7 +2200,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
}
if (enable_cpu_pm) {
- int disable_exits = kvm_check_extension(s, KVM_CAP_X86_DISABLE_EXITS);
+ int disable_exits = kvm_check_extension(KVM_CAP_X86_DISABLE_EXITS);
int ret;
/* Work around for kernel header with a typo. TODO: fix header and drop. */
@@ -4546,7 +4541,7 @@ bool kvm_arch_stop_on_emulation_error(CPUState *cs)
void kvm_arch_init_irq_routing(KVMState *s)
{
- if (!kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
+ if (!kvm_check_extension(KVM_CAP_IRQ_ROUTING)) {
/* If kernel can't do irq routing, interrupt source
* override 0->2 cannot be set up as required by HPET.
* So we have to disable it.
diff --git a/target/mips/kvm.c b/target/mips/kvm.c
index 72637a1e02..aca12bfdea 100644
--- a/target/mips/kvm.c
+++ b/target/mips/kvm.c
@@ -52,8 +52,8 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
/* MIPS has 128 signals */
kvm_set_sigmask_len(s, 16);
- kvm_mips_fpu_cap = kvm_check_extension(s, KVM_CAP_MIPS_FPU);
- kvm_mips_msa_cap = kvm_check_extension(s, KVM_CAP_MIPS_MSA);
+ kvm_mips_fpu_cap = kvm_check_extension(KVM_CAP_MIPS_FPU);
+ kvm_mips_msa_cap = kvm_check_extension(KVM_CAP_MIPS_MSA);
DPRINTF("%s\n", __func__);
return 0;
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 2692f76130..ace44d9fc7 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -110,24 +110,24 @@ static int kvmppc_get_dec_bits(void);
int kvm_arch_init(MachineState *ms, KVMState *s)
{
- cap_interrupt_unset = kvm_check_extension(s, KVM_CAP_PPC_UNSET_IRQ);
- cap_segstate = kvm_check_extension(s, KVM_CAP_PPC_SEGSTATE);
- cap_booke_sregs = kvm_check_extension(s, KVM_CAP_PPC_BOOKE_SREGS);
+ cap_interrupt_unset = kvm_check_extension(KVM_CAP_PPC_UNSET_IRQ);
+ cap_segstate = kvm_check_extension(KVM_CAP_PPC_SEGSTATE);
+ cap_booke_sregs = kvm_check_extension(KVM_CAP_PPC_BOOKE_SREGS);
cap_ppc_smt_possible = kvm_vm_check_extension(s, KVM_CAP_PPC_SMT_POSSIBLE);
- cap_spapr_tce = kvm_check_extension(s, KVM_CAP_SPAPR_TCE);
- cap_spapr_tce_64 = kvm_check_extension(s, KVM_CAP_SPAPR_TCE_64);
- cap_spapr_multitce = kvm_check_extension(s, KVM_CAP_SPAPR_MULTITCE);
+ cap_spapr_tce = kvm_check_extension(KVM_CAP_SPAPR_TCE);
+ cap_spapr_tce_64 = kvm_check_extension(KVM_CAP_SPAPR_TCE_64);
+ cap_spapr_multitce = kvm_check_extension(KVM_CAP_SPAPR_MULTITCE);
cap_spapr_vfio = kvm_vm_check_extension(s, KVM_CAP_SPAPR_TCE_VFIO);
- cap_one_reg = kvm_check_extension(s, KVM_CAP_ONE_REG);
- cap_hior = kvm_check_extension(s, KVM_CAP_PPC_HIOR);
- cap_epr = kvm_check_extension(s, KVM_CAP_PPC_EPR);
- cap_ppc_watchdog = kvm_check_extension(s, KVM_CAP_PPC_BOOKE_WATCHDOG);
+ cap_one_reg = kvm_check_extension(KVM_CAP_ONE_REG);
+ cap_hior = kvm_check_extension(KVM_CAP_PPC_HIOR);
+ cap_epr = kvm_check_extension(KVM_CAP_PPC_EPR);
+ cap_ppc_watchdog = kvm_check_extension(KVM_CAP_PPC_BOOKE_WATCHDOG);
/*
* Note: we don't set cap_papr here, because this capability is
* only activated after this by kvmppc_set_papr()
*/
cap_htab_fd = kvm_vm_check_extension(s, KVM_CAP_PPC_HTAB_FD);
- cap_fixup_hcalls = kvm_check_extension(s, KVM_CAP_PPC_FIXUP_HCALL);
+ cap_fixup_hcalls = kvm_check_extension(KVM_CAP_PPC_FIXUP_HCALL);
cap_ppc_smt = kvm_vm_check_extension(s, KVM_CAP_PPC_SMT);
cap_htm = kvm_vm_check_extension(s, KVM_CAP_PPC_HTM);
cap_mmu_radix = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX);
@@ -147,7 +147,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
*/
cap_ppc_pvr_compat = false;
- if (!kvm_check_extension(s, KVM_CAP_PPC_IRQ_LEVEL)) {
+ if (!kvm_check_extension(KVM_CAP_PPC_IRQ_LEVEL)) {
error_report("KVM: Host kernel doesn't have level irq capability");
exit(1);
}
@@ -205,7 +205,7 @@ static int kvm_booke206_tlb_init(PowerPCCPU *cpu)
int ret, i;
if (!kvm_enabled() ||
- !kvm_check_extension(cs->kvm_state, KVM_CAP_SW_TLB)) {
+ !kvm_check_extension(KVM_CAP_SW_TLB)) {
return 0;
}
@@ -246,7 +246,7 @@ static void kvm_get_smmu_info(struct kvm_ppc_smmu_info *info, Error **errp)
assert(kvm_state != NULL);
- if (!kvm_check_extension(kvm_state, KVM_CAP_PPC_GET_SMMU_INFO)) {
+ if (!kvm_check_extension(KVM_CAP_PPC_GET_SMMU_INFO)) {
error_setg(errp, "KVM doesn't expose the MMU features it supports");
error_append_hint(errp, "Consider switching to a newer KVM\n");
return;
@@ -268,7 +268,7 @@ struct ppc_radix_page_info *kvm_get_radix_page_info(void)
struct kvm_ppc_rmmu_info rmmu_info;
int i;
- if (!kvm_check_extension(s, KVM_CAP_PPC_MMU_RADIX)) {
+ if (!kvm_check_extension(KVM_CAP_PPC_MMU_RADIX)) {
return NULL;
}
if (kvm_vm_ioctl(s, KVM_PPC_GET_RMMU_INFO, &rmmu_info)) {
@@ -2611,7 +2611,7 @@ int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function)
.token = token,
};
- if (!kvm_check_extension(kvm_state, KVM_CAP_PPC_RTAS)) {
+ if (!kvm_check_extension(KVM_CAP_PPC_RTAS)) {
return -ENOENT;
}
@@ -2828,7 +2828,7 @@ int kvm_handle_nmi(PowerPCCPU *cpu, struct kvm_run *run)
int kvmppc_enable_hwrng(void)
{
- if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_PPC_HWRNG)) {
+ if (!kvm_enabled() || !kvm_check_extension(KVM_CAP_PPC_HWRNG)) {
return -1;
}
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index 2fa609bffe..4b6185bb44 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -222,8 +222,7 @@ bool s390_has_feat(S390Feat feat)
#ifdef CONFIG_KVM
if (kvm_enabled()) {
if (feat == S390_FEAT_VECTOR) {
- return kvm_check_extension(kvm_state,
- KVM_CAP_S390_VECTOR_REGISTERS);
+ return kvm_check_extension(KVM_CAP_S390_VECTOR_REGISTERS);
}
if (feat == S390_FEAT_RUNTIME_INSTRUMENTATION) {
return kvm_s390_get_ri();
diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c
index f2f75d2a57..710f353fb0 100644
--- a/target/s390x/kvm.c
+++ b/target/s390x/kvm.c
@@ -342,21 +342,21 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
object_class_foreach(ccw_machine_class_foreach, TYPE_S390_CCW_MACHINE,
false, NULL);
- if (!kvm_check_extension(kvm_state, KVM_CAP_DEVICE_CTRL)) {
+ if (!kvm_check_extension(KVM_CAP_DEVICE_CTRL)) {
error_report("KVM is missing capability KVM_CAP_DEVICE_CTRL - "
"please use kernel 3.15 or newer");
return -1;
}
- cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS);
- cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF);
- cap_mem_op = kvm_check_extension(s, KVM_CAP_S390_MEM_OP);
- cap_s390_irq = kvm_check_extension(s, KVM_CAP_S390_INJECT_IRQ);
- cap_vcpu_resets = kvm_check_extension(s, KVM_CAP_S390_VCPU_RESETS);
- cap_protected = kvm_check_extension(s, KVM_CAP_S390_PROTECTED);
+ cap_sync_regs = kvm_check_extension(KVM_CAP_SYNC_REGS);
+ cap_async_pf = kvm_check_extension(KVM_CAP_ASYNC_PF);
+ cap_mem_op = kvm_check_extension(KVM_CAP_S390_MEM_OP);
+ cap_s390_irq = kvm_check_extension(KVM_CAP_S390_INJECT_IRQ);
+ cap_vcpu_resets = kvm_check_extension(KVM_CAP_S390_VCPU_RESETS);
+ cap_protected = kvm_check_extension(KVM_CAP_S390_PROTECTED);
- if (!kvm_check_extension(s, KVM_CAP_S390_GMAP)
- || !kvm_check_extension(s, KVM_CAP_S390_COW)) {
+ if (!kvm_check_extension(KVM_CAP_S390_GMAP)
+ || !kvm_check_extension(KVM_CAP_S390_COW)) {
phys_mem_set_alloc(legacy_s390_alloc);
}
@@ -381,7 +381,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
* newer machine types if KVM_CAP_S390_AIS_MIGRATION is available.
*/
if (cpu_model_allowed() && kvm_kernel_irqchip_allowed() &&
- kvm_check_extension(s, KVM_CAP_S390_AIS_MIGRATION)) {
+ kvm_check_extension(KVM_CAP_S390_AIS_MIGRATION)) {
kvm_vm_enable_cap(s, KVM_CAP_S390_AIS, 0);
}
@@ -1996,7 +1996,7 @@ void kvm_arch_init_irq_routing(KVMState *s)
* are handled in-kernel, it is not true for s390 (yet); therefore, we
* have to override the common code kvm_halt_in_kernel_allowed setting.
*/
- if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
+ if (kvm_check_extension(KVM_CAP_IRQ_ROUTING)) {
kvm_gsi_routing_allowed = true;
kvm_halt_in_kernel_allowed = false;
}
@@ -2015,7 +2015,7 @@ int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch,
};
trace_kvm_assign_subch_ioeventfd(kick.fd, kick.addr, assign,
kick.datamatch);
- if (!kvm_check_extension(kvm_state, KVM_CAP_IOEVENTFD)) {
+ if (!kvm_check_extension(KVM_CAP_IOEVENTFD)) {
return -ENOSYS;
}
if (!assign) {
@@ -2082,7 +2082,7 @@ void kvm_s390_vcpu_interrupt_pre_save(S390CPU *cpu)
CPUState *cs = CPU(cpu);
int32_t bytes;
- if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) {
+ if (!kvm_check_extension(KVM_CAP_S390_IRQ_STATE)) {
return;
}
@@ -2109,7 +2109,7 @@ int kvm_s390_vcpu_interrupt_post_load(S390CPU *cpu)
return 0;
}
- if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) {
+ if (!kvm_check_extension(KVM_CAP_S390_IRQ_STATE)) {
return -ENOSYS;
}
@@ -2421,7 +2421,7 @@ void kvm_s390_get_host_cpu_model(S390CPUModel *model, Error **errp)
}
/* bpb needs kernel support for migration, VSIE and reset */
- if (!kvm_check_extension(kvm_state, KVM_CAP_S390_BPB)) {
+ if (!kvm_check_extension(KVM_CAP_S390_BPB)) {
clear_bit(S390_FEAT_BPB, model->features);
}
--
2.26.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PULL v2 52/52] apic: Report current_count via 'info lapic'
2020-07-08 17:25 [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze Paolo Bonzini
2020-07-08 17:25 ` [PULL v2 09/52] target/i386: fix IEEE SSE floating-point exception raising Paolo Bonzini
2020-07-08 17:25 ` [PULL v2 44/52] accel/kvm: Simplify kvm_check_extension() Paolo Bonzini
@ 2020-07-08 17:25 ` Paolo Bonzini
2020-07-10 12:14 ` [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze Peter Maydell
3 siblings, 0 replies; 21+ messages in thread
From: Paolo Bonzini @ 2020-07-08 17:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Jan Kiszka, Philippe Mathieu-Daudé
From: Jan Kiszka <jan.kiszka@siemens.com>
This is helpful when debugging stuck guest timers.
As we need apic_get_current_count for that, and it is really not
emulation specific, move it to apic_common.c and export it. Fix its
style at this chance as well.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <e00e2896-ca5b-a929-de7a-8e5762f0c1c2@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/intc/apic.c | 18 ------------------
hw/intc/apic_common.c | 19 +++++++++++++++++++
include/hw/i386/apic_internal.h | 1 +
target/i386/helper.c | 5 +++--
4 files changed, 23 insertions(+), 20 deletions(-)
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 6b46839ef4..38aabd60cd 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -615,24 +615,6 @@ int apic_accept_pic_intr(DeviceState *dev)
return 0;
}
-static uint32_t apic_get_current_count(APICCommonState *s)
-{
- int64_t d;
- uint32_t val;
- d = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - s->initial_count_load_time) >>
- s->count_shift;
- if (s->lvt[APIC_LVT_TIMER] & APIC_LVT_TIMER_PERIODIC) {
- /* periodic */
- val = s->initial_count - (d % ((uint64_t)s->initial_count + 1));
- } else {
- if (d >= s->initial_count)
- val = 0;
- else
- val = s->initial_count - d;
- }
- return val;
-}
-
static void apic_timer_update(APICCommonState *s, int64_t current_time)
{
if (apic_next_timer(s, current_time)) {
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 7da2862b3d..bd4a95c7ca 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -189,6 +189,25 @@ bool apic_next_timer(APICCommonState *s, int64_t current_time)
return true;
}
+uint32_t apic_get_current_count(APICCommonState *s)
+{
+ int64_t d;
+ uint32_t val;
+ d = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - s->initial_count_load_time) >>
+ s->count_shift;
+ if (s->lvt[APIC_LVT_TIMER] & APIC_LVT_TIMER_PERIODIC) {
+ /* periodic */
+ val = s->initial_count - (d % ((uint64_t)s->initial_count + 1));
+ } else {
+ if (d >= s->initial_count) {
+ val = 0;
+ } else {
+ val = s->initial_count - d;
+ }
+ }
+ return val;
+}
+
void apic_init_reset(DeviceState *dev)
{
APICCommonState *s;
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index b04bdd947f..2597000e03 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -211,6 +211,7 @@ void vapic_report_tpr_access(DeviceState *dev, CPUState *cpu, target_ulong ip,
TPRAccess access);
int apic_get_ppr(APICCommonState *s);
+uint32_t apic_get_current_count(APICCommonState *s);
static inline void apic_set_bit(uint32_t *tab, int index)
{
diff --git a/target/i386/helper.c b/target/i386/helper.c
index fa2a1dcdda..70be53e2c3 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -370,10 +370,11 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, int flags)
dump_apic_lvt("LVTTHMR", lvt[APIC_LVT_THERMAL], false);
dump_apic_lvt("LVTT", lvt[APIC_LVT_TIMER], true);
- qemu_printf("Timer\t DCR=0x%x (divide by %u) initial_count = %u\n",
+ qemu_printf("Timer\t DCR=0x%x (divide by %u) initial_count = %u"
+ " current_count = %u\n",
s->divide_conf & APIC_DCR_MASK,
divider_conf(s->divide_conf),
- s->initial_count);
+ s->initial_count, apic_get_current_count(s));
qemu_printf("SPIV\t 0x%08x APIC %s, focus=%s, spurious vec %u\n",
s->spurious_vec,
--
2.26.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-08 17:25 [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze Paolo Bonzini
` (2 preceding siblings ...)
2020-07-08 17:25 ` [PULL v2 52/52] apic: Report current_count via 'info lapic' Paolo Bonzini
@ 2020-07-10 12:14 ` Peter Maydell
2020-07-10 12:28 ` Peter Maydell
2020-07-10 12:38 ` Claudio Fontana
3 siblings, 2 replies; 21+ messages in thread
From: Peter Maydell @ 2020-07-10 12:14 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: QEMU Developers
On Wed, 8 Jul 2020 at 22:32, Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> The following changes since commit eb2c66b10efd2b914b56b20ae90655914310c925:
>
> Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2020-07-06' into staging (2020-07-07 19:47:26 +0100)
>
> are available in the Git repository at:
>
> git://github.com/bonzini/qemu.git tags/for-upstream
>
> for you to fetch changes up to 392f34e59755f99d69586a63e0f5d80a7ef67f94:
>
> apic: Report current_count via 'info lapic' (2020-07-08 10:01:08 -0400)
Hi; this still has the OSX failure, I'm afraid:
/Users/pm215/src/qemu-for-merges/ui/cocoa.m:1478:9: error: implicit
declaration of function 'cpu_throttle_set' is invalid in C99 [-
Werror,-Wimplicit-function-declaration]
cpu_throttle_set(throttle_pct);
^
/Users/pm215/src/qemu-for-merges/ui/cocoa.m:1478:9: error: this
function declaration is not a prototype [-Werror,-Wstrict-prototypes]
(other builds haven't reported back yet)
thanks
-- PMM
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 12:14 ` [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze Peter Maydell
@ 2020-07-10 12:28 ` Peter Maydell
2020-07-10 12:55 ` Claudio Fontana
2020-07-10 12:38 ` Claudio Fontana
1 sibling, 1 reply; 21+ messages in thread
From: Peter Maydell @ 2020-07-10 12:28 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: QEMU Developers
On Fri, 10 Jul 2020 at 13:14, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> On Wed, 8 Jul 2020 at 22:32, Paolo Bonzini <pbonzini@redhat.com> wrote:
> >
> > The following changes since commit eb2c66b10efd2b914b56b20ae90655914310c925:
> >
> > Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2020-07-06' into staging (2020-07-07 19:47:26 +0100)
> >
> > are available in the Git repository at:
> >
> > git://github.com/bonzini/qemu.git tags/for-upstream
> >
> > for you to fetch changes up to 392f34e59755f99d69586a63e0f5d80a7ef67f94:
> >
> > apic: Report current_count via 'info lapic' (2020-07-08 10:01:08 -0400)
>
> Hi; this still has the OSX failure, I'm afraid:
>
> /Users/pm215/src/qemu-for-merges/ui/cocoa.m:1478:9: error: implicit
> declaration of function 'cpu_throttle_set' is invalid in C99 [-
> Werror,-Wimplicit-function-declaration]
> cpu_throttle_set(throttle_pct);
> ^
> /Users/pm215/src/qemu-for-merges/ui/cocoa.m:1478:9: error: this
> function declaration is not a prototype [-Werror,-Wstrict-prototypes]
Squashing this into "cpu-throttle: new module, extracted from cpus.c"
should fix this (ui/cocoa.m was just forgotten when adding #include lines
after moving the function into its own header):
diff --git a/ui/cocoa.m b/ui/cocoa.m
index cb556e4e66..0910b4a716 100644
--- a/ui/cocoa.m
+++ b/ui/cocoa.m
@@ -32,6 +32,7 @@
#include "ui/input.h"
#include "sysemu/sysemu.h"
#include "sysemu/runstate.h"
+#include "sysemu/cpu-throttle.h"
#include "qapi/error.h"
#include "qapi/qapi-commands-block.h"
#include "qapi/qapi-commands-misc.h"
(am just doing a compile-and-test run with that change).
thanks
-- PMM
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 12:14 ` [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze Peter Maydell
2020-07-10 12:28 ` Peter Maydell
@ 2020-07-10 12:38 ` Claudio Fontana
2020-07-10 12:43 ` Peter Maydell
1 sibling, 1 reply; 21+ messages in thread
From: Claudio Fontana @ 2020-07-10 12:38 UTC (permalink / raw)
To: Peter Maydell, Paolo Bonzini; +Cc: QEMU Developers
On 7/10/20 2:14 PM, Peter Maydell wrote:
> On Wed, 8 Jul 2020 at 22:32, Paolo Bonzini <pbonzini@redhat.com> wrote:
>>
>> The following changes since commit eb2c66b10efd2b914b56b20ae90655914310c925:
>>
>> Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2020-07-06' into staging (2020-07-07 19:47:26 +0100)
>>
>> are available in the Git repository at:
>>
>> git://github.com/bonzini/qemu.git tags/for-upstream
>>
>> for you to fetch changes up to 392f34e59755f99d69586a63e0f5d80a7ef67f94:
>>
>> apic: Report current_count via 'info lapic' (2020-07-08 10:01:08 -0400)
>
> Hi; this still has the OSX failure, I'm afraid:
>
> /Users/pm215/src/qemu-for-merges/ui/cocoa.m:1478:9: error: implicit
> declaration of function 'cpu_throttle_set' is invalid in C99 [-
> Werror,-Wimplicit-function-declaration]
> cpu_throttle_set(throttle_pct);
> ^
> /Users/pm215/src/qemu-for-merges/ui/cocoa.m:1478:9: error: this
> function declaration is not a prototype [-Werror,-Wstrict-prototypes]
>
> (other builds haven't reported back yet)
>
> thanks
> -- PMM
>
Hi Peter,
I got regular green test reports from cirrus-ci for Mac, seems different compilation options.
The prototypes for cpu_throttle_ functions are
in sysemu/cpu-throttle.h
so the fix should be to just
#include "sysemu-cpu_throttle.h"
The fact that we get so wildly different results from CI is concerning to me.
Should I resend you the cpu throttle patch with this change?
Ciao
C
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 12:38 ` Claudio Fontana
@ 2020-07-10 12:43 ` Peter Maydell
2020-07-10 12:52 ` Claudio Fontana
0 siblings, 1 reply; 21+ messages in thread
From: Peter Maydell @ 2020-07-10 12:43 UTC (permalink / raw)
To: Claudio Fontana; +Cc: Paolo Bonzini, QEMU Developers
On Fri, 10 Jul 2020 at 13:38, Claudio Fontana <cfontana@suse.de> wrote:
> I got regular green test reports from cirrus-ci for Mac, seems different compilation options.
That's odd -- what is cirrus-ci doing differently? Building
the cocoa UI frontend is the default and is definitely
something we want to be testing in the CI...
thanks
-- PMM
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 12:43 ` Peter Maydell
@ 2020-07-10 12:52 ` Claudio Fontana
2020-07-10 12:55 ` Peter Maydell
0 siblings, 1 reply; 21+ messages in thread
From: Claudio Fontana @ 2020-07-10 12:52 UTC (permalink / raw)
To: Peter Maydell; +Cc: Paolo Bonzini, QEMU Developers
On 7/10/20 2:43 PM, Peter Maydell wrote:
> On Fri, 10 Jul 2020 at 13:38, Claudio Fontana <cfontana@suse.de> wrote:
>> I got regular green test reports from cirrus-ci for Mac, seems different compilation options.
>
> That's odd -- what is cirrus-ci doing differently? Building
> the cocoa UI frontend is the default and is definitely
> something we want to be testing in the CI...
>
> thanks
> -- PMM
>
If you can access it,
https://cirrus-ci.com/task/5537514263937024?command=main#L2039
the thing is treated here as a warning, which is in the middle of a large amount of other warnings.
private/var/folders/3y/l0z1x3693dl_8n0qybp4dqwh0000gn/T/cirrus-ci-build/ui/vnc-auth-sasl.c:648:29: warning: 'sasl_errdetail' is deprecated: first deprecated in macOS 10.11 [-Wdeprecated-declarations]
sasl_errdetail(vs->sasl.conn));
/* ... lots of similar warnings */
private/var/folders/3y/l0z1x3693dl_8n0qybp4dqwh0000gn/T/cirrus-ci-build/ui/cocoa.m:1478:9: warning: implicit declaration of function 'cpu_throttle_set' is invalid in C99 [-Wimplicit-function-declaration]
cpu_throttle_set(throttle_pct);
^
Apparently the cirrus-ci I am using is not treating this as an error, while what you are using is..
Thanks,
Claudio
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 12:52 ` Claudio Fontana
@ 2020-07-10 12:55 ` Peter Maydell
2020-07-10 13:11 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 21+ messages in thread
From: Peter Maydell @ 2020-07-10 12:55 UTC (permalink / raw)
To: Claudio Fontana; +Cc: Paolo Bonzini, QEMU Developers
On Fri, 10 Jul 2020 at 13:52, Claudio Fontana <cfontana@suse.de> wrote:
> If you can access it,
>
> https://cirrus-ci.com/task/5537514263937024?command=main#L2039
>
> the thing is treated here as a warning, which is in the middle of a large amount of other warnings.
>
> private/var/folders/3y/l0z1x3693dl_8n0qybp4dqwh0000gn/T/cirrus-ci-build/ui/vnc-auth-sasl.c:648:29: warning: 'sasl_errdetail' is deprecated: first deprecated in macOS 10.11 [-Wdeprecated-declarations]
> sasl_errdetail(vs->sasl.conn));
>
> /* ... lots of similar warnings */
>
> private/var/folders/3y/l0z1x3693dl_8n0qybp4dqwh0000gn/T/cirrus-ci-build/ui/cocoa.m:1478:9: warning: implicit declaration of function 'cpu_throttle_set' is invalid in C99 [-Wimplicit-function-declaration]
> cpu_throttle_set(throttle_pct);
> ^
>
>
> Apparently the cirrus-ci I am using is not treating this as an error, while what you are using is..
Ah, I see. Yeah, configure by default doesn't enable -Werror for OSX.
My build tree has
'--extra-cflags=-fdiagnostics-color=never -Werror
-Wno-error=deprecated-declarations'
(of which the last two are relevant here). We should probably
make configure use -Werror on OSX now with the same logic as Linux,
I've been using it that way for ages without issues.
thanks
-- PMM
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 12:28 ` Peter Maydell
@ 2020-07-10 12:55 ` Claudio Fontana
0 siblings, 0 replies; 21+ messages in thread
From: Claudio Fontana @ 2020-07-10 12:55 UTC (permalink / raw)
To: Peter Maydell, Paolo Bonzini; +Cc: QEMU Developers
On 7/10/20 2:28 PM, Peter Maydell wrote:
> On Fri, 10 Jul 2020 at 13:14, Peter Maydell <peter.maydell@linaro.org> wrote:
>>
>> On Wed, 8 Jul 2020 at 22:32, Paolo Bonzini <pbonzini@redhat.com> wrote:
>>>
>>> The following changes since commit eb2c66b10efd2b914b56b20ae90655914310c925:
>>>
>>> Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2020-07-06' into staging (2020-07-07 19:47:26 +0100)
>>>
>>> are available in the Git repository at:
>>>
>>> git://github.com/bonzini/qemu.git tags/for-upstream
>>>
>>> for you to fetch changes up to 392f34e59755f99d69586a63e0f5d80a7ef67f94:
>>>
>>> apic: Report current_count via 'info lapic' (2020-07-08 10:01:08 -0400)
>>
>> Hi; this still has the OSX failure, I'm afraid:
>>
>> /Users/pm215/src/qemu-for-merges/ui/cocoa.m:1478:9: error: implicit
>> declaration of function 'cpu_throttle_set' is invalid in C99 [-
>> Werror,-Wimplicit-function-declaration]
>> cpu_throttle_set(throttle_pct);
>> ^
>> /Users/pm215/src/qemu-for-merges/ui/cocoa.m:1478:9: error: this
>> function declaration is not a prototype [-Werror,-Wstrict-prototypes]
>
> Squashing this into "cpu-throttle: new module, extracted from cpus.c"
> should fix this (ui/cocoa.m was just forgotten when adding #include lines
> after moving the function into its own header):
>
> diff --git a/ui/cocoa.m b/ui/cocoa.m
> index cb556e4e66..0910b4a716 100644
> --- a/ui/cocoa.m
> +++ b/ui/cocoa.m
> @@ -32,6 +32,7 @@
> #include "ui/input.h"
> #include "sysemu/sysemu.h"
> #include "sysemu/runstate.h"
> +#include "sysemu/cpu-throttle.h"
> #include "qapi/error.h"
> #include "qapi/qapi-commands-block.h"
> #include "qapi/qapi-commands-misc.h"
>
> (am just doing a compile-and-test run with that change).
>
> thanks
> -- PMM
>
Ah, just noticed this, yes, indeed I clearly forgot that,
at the same time clearly I need to improve both my local environment and the CI setups I am using,
because for me everything works!
Or, we could swap configurations so that QEMU builds are always successful... ;-)
Ciao,
Claudio
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 12:55 ` Peter Maydell
@ 2020-07-10 13:11 ` Philippe Mathieu-Daudé
2020-07-10 14:44 ` Claudio Fontana
0 siblings, 1 reply; 21+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-07-10 13:11 UTC (permalink / raw)
To: Peter Maydell, Claudio Fontana; +Cc: Paolo Bonzini, QEMU Developers
On 7/10/20 2:55 PM, Peter Maydell wrote:
> On Fri, 10 Jul 2020 at 13:52, Claudio Fontana <cfontana@suse.de> wrote:
>> If you can access it,
>>
>> https://cirrus-ci.com/task/5537514263937024?command=main#L2039
>>
>> the thing is treated here as a warning, which is in the middle of a large amount of other warnings.
>>
>> private/var/folders/3y/l0z1x3693dl_8n0qybp4dqwh0000gn/T/cirrus-ci-build/ui/vnc-auth-sasl.c:648:29: warning: 'sasl_errdetail' is deprecated: first deprecated in macOS 10.11 [-Wdeprecated-declarations]
>> sasl_errdetail(vs->sasl.conn));
>>
>> /* ... lots of similar warnings */
>>
>> private/var/folders/3y/l0z1x3693dl_8n0qybp4dqwh0000gn/T/cirrus-ci-build/ui/cocoa.m:1478:9: warning: implicit declaration of function 'cpu_throttle_set' is invalid in C99 [-Wimplicit-function-declaration]
>> cpu_throttle_set(throttle_pct);
>> ^
>>
>>
>> Apparently the cirrus-ci I am using is not treating this as an error, while what you are using is..
>
> Ah, I see. Yeah, configure by default doesn't enable -Werror for OSX.
> My build tree has
> '--extra-cflags=-fdiagnostics-color=never -Werror
> -Wno-error=deprecated-declarations'
TIL this is different on OSX...
>
> (of which the last two are relevant here). We should probably
> make configure use -Werror on OSX now with the same logic as Linux,
> I've been using it that way for ages without issues.
Yes please!
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 13:11 ` Philippe Mathieu-Daudé
@ 2020-07-10 14:44 ` Claudio Fontana
2020-07-10 15:13 ` Max Reitz
0 siblings, 1 reply; 21+ messages in thread
From: Claudio Fontana @ 2020-07-10 14:44 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Peter Maydell
Cc: Paolo Bonzini, QEMU Developers, Max Reitz
On 7/10/20 3:11 PM, Philippe Mathieu-Daudé wrote:
> On 7/10/20 2:55 PM, Peter Maydell wrote:
>> On Fri, 10 Jul 2020 at 13:52, Claudio Fontana <cfontana@suse.de> wrote:
>>> If you can access it,
>>>
>>> https://cirrus-ci.com/task/5537514263937024?command=main#L2039
>>>
>>> the thing is treated here as a warning, which is in the middle of a large amount of other warnings.
>>>
>>> private/var/folders/3y/l0z1x3693dl_8n0qybp4dqwh0000gn/T/cirrus-ci-build/ui/vnc-auth-sasl.c:648:29: warning: 'sasl_errdetail' is deprecated: first deprecated in macOS 10.11 [-Wdeprecated-declarations]
>>> sasl_errdetail(vs->sasl.conn));
>>>
>>> /* ... lots of similar warnings */
>>>
>>> private/var/folders/3y/l0z1x3693dl_8n0qybp4dqwh0000gn/T/cirrus-ci-build/ui/cocoa.m:1478:9: warning: implicit declaration of function 'cpu_throttle_set' is invalid in C99 [-Wimplicit-function-declaration]
>>> cpu_throttle_set(throttle_pct);
>>> ^
>>>
>>>
>>> Apparently the cirrus-ci I am using is not treating this as an error, while what you are using is..
>>
>> Ah, I see. Yeah, configure by default doesn't enable -Werror for OSX.
>> My build tree has
>> '--extra-cflags=-fdiagnostics-color=never -Werror
>> -Wno-error=deprecated-declarations'
>
> TIL this is different on OSX...
>
>>
>> (of which the last two are relevant here). We should probably
>> make configure use -Werror on OSX now with the same logic as Linux,
>> I've been using it that way for ages without issues.
>
> Yes please!
>
Speaking of MacOS and CI, commit 57ee95ed4ee7b4c039ec5f0705c45734c56706bc
Author: Max Reitz <mreitz@redhat.com>
Date: Thu Jun 25 14:55:30 2020 +0200
iotests: Make _filter_img_create more active
broke cirrus-ci completely for me due to missing "readarray" builtin.
Maybe it is bash vs zsh?
Ciao,
Claudio
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 14:44 ` Claudio Fontana
@ 2020-07-10 15:13 ` Max Reitz
2020-07-10 15:18 ` Peter Maydell
0 siblings, 1 reply; 21+ messages in thread
From: Max Reitz @ 2020-07-10 15:13 UTC (permalink / raw)
To: Claudio Fontana, Philippe Mathieu-Daudé, Peter Maydell
Cc: Paolo Bonzini, QEMU Developers
On 10.07.20 16:44, Claudio Fontana wrote:
> On 7/10/20 3:11 PM, Philippe Mathieu-Daudé wrote:
>> On 7/10/20 2:55 PM, Peter Maydell wrote:
>>> On Fri, 10 Jul 2020 at 13:52, Claudio Fontana <cfontana@suse.de> wrote:
>>>> If you can access it,
>>>>
>>>> https://cirrus-ci.com/task/5537514263937024?command=main#L2039
>>>>
>>>> the thing is treated here as a warning, which is in the middle of a large amount of other warnings.
>>>>
>>>> private/var/folders/3y/l0z1x3693dl_8n0qybp4dqwh0000gn/T/cirrus-ci-build/ui/vnc-auth-sasl.c:648:29: warning: 'sasl_errdetail' is deprecated: first deprecated in macOS 10.11 [-Wdeprecated-declarations]
>>>> sasl_errdetail(vs->sasl.conn));
>>>>
>>>> /* ... lots of similar warnings */
>>>>
>>>> private/var/folders/3y/l0z1x3693dl_8n0qybp4dqwh0000gn/T/cirrus-ci-build/ui/cocoa.m:1478:9: warning: implicit declaration of function 'cpu_throttle_set' is invalid in C99 [-Wimplicit-function-declaration]
>>>> cpu_throttle_set(throttle_pct);
>>>> ^
>>>>
>>>>
>>>> Apparently the cirrus-ci I am using is not treating this as an error, while what you are using is..
>>>
>>> Ah, I see. Yeah, configure by default doesn't enable -Werror for OSX.
>>> My build tree has
>>> '--extra-cflags=-fdiagnostics-color=never -Werror
>>> -Wno-error=deprecated-declarations'
>>
>> TIL this is different on OSX...
>>
>>>
>>> (of which the last two are relevant here). We should probably
>>> make configure use -Werror on OSX now with the same logic as Linux,
>>> I've been using it that way for ages without issues.
>>
>> Yes please!
>>
>
> Speaking of MacOS and CI, commit 57ee95ed4ee7b4c039ec5f0705c45734c56706bc
>
> Author: Max Reitz <mreitz@redhat.com>
> Date: Thu Jun 25 14:55:30 2020 +0200
>
> iotests: Make _filter_img_create more active
>
> broke cirrus-ci completely for me due to missing "readarray" builtin.
>
> Maybe it is bash vs zsh?
Possible, but the iotests depend on bash. All the iotests shell source
files explicitly reference bash in their shebang line, and so far we’ve
always assumed that they are thus going to be run by bash.
I suppose it’s well possible we’ve been lucky so far and all bash-isms
we used were supported by zsh as well. But why does cirrus-ci run them
via zsh if the shebang line explicitly launches “bash”?
Max
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 15:13 ` Max Reitz
@ 2020-07-10 15:18 ` Peter Maydell
2020-07-10 15:31 ` Max Reitz
0 siblings, 1 reply; 21+ messages in thread
From: Peter Maydell @ 2020-07-10 15:18 UTC (permalink / raw)
To: Max Reitz
Cc: Paolo Bonzini, Philippe Mathieu-Daudé,
Claudio Fontana, QEMU Developers
On Fri, 10 Jul 2020 at 16:13, Max Reitz <mreitz@redhat.com> wrote:
>
> On 10.07.20 16:44, Claudio Fontana wrote:
> > Speaking of MacOS and CI, commit 57ee95ed4ee7b4c039ec5f0705c45734c56706bc
> >
> > Author: Max Reitz <mreitz@redhat.com>
> > Date: Thu Jun 25 14:55:30 2020 +0200
> >
> > iotests: Make _filter_img_create more active
> >
> > broke cirrus-ci completely for me due to missing "readarray" builtin.
> >
> > Maybe it is bash vs zsh?
>
> Possible, but the iotests depend on bash. All the iotests shell source
> files explicitly reference bash in their shebang line, and so far we’ve
> always assumed that they are thus going to be run by bash.
readarray only arrived sometime in bash 4, and the OSX system
bash is 3.2.57, so it won't have that builtin.
thanks
-- PMM
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 15:18 ` Peter Maydell
@ 2020-07-10 15:31 ` Max Reitz
2020-07-10 15:42 ` Peter Maydell
0 siblings, 1 reply; 21+ messages in thread
From: Max Reitz @ 2020-07-10 15:31 UTC (permalink / raw)
To: Peter Maydell
Cc: Paolo Bonzini, Philippe Mathieu-Daudé,
Claudio Fontana, QEMU Developers
On 10.07.20 17:18, Peter Maydell wrote:
> On Fri, 10 Jul 2020 at 16:13, Max Reitz <mreitz@redhat.com> wrote:
>>
>> On 10.07.20 16:44, Claudio Fontana wrote:
>>> Speaking of MacOS and CI, commit 57ee95ed4ee7b4c039ec5f0705c45734c56706bc
>>>
>>> Author: Max Reitz <mreitz@redhat.com>
>>> Date: Thu Jun 25 14:55:30 2020 +0200
>>>
>>> iotests: Make _filter_img_create more active
>>>
>>> broke cirrus-ci completely for me due to missing "readarray" builtin.
>>>
>>> Maybe it is bash vs zsh?
>>
>> Possible, but the iotests depend on bash. All the iotests shell source
>> files explicitly reference bash in their shebang line, and so far we’ve
>> always assumed that they are thus going to be run by bash.
>
> readarray only arrived sometime in bash 4, and the OSX system
> bash is 3.2.57, so it won't have that builtin.
It arrived with 4.0, actually, which was released 11 years ago.
I had assumed that would be sufficiently mature.
So, um, 11 years isn’t sufficiently mature then and I’ll have to work
around not having readarray for macOS?
Max
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 15:31 ` Max Reitz
@ 2020-07-10 15:42 ` Peter Maydell
2020-07-10 15:46 ` Max Reitz
2020-07-10 15:47 ` Daniel P. Berrangé
0 siblings, 2 replies; 21+ messages in thread
From: Peter Maydell @ 2020-07-10 15:42 UTC (permalink / raw)
To: Max Reitz
Cc: Paolo Bonzini, Philippe Mathieu-Daudé,
Claudio Fontana, QEMU Developers
On Fri, 10 Jul 2020 at 16:31, Max Reitz <mreitz@redhat.com> wrote:
>
> On 10.07.20 17:18, Peter Maydell wrote:
> > readarray only arrived sometime in bash 4, and the OSX system
> > bash is 3.2.57, so it won't have that builtin.
>
> It arrived with 4.0, actually, which was released 11 years ago.
> I had assumed that would be sufficiently mature.
>
> So, um, 11 years isn’t sufficiently mature then and I’ll have to work
> around not having readarray for macOS?
It's the usual Apple-vs-GPL3 issue.
I note that the iotests do seem to regularly run into
non-portable constructs: Kevin's latest pullreq has
just failed due to a use of 'truncate' that doesn't
work on the BSDs.
thanks
-- PMM
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 15:42 ` Peter Maydell
@ 2020-07-10 15:46 ` Max Reitz
2020-07-10 15:50 ` Peter Maydell
2020-07-10 15:47 ` Daniel P. Berrangé
1 sibling, 1 reply; 21+ messages in thread
From: Max Reitz @ 2020-07-10 15:46 UTC (permalink / raw)
To: Peter Maydell
Cc: Paolo Bonzini, Philippe Mathieu-Daudé,
Claudio Fontana, QEMU Developers
On 10.07.20 17:42, Peter Maydell wrote:
> On Fri, 10 Jul 2020 at 16:31, Max Reitz <mreitz@redhat.com> wrote:
>>
>> On 10.07.20 17:18, Peter Maydell wrote:
>>> readarray only arrived sometime in bash 4, and the OSX system
>>> bash is 3.2.57, so it won't have that builtin.
>>
>> It arrived with 4.0, actually, which was released 11 years ago.
>> I had assumed that would be sufficiently mature.
>>
>> So, um, 11 years isn’t sufficiently mature then and I’ll have to work
>> around not having readarray for macOS?
>
> It's the usual Apple-vs-GPL3 issue.
>
> I note that the iotests do seem to regularly run into
> non-portable constructs: Kevin's latest pullreq has
> just failed due to a use of 'truncate' that doesn't
> work on the BSDs.
:/
I’ll send a patch to drop readarray.
Max
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 15:42 ` Peter Maydell
2020-07-10 15:46 ` Max Reitz
@ 2020-07-10 15:47 ` Daniel P. Berrangé
2020-07-10 15:53 ` Thomas Huth
1 sibling, 1 reply; 21+ messages in thread
From: Daniel P. Berrangé @ 2020-07-10 15:47 UTC (permalink / raw)
To: Peter Maydell
Cc: QEMU Developers, Paolo Bonzini, Philippe Mathieu-Daudé,
Claudio Fontana, Max Reitz
On Fri, Jul 10, 2020 at 04:42:11PM +0100, Peter Maydell wrote:
> On Fri, 10 Jul 2020 at 16:31, Max Reitz <mreitz@redhat.com> wrote:
> >
> > On 10.07.20 17:18, Peter Maydell wrote:
> > > readarray only arrived sometime in bash 4, and the OSX system
> > > bash is 3.2.57, so it won't have that builtin.
> >
> > It arrived with 4.0, actually, which was released 11 years ago.
> > I had assumed that would be sufficiently mature.
> >
> > So, um, 11 years isn’t sufficiently mature then and I’ll have to work
> > around not having readarray for macOS?
>
> It's the usual Apple-vs-GPL3 issue.
>
> I note that the iotests do seem to regularly run into
> non-portable constructs: Kevin's latest pullreq has
> just failed due to a use of 'truncate' that doesn't
> work on the BSDs.
Since we already depend on homebrew for the build environment, we can
pull in the newer bash from homebrew, and ignore the ancient version
from macOS stock install.
Regards,
Daniel
--
|: https://berrange.com -o- https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org -o- https://fstop138.berrange.com :|
|: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 15:46 ` Max Reitz
@ 2020-07-10 15:50 ` Peter Maydell
0 siblings, 0 replies; 21+ messages in thread
From: Peter Maydell @ 2020-07-10 15:50 UTC (permalink / raw)
To: Max Reitz
Cc: Paolo Bonzini, Philippe Mathieu-Daudé,
Claudio Fontana, QEMU Developers
On Fri, 10 Jul 2020 at 16:46, Max Reitz <mreitz@redhat.com> wrote:
>
> On 10.07.20 17:42, Peter Maydell wrote:
> > On Fri, 10 Jul 2020 at 16:31, Max Reitz <mreitz@redhat.com> wrote:
> >>
> >> On 10.07.20 17:18, Peter Maydell wrote:
> >>> readarray only arrived sometime in bash 4, and the OSX system
> >>> bash is 3.2.57, so it won't have that builtin.
> >>
> >> It arrived with 4.0, actually, which was released 11 years ago.
> >> I had assumed that would be sufficiently mature.
> >>
> >> So, um, 11 years isn’t sufficiently mature then and I’ll have to work
> >> around not having readarray for macOS?
> >
> > It's the usual Apple-vs-GPL3 issue.
> >
> > I note that the iotests do seem to regularly run into
> > non-portable constructs: Kevin's latest pullreq has
> > just failed due to a use of 'truncate' that doesn't
> > work on the BSDs.
>
> :/
>
> I’ll send a patch to drop readarray.
Thanks. I realised as a result of discussion on IRC that
this slipped through my testing because my OSX system
wasn't running iotests at all because it didn't have a
GNU sed available.
As Dan says, the other option is to do the same thing we
do for GNU sed, and skip all the iotests if we don't
have a new enough bash. I can always install sed and
bash out of homebrew to bring my setup into line with the
cirrus CI one. If we take that path we should update the
cirrus CI config to make sure it also installs homebrew
bash (and that the iotests use bash-from-the-path, not
/bin/bash.)
-- PMM
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze
2020-07-10 15:47 ` Daniel P. Berrangé
@ 2020-07-10 15:53 ` Thomas Huth
0 siblings, 0 replies; 21+ messages in thread
From: Thomas Huth @ 2020-07-10 15:53 UTC (permalink / raw)
To: Daniel P. Berrangé, Peter Maydell
Cc: Paolo Bonzini, Max Reitz, Philippe Mathieu-Daudé,
QEMU Developers, Claudio Fontana
On 10/07/2020 17.47, Daniel P. Berrangé wrote:
> On Fri, Jul 10, 2020 at 04:42:11PM +0100, Peter Maydell wrote:
>> On Fri, 10 Jul 2020 at 16:31, Max Reitz <mreitz@redhat.com> wrote:
>>>
>>> On 10.07.20 17:18, Peter Maydell wrote:
>>>> readarray only arrived sometime in bash 4, and the OSX system
>>>> bash is 3.2.57, so it won't have that builtin.
>>>
>>> It arrived with 4.0, actually, which was released 11 years ago.
>>> I had assumed that would be sufficiently mature.
>>>
>>> So, um, 11 years isn’t sufficiently mature then and I’ll have to work
>>> around not having readarray for macOS?
>>
>> It's the usual Apple-vs-GPL3 issue.
>>
>> I note that the iotests do seem to regularly run into
>> non-portable constructs: Kevin's latest pullreq has
>> just failed due to a use of 'truncate' that doesn't
>> work on the BSDs.
>
> Since we already depend on homebrew for the build environment, we can
> pull in the newer bash from homebrew, and ignore the ancient version
> from macOS stock install.
I just had the same idea. And then add a simple check for bash 3.x in
tests/check-block.sh so that it skips the iotests if only the old
version is available.
Thomas
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2020-07-10 15:56 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-08 17:25 [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze Paolo Bonzini
2020-07-08 17:25 ` [PULL v2 09/52] target/i386: fix IEEE SSE floating-point exception raising Paolo Bonzini
2020-07-08 17:25 ` [PULL v2 44/52] accel/kvm: Simplify kvm_check_extension() Paolo Bonzini
2020-07-08 17:25 ` [PULL v2 52/52] apic: Report current_count via 'info lapic' Paolo Bonzini
2020-07-10 12:14 ` [PULL v2 00/52] Misc patches for QEMU 5.1 soft freeze Peter Maydell
2020-07-10 12:28 ` Peter Maydell
2020-07-10 12:55 ` Claudio Fontana
2020-07-10 12:38 ` Claudio Fontana
2020-07-10 12:43 ` Peter Maydell
2020-07-10 12:52 ` Claudio Fontana
2020-07-10 12:55 ` Peter Maydell
2020-07-10 13:11 ` Philippe Mathieu-Daudé
2020-07-10 14:44 ` Claudio Fontana
2020-07-10 15:13 ` Max Reitz
2020-07-10 15:18 ` Peter Maydell
2020-07-10 15:31 ` Max Reitz
2020-07-10 15:42 ` Peter Maydell
2020-07-10 15:46 ` Max Reitz
2020-07-10 15:50 ` Peter Maydell
2020-07-10 15:47 ` Daniel P. Berrangé
2020-07-10 15:53 ` Thomas Huth
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