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* [Qemu-devel] [PATCH] char: cadence: correct reset value for baud rate registers
@ 2016-10-25  6:49 P J P
  2016-10-25 12:19 ` [Qemu-devel] [Qemu-arm] " Peter Maydell
  0 siblings, 1 reply; 4+ messages in thread
From: P J P @ 2016-10-25  6:49 UTC (permalink / raw)
  To: Qemu Developers
  Cc: Edgar E . Iglesias, Alistair Francis, qemu-arm, Prasad J Pandit

From: Prasad J Pandit <pjp@fedoraproject.org>

The Cadence UART device emulator stores 'baud rate generator'
and 'baud rate divider' values, used in computing speed, in two
registers. The device specification defines their range and
their reset value. Use their correct value when resetting the
device in cadence_uart_reset.

Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
---
 hw/char/cadence_uart.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index c176446..b8d4c28 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -471,7 +471,8 @@ static void cadence_uart_reset(DeviceState *dev)
     s->r[R_IMR] = 0;
     s->r[R_CISR] = 0;
     s->r[R_RTRIG] = 0x00000020;
-    s->r[R_BRGR] = 0x0000000F;
+    s->r[R_BRGR] = 0x0000028B;
+    s->r[R_BDIV] = 0x0000000F;
     s->r[R_TTRIG] = 0x00000020;
 
     uart_rx_reset(s);
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [Qemu-devel] [Qemu-arm] [PATCH] char: cadence: correct reset value for baud rate registers
  2016-10-25  6:49 [Qemu-devel] [PATCH] char: cadence: correct reset value for baud rate registers P J P
@ 2016-10-25 12:19 ` Peter Maydell
  2016-10-25 12:47   ` Edgar E. Iglesias
  0 siblings, 1 reply; 4+ messages in thread
From: Peter Maydell @ 2016-10-25 12:19 UTC (permalink / raw)
  To: P J P
  Cc: Qemu Developers, qemu-arm, Prasad J Pandit, Alistair Francis,
	Edgar Iglesias

On 25 October 2016 at 07:49, P J P <ppandit@redhat.com> wrote:
> From: Prasad J Pandit <pjp@fedoraproject.org>
>
> The Cadence UART device emulator stores 'baud rate generator'
> and 'baud rate divider' values, used in computing speed, in two
> registers. The device specification defines their range and
> their reset value. Use their correct value when resetting the
> device in cadence_uart_reset.
>
> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
> ---
>  hw/char/cadence_uart.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
> index c176446..b8d4c28 100644
> --- a/hw/char/cadence_uart.c
> +++ b/hw/char/cadence_uart.c
> @@ -471,7 +471,8 @@ static void cadence_uart_reset(DeviceState *dev)
>      s->r[R_IMR] = 0;
>      s->r[R_CISR] = 0;
>      s->r[R_RTRIG] = 0x00000020;
> -    s->r[R_BRGR] = 0x0000000F;
> +    s->r[R_BRGR] = 0x0000028B;
> +    s->r[R_BDIV] = 0x0000000F;
>      s->r[R_TTRIG] = 0x00000020;
>
>      uart_rx_reset(s);
> --
> 2.7.4

I'm going to wait for a review/ack from one of the Xilinx folk
before putting this in target-arm.next.

thanks
-- PMM

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Qemu-devel] [Qemu-arm] [PATCH] char: cadence: correct reset value for baud rate registers
  2016-10-25 12:19 ` [Qemu-devel] [Qemu-arm] " Peter Maydell
@ 2016-10-25 12:47   ` Edgar E. Iglesias
  2016-10-25 13:36     ` Peter Maydell
  0 siblings, 1 reply; 4+ messages in thread
From: Edgar E. Iglesias @ 2016-10-25 12:47 UTC (permalink / raw)
  To: Peter Maydell
  Cc: P J P, Qemu Developers, qemu-arm, Prasad J Pandit, Alistair Francis

On Tue, Oct 25, 2016 at 01:19:28PM +0100, Peter Maydell wrote:
> On 25 October 2016 at 07:49, P J P <ppandit@redhat.com> wrote:
> > From: Prasad J Pandit <pjp@fedoraproject.org>
> >
> > The Cadence UART device emulator stores 'baud rate generator'
> > and 'baud rate divider' values, used in computing speed, in two
> > registers. The device specification defines their range and
> > their reset value. Use their correct value when resetting the
> > device in cadence_uart_reset.
> >
> > Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
> > ---
> >  hw/char/cadence_uart.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
> > index c176446..b8d4c28 100644
> > --- a/hw/char/cadence_uart.c
> > +++ b/hw/char/cadence_uart.c
> > @@ -471,7 +471,8 @@ static void cadence_uart_reset(DeviceState *dev)
> >      s->r[R_IMR] = 0;
> >      s->r[R_CISR] = 0;
> >      s->r[R_RTRIG] = 0x00000020;
> > -    s->r[R_BRGR] = 0x0000000F;
> > +    s->r[R_BRGR] = 0x0000028B;
> > +    s->r[R_BDIV] = 0x0000000F;
> >      s->r[R_TTRIG] = 0x00000020;
> >
> >      uart_rx_reset(s);
> > --
> > 2.7.4
> 
> I'm going to wait for a review/ack from one of the Xilinx folk
> before putting this in target-arm.next.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Best regards,
Edgar

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Qemu-devel] [Qemu-arm] [PATCH] char: cadence: correct reset value for baud rate registers
  2016-10-25 12:47   ` Edgar E. Iglesias
@ 2016-10-25 13:36     ` Peter Maydell
  0 siblings, 0 replies; 4+ messages in thread
From: Peter Maydell @ 2016-10-25 13:36 UTC (permalink / raw)
  To: Edgar E. Iglesias
  Cc: P J P, Qemu Developers, qemu-arm, Prasad J Pandit, Alistair Francis

On 25 October 2016 at 13:47, Edgar E. Iglesias
<edgar.iglesias@xilinx.com> wrote:
> On Tue, Oct 25, 2016 at 01:19:28PM +0100, Peter Maydell wrote:
>> On 25 October 2016 at 07:49, P J P <ppandit@redhat.com> wrote:
>> > From: Prasad J Pandit <pjp@fedoraproject.org>
>> >
>> > The Cadence UART device emulator stores 'baud rate generator'
>> > and 'baud rate divider' values, used in computing speed, in two
>> > registers. The device specification defines their range and
>> > their reset value. Use their correct value when resetting the
>> > device in cadence_uart_reset.
>> >
>> > Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
>> > ---
>> >  hw/char/cadence_uart.c | 3 ++-
>> >  1 file changed, 2 insertions(+), 1 deletion(-)
>> >
>> > diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
>> > index c176446..b8d4c28 100644
>> > --- a/hw/char/cadence_uart.c
>> > +++ b/hw/char/cadence_uart.c
>> > @@ -471,7 +471,8 @@ static void cadence_uart_reset(DeviceState *dev)
>> >      s->r[R_IMR] = 0;
>> >      s->r[R_CISR] = 0;
>> >      s->r[R_RTRIG] = 0x00000020;
>> > -    s->r[R_BRGR] = 0x0000000F;
>> > +    s->r[R_BRGR] = 0x0000028B;
>> > +    s->r[R_BDIV] = 0x0000000F;
>> >      s->r[R_TTRIG] = 0x00000020;
>> >
>> >      uart_rx_reset(s);
>> > --
>> > 2.7.4
>>
>> I'm going to wait for a review/ack from one of the Xilinx folk
>> before putting this in target-arm.next.
>
> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Thanks; now applied to target-arm.next.

-- PMM

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2016-10-25 15:22 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-10-25  6:49 [Qemu-devel] [PATCH] char: cadence: correct reset value for baud rate registers P J P
2016-10-25 12:19 ` [Qemu-devel] [Qemu-arm] " Peter Maydell
2016-10-25 12:47   ` Edgar E. Iglesias
2016-10-25 13:36     ` Peter Maydell

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