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From: Peter Maydell <peter.maydell@linaro.org>
To: Jan Kiszka <jan.kiszka@siemens.com>
Cc: "Rob Herring" <rob.herring@linaro.org>,
	"Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
	"Fabian Aggeler" <aggelerf@ethz.ch>,
	"Greg Bellows" <greg.bellows@linaro.org>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Alexander Graf" <agraf@suse.de>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Sergey Fedorov" <serge.fdrv@gmail.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Christoffer Dall" <christoffer.dall@linaro.org>,
	"Richard Henderson" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v7 00/11] target-arm: Parts of the AArch64 EL2/3 exception model
Date: Mon, 29 Sep 2014 11:41:35 +0100	[thread overview]
Message-ID: <CAFEAcA_d71bW3kk5cDaJ-OKEmLMH0wdWutg0o1D7=w+xuOAv-w@mail.gmail.com> (raw)
In-Reply-To: <542934E4.3010902@siemens.com>

On 29 September 2014 11:31, Jan Kiszka <jan.kiszka@siemens.com> wrote:
> Sorry for hijacking the thread, but it seems related: These bits address
> AArch64, but what is the status of AArch32 /wrt hyp mode emulation?
> After playing with the "fast" model, I would be glad to find such
> support in QEMU rather sooner than later.

I don't think anybody is currently working on that,
though it is an obvious gap to fill in at some point.

I would caution against testing hypervisors on QEMU
rather than against hardware or the Fast Model,
except for anything other than basic smoke tests,
though -- there are a lot of complications and corner
cases in the architecture here and I expect we will
spend some time flushing out bugs as OSes expose
them.

-- PMM

  reply	other threads:[~2014-09-29 10:42 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-26  8:08 [Qemu-devel] [PATCH v7 00/11] target-arm: Parts of the AArch64 EL2/3 exception model Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 01/11] target-arm: Add HCR_EL2 Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 02/11] target-arm: Add SCR_EL3 Edgar E. Iglesias
2014-09-26 14:46   ` Peter Maydell
2014-09-26 19:45     ` Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 03/11] target-arm: A64: Refactor aarch64_cpu_do_interrupt Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 04/11] target-arm: Break out exception masking to a separate func Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 05/11] target-arm: Don't take interrupts targeting lower ELs Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 06/11] target-arm: A64: Correct updates to FAR and ESR on exceptions Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 07/11] target-arm: A64: Emulate the HVC insn Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 08/11] target-arm: Add a Hypervisor Trap exception type Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 09/11] target-arm: A64: Emulate the SMC insn Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 10/11] target-arm: Add IRQ and FIQ routing to EL2 and 3 Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 11/11] target-arm: Add support for VIRQ and VFIQ Edgar E. Iglesias
2014-09-26 15:23 ` [Qemu-devel] [PATCH v7 00/11] target-arm: Parts of the AArch64 EL2/3 exception model Peter Maydell
2014-09-29 10:31   ` Jan Kiszka
2014-09-29 10:41     ` Peter Maydell [this message]
2014-09-29 10:48       ` Jan Kiszka

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