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From: Jan Kiszka <jan.kiszka@siemens.com>
To: Peter Maydell <peter.maydell@linaro.org>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: "Rob Herring" <rob.herring@linaro.org>,
	"Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
	"Fabian Aggeler" <aggelerf@ethz.ch>,
	"Alexander Graf" <agraf@suse.de>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Greg Bellows" <greg.bellows@linaro.org>,
	"Sergey Fedorov" <serge.fdrv@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Christoffer Dall" <christoffer.dall@linaro.org>,
	"Richard Henderson" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v7 00/11] target-arm: Parts of the AArch64 EL2/3 exception model
Date: Mon, 29 Sep 2014 12:31:00 +0200	[thread overview]
Message-ID: <542934E4.3010902@siemens.com> (raw)
In-Reply-To: <CAFEAcA_qBZ6PjnqkYAqa=zOS3sfWdPaNyU70fEMaSxz=5vDXVw@mail.gmail.com>

On 2014-09-26 17:23, Peter Maydell wrote:
> On 26 September 2014 09:08, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
>> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>>
>> Hi,
>>
>> This is a second round of AArch64 EL2/3 patches working on the exception
>> model. Among other things adding HVC/SMC, interrupt routing to EL2/3 and
>> Virtual IRQs/FIQs. The VIRQ/VFIQ support only adds the external signal
>> delivery method.
>>
>> This conflicts slightly with the PSCI emulation patches that Rob posted.
>> A rebase should be trivial, hooking in the PSCI emulation calls in the
>> HVC/SMC code.
> 
> Thanks. I've applied these to target-arm.next, with
> some minor fixups to account for the cpu-exec
> refactoring. Pushed to my git repo if you want
> to grab it before I get round to doing a pullreq:
> git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.next
> 
> (I would still have preferred if we'd just implemented
> the interrupt routing right to start with but in
> the interests of making progress I'll let that pass.)

Sorry for hijacking the thread, but it seems related: These bits address
AArch64, but what is the status of AArch32 /wrt hyp mode emulation?
After playing with the "fast" model, I would be glad to find such
support in QEMU rather sooner than later.

Thanks,
Jan

-- 
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux

  reply	other threads:[~2014-09-29 10:31 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-26  8:08 [Qemu-devel] [PATCH v7 00/11] target-arm: Parts of the AArch64 EL2/3 exception model Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 01/11] target-arm: Add HCR_EL2 Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 02/11] target-arm: Add SCR_EL3 Edgar E. Iglesias
2014-09-26 14:46   ` Peter Maydell
2014-09-26 19:45     ` Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 03/11] target-arm: A64: Refactor aarch64_cpu_do_interrupt Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 04/11] target-arm: Break out exception masking to a separate func Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 05/11] target-arm: Don't take interrupts targeting lower ELs Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 06/11] target-arm: A64: Correct updates to FAR and ESR on exceptions Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 07/11] target-arm: A64: Emulate the HVC insn Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 08/11] target-arm: Add a Hypervisor Trap exception type Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 09/11] target-arm: A64: Emulate the SMC insn Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 10/11] target-arm: Add IRQ and FIQ routing to EL2 and 3 Edgar E. Iglesias
2014-09-26  8:08 ` [Qemu-devel] [PATCH v7 11/11] target-arm: Add support for VIRQ and VFIQ Edgar E. Iglesias
2014-09-26 15:23 ` [Qemu-devel] [PATCH v7 00/11] target-arm: Parts of the AArch64 EL2/3 exception model Peter Maydell
2014-09-29 10:31   ` Jan Kiszka [this message]
2014-09-29 10:41     ` Peter Maydell
2014-09-29 10:48       ` Jan Kiszka

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