From: Atish Kumar Patra <atishp@rivosinc.com> To: Andrew Jones <ajones@ventanamicro.com> Cc: linux-kernel@vger.kernel.org, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org>, Guo Ren <guoren@kernel.org>, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland <mark.rutland@arm.com>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Sergey Matyukevich <sergey.matyukevich@syntacore.com>, Eric Lin <eric.lin@sifive.com>, Will Deacon <will@kernel.org> Subject: Re: [PATCH v2 02/11] RISC-V: KVM: Define a probe function for SBI extension data structures Date: Thu, 12 Jan 2023 10:19:46 -0800 [thread overview] Message-ID: <CAHBxVyG0mmVJDg0MUG0FMhQM11xrk6dTw9Hc1YntVE+9qdbfOg@mail.gmail.com> (raw) In-Reply-To: <20230112102141.chpcqzoko25s2cak@orel> On Thu, Jan 12, 2023 at 2:21 AM Andrew Jones <ajones@ventanamicro.com> wrote: > > On Thu, Dec 15, 2022 at 09:00:37AM -0800, Atish Patra wrote: > > Currently the probe function just checks if an SBI extension is > > registered or not. However, the extension may not want to advertise > > itself depending on some other condition. > > An additional extension specific probe function will allow > > extensions to decide if they want to be advertised to the caller or > > not. Any extension that does not require additional dependency checks > > can avoid implementing this function. > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > --- > > arch/riscv/include/asm/kvm_vcpu_sbi.h | 3 +++ > > arch/riscv/kvm/vcpu_sbi_base.c | 13 +++++++++++-- > > 2 files changed, 14 insertions(+), 2 deletions(-) > > > > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h > > index f79478a..61dac1b 100644 > > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h > > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h > > @@ -29,6 +29,9 @@ struct kvm_vcpu_sbi_extension { > > int (*handler)(struct kvm_vcpu *vcpu, struct kvm_run *run, > > unsigned long *out_val, struct kvm_cpu_trap *utrap, > > bool *exit); > > + > > + /* Extension specific probe function */ > > + unsigned long (*probe)(struct kvm_vcpu *vcpu, unsigned long extid); > > It doesn't seem like the extid parameter should be necessary since the > probe function is specific to the extension, but it doesn't hurt either. > Yeah. You are correct. I will drop it. Thanks. > > }; > > > > void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run); > > diff --git a/arch/riscv/kvm/vcpu_sbi_base.c b/arch/riscv/kvm/vcpu_sbi_base.c > > index 5d65c63..89e2415 100644 > > --- a/arch/riscv/kvm/vcpu_sbi_base.c > > +++ b/arch/riscv/kvm/vcpu_sbi_base.c > > @@ -19,6 +19,7 @@ static int kvm_sbi_ext_base_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, > > { > > int ret = 0; > > struct kvm_cpu_context *cp = &vcpu->arch.guest_context; > > + const struct kvm_vcpu_sbi_extension *sbi_ext; > > > > switch (cp->a6) { > > case SBI_EXT_BASE_GET_SPEC_VERSION: > > @@ -43,8 +44,16 @@ static int kvm_sbi_ext_base_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, > > */ > > kvm_riscv_vcpu_sbi_forward(vcpu, run); > > *exit = true; > > - } else > > - *out_val = kvm_vcpu_sbi_find_ext(cp->a0) ? 1 : 0; > > + } else { > > + sbi_ext = kvm_vcpu_sbi_find_ext(cp->a0); > > + if (sbi_ext) { > > + if (sbi_ext->probe) > > + *out_val = sbi_ext->probe(vcpu, cp->a0); > > + else > > + *out_val = 1; > > + } else > > + *out_val = 0; > > + } > > break; > > case SBI_EXT_BASE_GET_MVENDORID: > > *out_val = vcpu->arch.mvendorid; > > -- > > 2.25.1 > > > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Atish Kumar Patra <atishp@rivosinc.com> To: Andrew Jones <ajones@ventanamicro.com> Cc: linux-kernel@vger.kernel.org, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org>, Guo Ren <guoren@kernel.org>, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland <mark.rutland@arm.com>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Sergey Matyukevich <sergey.matyukevich@syntacore.com>, Eric Lin <eric.lin@sifive.com>, Will Deacon <will@kernel.org> Subject: Re: [PATCH v2 02/11] RISC-V: KVM: Define a probe function for SBI extension data structures Date: Thu, 12 Jan 2023 10:19:46 -0800 [thread overview] Message-ID: <CAHBxVyG0mmVJDg0MUG0FMhQM11xrk6dTw9Hc1YntVE+9qdbfOg@mail.gmail.com> (raw) In-Reply-To: <20230112102141.chpcqzoko25s2cak@orel> On Thu, Jan 12, 2023 at 2:21 AM Andrew Jones <ajones@ventanamicro.com> wrote: > > On Thu, Dec 15, 2022 at 09:00:37AM -0800, Atish Patra wrote: > > Currently the probe function just checks if an SBI extension is > > registered or not. However, the extension may not want to advertise > > itself depending on some other condition. > > An additional extension specific probe function will allow > > extensions to decide if they want to be advertised to the caller or > > not. Any extension that does not require additional dependency checks > > can avoid implementing this function. > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > --- > > arch/riscv/include/asm/kvm_vcpu_sbi.h | 3 +++ > > arch/riscv/kvm/vcpu_sbi_base.c | 13 +++++++++++-- > > 2 files changed, 14 insertions(+), 2 deletions(-) > > > > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h > > index f79478a..61dac1b 100644 > > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h > > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h > > @@ -29,6 +29,9 @@ struct kvm_vcpu_sbi_extension { > > int (*handler)(struct kvm_vcpu *vcpu, struct kvm_run *run, > > unsigned long *out_val, struct kvm_cpu_trap *utrap, > > bool *exit); > > + > > + /* Extension specific probe function */ > > + unsigned long (*probe)(struct kvm_vcpu *vcpu, unsigned long extid); > > It doesn't seem like the extid parameter should be necessary since the > probe function is specific to the extension, but it doesn't hurt either. > Yeah. You are correct. I will drop it. Thanks. > > }; > > > > void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run); > > diff --git a/arch/riscv/kvm/vcpu_sbi_base.c b/arch/riscv/kvm/vcpu_sbi_base.c > > index 5d65c63..89e2415 100644 > > --- a/arch/riscv/kvm/vcpu_sbi_base.c > > +++ b/arch/riscv/kvm/vcpu_sbi_base.c > > @@ -19,6 +19,7 @@ static int kvm_sbi_ext_base_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, > > { > > int ret = 0; > > struct kvm_cpu_context *cp = &vcpu->arch.guest_context; > > + const struct kvm_vcpu_sbi_extension *sbi_ext; > > > > switch (cp->a6) { > > case SBI_EXT_BASE_GET_SPEC_VERSION: > > @@ -43,8 +44,16 @@ static int kvm_sbi_ext_base_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, > > */ > > kvm_riscv_vcpu_sbi_forward(vcpu, run); > > *exit = true; > > - } else > > - *out_val = kvm_vcpu_sbi_find_ext(cp->a0) ? 1 : 0; > > + } else { > > + sbi_ext = kvm_vcpu_sbi_find_ext(cp->a0); > > + if (sbi_ext) { > > + if (sbi_ext->probe) > > + *out_val = sbi_ext->probe(vcpu, cp->a0); > > + else > > + *out_val = 1; > > + } else > > + *out_val = 0; > > + } > > break; > > case SBI_EXT_BASE_GET_MVENDORID: > > *out_val = vcpu->arch.mvendorid; > > -- > > 2.25.1 > > > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
next prev parent reply other threads:[~2023-01-12 18:20 UTC|newest] Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-15 17:00 [PATCH v2 00/11] KVM perf support Atish Patra 2022-12-15 17:00 ` Atish Patra 2022-12-15 17:00 ` [PATCH v2 01/11] RISC-V: Define helper functions expose hpm counter width and count Atish Patra 2022-12-15 17:00 ` Atish Patra 2023-01-12 10:06 ` Andrew Jones 2023-01-12 10:06 ` Andrew Jones 2023-01-12 18:18 ` Atish Kumar Patra 2023-01-12 18:18 ` Atish Kumar Patra 2023-01-13 7:22 ` Andrew Jones 2023-01-13 7:22 ` Andrew Jones 2023-01-24 20:41 ` Atish Patra 2023-01-24 20:41 ` Atish Patra 2022-12-15 17:00 ` [PATCH v2 02/11] RISC-V: KVM: Define a probe function for SBI extension data structures Atish Patra 2022-12-15 17:00 ` Atish Patra 2023-01-12 10:21 ` Andrew Jones 2023-01-12 10:21 ` Andrew Jones 2023-01-12 18:19 ` Atish Kumar Patra [this message] 2023-01-12 18:19 ` Atish Kumar Patra 2022-12-15 17:00 ` [PATCH v2 03/11] RISC-V: KVM: Return correct code for hsm stop function Atish Patra 2022-12-15 17:00 ` Atish Patra 2023-01-12 10:28 ` Andrew Jones 2023-01-12 10:28 ` Andrew Jones 2023-01-12 18:25 ` Atish Kumar Patra 2023-01-12 18:25 ` Atish Kumar Patra 2023-01-13 7:25 ` Andrew Jones 2023-01-13 7:25 ` Andrew Jones 2022-12-15 17:00 ` [PATCH v2 04/11] RISC-V: KVM: Modify SBI extension handler to return SBI error code Atish Patra 2022-12-15 17:00 ` Atish Patra 2023-01-12 11:04 ` Andrew Jones 2023-01-12 11:04 ` Andrew Jones 2023-01-12 18:47 ` Atish Kumar Patra 2023-01-12 18:47 ` Atish Kumar Patra 2023-01-13 7:42 ` Andrew Jones 2023-01-13 7:42 ` Andrew Jones 2022-12-15 17:00 ` [PATCH v2 05/11] RISC-V: KVM: Improve privilege mode filtering for perf Atish Patra 2022-12-15 17:00 ` Atish Patra 2022-12-15 20:17 ` Conor Dooley 2022-12-15 20:17 ` Conor Dooley 2022-12-15 21:10 ` Atish Kumar Patra 2022-12-15 21:10 ` Atish Kumar Patra 2022-12-15 17:00 ` [PATCH v2 06/11] RISC-V: KVM: Add skeleton support " Atish Patra 2022-12-15 17:00 ` Atish Patra 2023-01-12 15:10 ` Andrew Jones 2023-01-12 15:10 ` Andrew Jones 2023-01-12 18:09 ` Atish Kumar Patra 2023-01-12 18:09 ` Atish Kumar Patra 2022-12-15 17:00 ` [PATCH v2 07/11] RISC-V: KVM: Add SBI PMU extension support Atish Patra 2022-12-15 17:00 ` Atish Patra 2023-01-12 15:29 ` Andrew Jones 2023-01-12 15:29 ` Andrew Jones 2023-01-12 18:04 ` Atish Kumar Patra 2023-01-12 18:04 ` Atish Kumar Patra 2022-12-15 17:00 ` [PATCH v2 08/11] RISC-V: KVM: Disable all hpmcounter access for VS/VU mode Atish Patra 2022-12-15 17:00 ` Atish Patra 2023-01-12 15:47 ` Andrew Jones 2023-01-12 15:47 ` Andrew Jones 2022-12-15 17:00 ` [PATCH v2 09/11] RISC-V: KVM: Implement trap & emulate for hpmcounters Atish Patra 2022-12-15 17:00 ` Atish Patra 2023-01-13 11:47 ` Andrew Jones 2023-01-13 11:47 ` Andrew Jones 2022-12-15 17:00 ` [PATCH v2 10/11] RISC-V: KVM: Implement perf support without sampling Atish Patra 2022-12-15 17:00 ` Atish Patra 2023-01-13 11:45 ` Andrew Jones 2023-01-13 11:45 ` Andrew Jones 2023-01-23 7:23 ` Andrew Jones 2023-01-23 7:23 ` Andrew Jones 2023-01-26 0:50 ` Atish Patra 2023-01-26 0:50 ` Atish Patra 2022-12-15 17:00 ` [PATCH v2 11/11] RISC-V: KVM: Implement firmware events Atish Patra 2022-12-15 17:00 ` Atish Patra 2023-01-13 12:08 ` Andrew Jones 2023-01-13 12:08 ` Andrew Jones 2023-01-26 3:08 ` Atish Patra 2023-01-26 3:08 ` Atish Patra
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