From: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> To: "Philippe Mathieu-Daudé" <f4bug@amsat.org> Cc: "Paul Burton" <pburton@wavecomp.com>, "Sagar Karandikar" <sagark@eecs.berkeley.edu>, "Michael S. Tsirkin" <mst@redhat.com>, "Jason Wang" <jasowang@redhat.com>, "Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>, "QEMU Developers" <qemu-devel@nongnu.org>, "Alistair Francis" <Alistair.Francis@wdc.com>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, "Peter Maydell" <peter.maydell@linaro.org>, "Markus Armbruster" <armbru@redhat.com>, "Palmer Dabbelt" <palmer@dabbelt.com>, "Aleksandar Rikalo" <aleksandar.rikalo@rt-rk.com>, "Richard Henderson" <rth@twiddle.net>, "Philippe Mathieu-Daudé" <philmd@redhat.com>, "Eduardo Habkost" <ehabkost@redhat.com>, "Alistair Francis" <alistair@alistair23.me>, qemu-arm@nongnu.org, "David Gibson" <david@gibson.dropbear.id.au>, qemu-riscv@nongnu.org, "Bastian Koppelmann" <kbastian@mail.uni-paderborn.de>, "Andrew Baumann" <Andrew.Baumann@microsoft.com>, "Jean-Christophe Dubois" <jcd@tribudubois.net>, qemu-ppc@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>, "Aurelien Jarno" <aurelien@aurel32.net> Subject: Re: [PATCH-for-5.0 08/12] hw/mips/boston: Add missing error-propagation code Date: Fri, 27 Mar 2020 00:50:41 +0200 [thread overview] Message-ID: <CAHiYmc5WNE_044D0eTZnEbe-EfTBD1z0mH=RBOBpv265V7OOUQ@mail.gmail.com> (raw) In-Reply-To: <20200325191830.16553-9-f4bug@amsat.org> [-- Attachment #1: Type: text/plain, Size: 6523 bytes --] 21:18 Sre, 25.03.2020. Philippe Mathieu-Daudé <f4bug@amsat.org> је написао/ла: > > Running the coccinelle script produced: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments --smpl-spacing --dir hw > > [[manual check required: error_propagate() might be missing in object_property_set_int() hw/mips/boston.c:462:4]] > [[manual check required: error_propagate() might be missing in object_property_set_str() hw/mips/boston.c:460:4]] > > Since the uses are inside a MachineClass::init() function, > directly use &error_fatal instead of error_propagate(). > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > hw/mips/boston.c | 17 ++++++----------- > 1 file changed, 6 insertions(+), 11 deletions(-) > > diff --git a/hw/mips/boston.c b/hw/mips/boston.c > index 98ecd25e8e..2e821ca7d6 100644 > --- a/hw/mips/boston.c > +++ b/hw/mips/boston.c > @@ -425,121 +425,116 @@ xilinx_pcie_init(MemoryRegion *sys_mem, uint32_t bus_nr, > static void boston_mach_init(MachineState *machine) > { > DeviceState *dev; > BostonState *s; > - Error *err = NULL; > MemoryRegion *flash, *ddr_low_alias, *lcd, *platreg; > MemoryRegion *sys_mem = get_system_memory(); > XilinxPCIEHost *pcie2; > PCIDevice *ahci; > DriveInfo *hd[6]; > Chardev *chr; > int fw_size, fit_err; > bool is_64b; > > if ((machine->ram_size % GiB) || > (machine->ram_size > (2 * GiB))) { > error_report("Memory size must be 1GB or 2GB"); > exit(1); > } > > dev = qdev_create(NULL, TYPE_MIPS_BOSTON); > qdev_init_nofail(dev); > > s = BOSTON(dev); > s->mach = machine; > > if (!cpu_supports_cps_smp(machine->cpu_type)) { > error_report("Boston requires CPUs which support CPS"); > exit(1); > } > > is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64); > > sysbus_init_child_obj(OBJECT(machine), "cps", OBJECT(&s->cps), > sizeof(s->cps), TYPE_MIPS_CPS); > object_property_set_str(OBJECT(&s->cps), machine->cpu_type, "cpu-type", > - &err); > - object_property_set_int(OBJECT(&s->cps), machine->smp.cpus, "num-vp", &err); > - object_property_set_bool(OBJECT(&s->cps), true, "realized", &err); > - > - if (err != NULL) { > - error_report("%s", error_get_pretty(err)); > - exit(1); > - } > - > + &error_fatal); > + object_property_set_int(OBJECT(&s->cps), machine->smp.cpus, "num-vp", > + &error_fatal); > + object_property_set_bool(OBJECT(&s->cps), true, "realized", &error_fatal); > sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1); > > flash = g_new(MemoryRegion, 1); > - memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, &err); > + memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, > + &error_fatal); > memory_region_add_subregion_overlap(sys_mem, 0x18000000, flash, 0); > > memory_region_add_subregion_overlap(sys_mem, 0x80000000, machine->ram, 0); > > ddr_low_alias = g_new(MemoryRegion, 1); > memory_region_init_alias(ddr_low_alias, NULL, "boston_low.ddr", > machine->ram, 0, > MIN(machine->ram_size, (256 * MiB))); > memory_region_add_subregion_overlap(sys_mem, 0, ddr_low_alias, 0); > > xilinx_pcie_init(sys_mem, 0, > 0x10000000, 32 * MiB, > 0x40000000, 1 * GiB, > get_cps_irq(&s->cps, 2), false); > > xilinx_pcie_init(sys_mem, 1, > 0x12000000, 32 * MiB, > 0x20000000, 512 * MiB, > get_cps_irq(&s->cps, 1), false); > > pcie2 = xilinx_pcie_init(sys_mem, 2, > 0x14000000, 32 * MiB, > 0x16000000, 1 * MiB, > get_cps_irq(&s->cps, 0), true); > > platreg = g_new(MemoryRegion, 1); > memory_region_init_io(platreg, NULL, &boston_platreg_ops, s, > "boston-platregs", 0x1000); > memory_region_add_subregion_overlap(sys_mem, 0x17ffd000, platreg, 0); > > s->uart = serial_mm_init(sys_mem, 0x17ffe000, 2, > get_cps_irq(&s->cps, 3), 10000000, > serial_hd(0), DEVICE_NATIVE_ENDIAN); > > lcd = g_new(MemoryRegion, 1); > memory_region_init_io(lcd, NULL, &boston_lcd_ops, s, "boston-lcd", 0x8); > memory_region_add_subregion_overlap(sys_mem, 0x17fff000, lcd, 0); > > chr = qemu_chr_new("lcd", "vc:320x240", NULL); > qemu_chr_fe_init(&s->lcd_display, chr, NULL); > qemu_chr_fe_set_handlers(&s->lcd_display, NULL, NULL, > boston_lcd_event, NULL, s, NULL, true); > > ahci = pci_create_simple_multifunction(&PCI_BRIDGE(&pcie2->root)->sec_bus, > PCI_DEVFN(0, 0), > true, TYPE_ICH9_AHCI); > g_assert(ARRAY_SIZE(hd) == ahci_get_num_ports(ahci)); > ide_drive_get(hd, ahci_get_num_ports(ahci)); > ahci_ide_create_devs(ahci, hd); > > if (machine->firmware) { > fw_size = load_image_targphys(machine->firmware, > 0x1fc00000, 4 * MiB); > if (fw_size == -1) { > error_report("unable to load firmware image '%s'", > machine->firmware); > exit(1); > } > } else if (machine->kernel_filename) { > fit_err = load_fit(&boston_fit_loader, machine->kernel_filename, s); > if (fit_err) { > error_report("unable to load FIT image"); > exit(1); > } > > gen_firmware(memory_region_get_ram_ptr(flash) + 0x7c00000, > s->kernel_entry, s->fdt_base, is_64b); > } else if (!qtest_enabled()) { > error_report("Please provide either a -kernel or -bios argument"); > exit(1); > } > } > -- > 2.21.1 > Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> [-- Attachment #2: Type: text/html, Size: 8854 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> To: "Philippe Mathieu-Daudé" <f4bug@amsat.org> Cc: "QEMU Developers" <qemu-devel@nongnu.org>, "Alistair Francis" <alistair@alistair23.me>, "Paul Burton" <pburton@wavecomp.com>, "Palmer Dabbelt" <palmer@dabbelt.com>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, qemu-ppc@nongnu.org, "Jason Wang" <jasowang@redhat.com>, "Sagar Karandikar" <sagark@eecs.berkeley.edu>, "Richard Henderson" <rth@twiddle.net>, "Peter Maydell" <peter.maydell@linaro.org>, "Eduardo Habkost" <ehabkost@redhat.com>, "David Gibson" <david@gibson.dropbear.id.au>, "Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>, "Alistair Francis" <Alistair.Francis@wdc.com>, "Bastian Koppelmann" <kbastian@mail.uni-paderborn.de>, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, "Andrew Baumann" <Andrew.Baumann@microsoft.com>, "Jean-Christophe Dubois" <jcd@tribudubois.net>, "Michael S. Tsirkin" <mst@redhat.com>, "Markus Armbruster" <armbru@redhat.com>, "Aurelien Jarno" <aurelien@aurel32.net>, "Aleksandar Rikalo" <aleksandar.rikalo@rt-rk.com>, "Paolo Bonzini" <pbonzini@redhat.com>, "Philippe Mathieu-Daudé" <philmd@redhat.com>, "Marcel Apfelbaum" <marcel.apfelbaum@gmail.com> Subject: Re: [PATCH-for-5.0 08/12] hw/mips/boston: Add missing error-propagation code Date: Fri, 27 Mar 2020 00:50:41 +0200 [thread overview] Message-ID: <CAHiYmc5WNE_044D0eTZnEbe-EfTBD1z0mH=RBOBpv265V7OOUQ@mail.gmail.com> (raw) In-Reply-To: <20200325191830.16553-9-f4bug@amsat.org> [-- Attachment #1: Type: text/plain, Size: 6523 bytes --] 21:18 Sre, 25.03.2020. Philippe Mathieu-Daudé <f4bug@amsat.org> је написао/ла: > > Running the coccinelle script produced: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments --smpl-spacing --dir hw > > [[manual check required: error_propagate() might be missing in object_property_set_int() hw/mips/boston.c:462:4]] > [[manual check required: error_propagate() might be missing in object_property_set_str() hw/mips/boston.c:460:4]] > > Since the uses are inside a MachineClass::init() function, > directly use &error_fatal instead of error_propagate(). > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > hw/mips/boston.c | 17 ++++++----------- > 1 file changed, 6 insertions(+), 11 deletions(-) > > diff --git a/hw/mips/boston.c b/hw/mips/boston.c > index 98ecd25e8e..2e821ca7d6 100644 > --- a/hw/mips/boston.c > +++ b/hw/mips/boston.c > @@ -425,121 +425,116 @@ xilinx_pcie_init(MemoryRegion *sys_mem, uint32_t bus_nr, > static void boston_mach_init(MachineState *machine) > { > DeviceState *dev; > BostonState *s; > - Error *err = NULL; > MemoryRegion *flash, *ddr_low_alias, *lcd, *platreg; > MemoryRegion *sys_mem = get_system_memory(); > XilinxPCIEHost *pcie2; > PCIDevice *ahci; > DriveInfo *hd[6]; > Chardev *chr; > int fw_size, fit_err; > bool is_64b; > > if ((machine->ram_size % GiB) || > (machine->ram_size > (2 * GiB))) { > error_report("Memory size must be 1GB or 2GB"); > exit(1); > } > > dev = qdev_create(NULL, TYPE_MIPS_BOSTON); > qdev_init_nofail(dev); > > s = BOSTON(dev); > s->mach = machine; > > if (!cpu_supports_cps_smp(machine->cpu_type)) { > error_report("Boston requires CPUs which support CPS"); > exit(1); > } > > is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64); > > sysbus_init_child_obj(OBJECT(machine), "cps", OBJECT(&s->cps), > sizeof(s->cps), TYPE_MIPS_CPS); > object_property_set_str(OBJECT(&s->cps), machine->cpu_type, "cpu-type", > - &err); > - object_property_set_int(OBJECT(&s->cps), machine->smp.cpus, "num-vp", &err); > - object_property_set_bool(OBJECT(&s->cps), true, "realized", &err); > - > - if (err != NULL) { > - error_report("%s", error_get_pretty(err)); > - exit(1); > - } > - > + &error_fatal); > + object_property_set_int(OBJECT(&s->cps), machine->smp.cpus, "num-vp", > + &error_fatal); > + object_property_set_bool(OBJECT(&s->cps), true, "realized", &error_fatal); > sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1); > > flash = g_new(MemoryRegion, 1); > - memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, &err); > + memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, > + &error_fatal); > memory_region_add_subregion_overlap(sys_mem, 0x18000000, flash, 0); > > memory_region_add_subregion_overlap(sys_mem, 0x80000000, machine->ram, 0); > > ddr_low_alias = g_new(MemoryRegion, 1); > memory_region_init_alias(ddr_low_alias, NULL, "boston_low.ddr", > machine->ram, 0, > MIN(machine->ram_size, (256 * MiB))); > memory_region_add_subregion_overlap(sys_mem, 0, ddr_low_alias, 0); > > xilinx_pcie_init(sys_mem, 0, > 0x10000000, 32 * MiB, > 0x40000000, 1 * GiB, > get_cps_irq(&s->cps, 2), false); > > xilinx_pcie_init(sys_mem, 1, > 0x12000000, 32 * MiB, > 0x20000000, 512 * MiB, > get_cps_irq(&s->cps, 1), false); > > pcie2 = xilinx_pcie_init(sys_mem, 2, > 0x14000000, 32 * MiB, > 0x16000000, 1 * MiB, > get_cps_irq(&s->cps, 0), true); > > platreg = g_new(MemoryRegion, 1); > memory_region_init_io(platreg, NULL, &boston_platreg_ops, s, > "boston-platregs", 0x1000); > memory_region_add_subregion_overlap(sys_mem, 0x17ffd000, platreg, 0); > > s->uart = serial_mm_init(sys_mem, 0x17ffe000, 2, > get_cps_irq(&s->cps, 3), 10000000, > serial_hd(0), DEVICE_NATIVE_ENDIAN); > > lcd = g_new(MemoryRegion, 1); > memory_region_init_io(lcd, NULL, &boston_lcd_ops, s, "boston-lcd", 0x8); > memory_region_add_subregion_overlap(sys_mem, 0x17fff000, lcd, 0); > > chr = qemu_chr_new("lcd", "vc:320x240", NULL); > qemu_chr_fe_init(&s->lcd_display, chr, NULL); > qemu_chr_fe_set_handlers(&s->lcd_display, NULL, NULL, > boston_lcd_event, NULL, s, NULL, true); > > ahci = pci_create_simple_multifunction(&PCI_BRIDGE(&pcie2->root)->sec_bus, > PCI_DEVFN(0, 0), > true, TYPE_ICH9_AHCI); > g_assert(ARRAY_SIZE(hd) == ahci_get_num_ports(ahci)); > ide_drive_get(hd, ahci_get_num_ports(ahci)); > ahci_ide_create_devs(ahci, hd); > > if (machine->firmware) { > fw_size = load_image_targphys(machine->firmware, > 0x1fc00000, 4 * MiB); > if (fw_size == -1) { > error_report("unable to load firmware image '%s'", > machine->firmware); > exit(1); > } > } else if (machine->kernel_filename) { > fit_err = load_fit(&boston_fit_loader, machine->kernel_filename, s); > if (fit_err) { > error_report("unable to load FIT image"); > exit(1); > } > > gen_firmware(memory_region_get_ram_ptr(flash) + 0x7c00000, > s->kernel_entry, s->fdt_base, is_64b); > } else if (!qtest_enabled()) { > error_report("Please provide either a -kernel or -bios argument"); > exit(1); > } > } > -- > 2.21.1 > Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> [-- Attachment #2: Type: text/html, Size: 8854 bytes --]
next prev parent reply other threads:[~2020-03-26 22:52 UTC|newest] Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-03-25 19:18 [PATCH-for-5.0 00/12] hw: Add missing error-propagation code Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-25 19:18 ` [PATCH-for-5.0 01/12] scripts/coccinelle: Add script to catch missing error_propagate() calls Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-26 21:32 ` Peter Maydell 2020-03-26 21:32 ` Peter Maydell 2020-03-25 19:18 ` [PATCH-for-5.0 02/12] hw/arm/bcm2835_peripherals: Add missing error-propagation code Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-26 21:34 ` Peter Maydell 2020-03-26 21:34 ` Peter Maydell 2020-03-25 19:18 ` [PATCH-for-5.0 03/12] hw/arm/fsl-imx: " Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-26 21:35 ` Peter Maydell 2020-03-26 21:35 ` Peter Maydell 2020-03-25 19:18 ` [PATCH-for-5.0 04/12] hw/arm/stm32fx05_soc: " Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-25 20:51 ` Alistair Francis 2020-03-25 20:51 ` Alistair Francis 2020-03-26 21:45 ` Peter Maydell 2020-03-26 21:45 ` Peter Maydell 2020-03-25 19:18 ` [PATCH-for-5.0 05/12] hw/i386/x86: " Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-26 21:38 ` Peter Maydell 2020-03-26 21:38 ` Peter Maydell 2020-03-25 19:18 ` [PATCH-for-5.0 06/12] hw/dma/xilinx_axidma: " Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-25 20:52 ` Alistair Francis 2020-03-25 20:52 ` Alistair Francis 2020-03-26 21:46 ` Peter Maydell 2020-03-26 21:46 ` Peter Maydell 2020-03-25 19:18 ` [PATCH-for-5.0 07/12] hw/mips/cps: " Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-26 21:43 ` Peter Maydell 2020-03-26 21:43 ` Peter Maydell 2020-03-26 22:48 ` Aleksandar Markovic 2020-03-26 22:48 ` Aleksandar Markovic 2020-03-25 19:18 ` [PATCH-for-5.0 08/12] hw/mips/boston: " Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-26 21:47 ` Peter Maydell 2020-03-26 21:47 ` Peter Maydell 2020-03-26 22:50 ` Aleksandar Markovic [this message] 2020-03-26 22:50 ` Aleksandar Markovic 2020-03-25 19:18 ` [PATCH-for-5.0 09/12] hw/mips/mips_malta: " Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-26 21:49 ` Peter Maydell 2020-03-26 21:49 ` Peter Maydell 2020-03-26 22:49 ` Aleksandar Markovic 2020-03-26 22:49 ` Aleksandar Markovic 2020-03-25 19:18 ` [PATCH-for-5.0 10/12] hw/misc/macio/macio: " Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-25 23:55 ` David Gibson 2020-03-25 23:55 ` David Gibson 2020-03-26 21:50 ` Peter Maydell 2020-03-26 21:50 ` Peter Maydell 2020-03-25 19:18 ` [PATCH-for-5.0 11/12] hw/net/xilinx_axienet: " Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-25 20:52 ` Alistair Francis 2020-03-25 20:52 ` Alistair Francis 2020-03-26 21:51 ` Peter Maydell 2020-03-26 21:51 ` Peter Maydell 2020-03-25 19:18 ` [PATCH-for-5.0 12/12] hw/riscv/sifive_u: " Philippe Mathieu-Daudé 2020-03-25 19:18 ` Philippe Mathieu-Daudé 2020-03-25 20:52 ` Alistair Francis 2020-03-25 20:52 ` Alistair Francis 2020-03-26 21:55 ` Peter Maydell 2020-03-26 21:55 ` Peter Maydell 2020-03-31 17:02 ` Philippe Mathieu-Daudé 2020-03-31 17:02 ` Philippe Mathieu-Daudé 2020-03-31 17:03 ` Peter Maydell 2020-03-31 17:03 ` Peter Maydell 2020-03-25 19:20 ` [PATCH-for-5.0 00/12] hw: " Philippe Mathieu-Daudé 2020-03-25 19:20 ` Philippe Mathieu-Daudé 2020-03-30 9:21 ` Stefan Hajnoczi 2020-03-30 9:21 ` Stefan Hajnoczi 2020-04-06 17:47 ` Philippe Mathieu-Daudé 2020-04-06 17:47 ` Philippe Mathieu-Daudé 2020-03-31 13:23 ` Markus Armbruster 2020-03-31 13:23 ` Markus Armbruster 2020-04-03 17:53 ` Philippe Mathieu-Daudé 2020-04-03 17:53 ` Philippe Mathieu-Daudé 2020-04-04 5:55 ` Markus Armbruster 2020-04-04 5:55 ` Markus Armbruster
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