From: Alistair Francis <alistair23@gmail.com> To: "Philippe Mathieu-Daudé" <f4bug@amsat.org> Cc: Alistair Francis <alistair.francis@opensource.wdc.com>, "open list:RISC-V" <qemu-riscv@nongnu.org>, Bin Meng <bin.meng@windriver.com>, "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>, Alistair Francis <alistair.francis@wdc.com>, Palmer Dabbelt <palmer@dabbelt.com>, Bin Meng <bmeng.cn@gmail.com> Subject: Re: [PATCH 1/7] hw/intc: sifive_plic: Add a reset function Date: Fri, 10 Dec 2021 12:12:05 +1000 [thread overview] Message-ID: <CAKmqyKP37DKXzuDixY0123zVdU=NRODhH6MXapKrC4wtsNf39w@mail.gmail.com> (raw) In-Reply-To: <d4fb2710-a03c-0c33-fa7a-9279e63507ac@amsat.org> On Wed, Dec 8, 2021 at 10:00 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote: > > Hi Alistair, > > On 12/8/21 07:42, Alistair Francis wrote: > > From: Alistair Francis <alistair.francis@wdc.com> > > > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > > --- > > hw/intc/sifive_plic.c | 12 ++++++++++++ > > 1 file changed, 12 insertions(+) > > > > diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c > > index 877e76877c..35f097799a 100644 > > --- a/hw/intc/sifive_plic.c > > +++ b/hw/intc/sifive_plic.c > > @@ -355,6 +355,17 @@ static const MemoryRegionOps sifive_plic_ops = { > > } > > }; > > > > +static void sifive_plic_reset(DeviceState *dev) > > +{ > > + SiFivePLICState *s = SIFIVE_PLIC(dev); > > + > > + memset(s->source_priority, 0, sizeof(uint32_t) * s->num_sources); > > + memset(s->target_priority, 0, sizeof(uint32_t) * s->num_addrs); > > + memset(s->pending, 0, sizeof(uint32_t) * s->bitfield_words); > > + memset(s->claimed, 0, sizeof(uint32_t) * s->bitfield_words); > > + memset(s->enable, 0, sizeof(uint32_t) * s->num_enables); > > Looking at sifive_plic_realize(): > > - Should we reset the external IRQs in a default state? Good point, I'll add that. > - Shouldn't riscv_cpu_claim_interrupts() be called at reset? I don't think so. riscv_cpu_claim_interrupts is a once and done call. Alistair > > Note: parse_hart_config() name is slightly confusing since > beside parsing, it also allocates addr_config. Maybe consider > renaming?
WARNING: multiple messages have this Message-ID (diff)
From: Alistair Francis <alistair23@gmail.com> To: "Philippe Mathieu-Daudé" <f4bug@amsat.org> Cc: Alistair Francis <alistair.francis@opensource.wdc.com>, "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>, "open list:RISC-V" <qemu-riscv@nongnu.org>, Palmer Dabbelt <palmer@dabbelt.com>, Bin Meng <bin.meng@windriver.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bmeng.cn@gmail.com> Subject: Re: [PATCH 1/7] hw/intc: sifive_plic: Add a reset function Date: Fri, 10 Dec 2021 12:12:05 +1000 [thread overview] Message-ID: <CAKmqyKP37DKXzuDixY0123zVdU=NRODhH6MXapKrC4wtsNf39w@mail.gmail.com> (raw) In-Reply-To: <d4fb2710-a03c-0c33-fa7a-9279e63507ac@amsat.org> On Wed, Dec 8, 2021 at 10:00 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote: > > Hi Alistair, > > On 12/8/21 07:42, Alistair Francis wrote: > > From: Alistair Francis <alistair.francis@wdc.com> > > > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > > --- > > hw/intc/sifive_plic.c | 12 ++++++++++++ > > 1 file changed, 12 insertions(+) > > > > diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c > > index 877e76877c..35f097799a 100644 > > --- a/hw/intc/sifive_plic.c > > +++ b/hw/intc/sifive_plic.c > > @@ -355,6 +355,17 @@ static const MemoryRegionOps sifive_plic_ops = { > > } > > }; > > > > +static void sifive_plic_reset(DeviceState *dev) > > +{ > > + SiFivePLICState *s = SIFIVE_PLIC(dev); > > + > > + memset(s->source_priority, 0, sizeof(uint32_t) * s->num_sources); > > + memset(s->target_priority, 0, sizeof(uint32_t) * s->num_addrs); > > + memset(s->pending, 0, sizeof(uint32_t) * s->bitfield_words); > > + memset(s->claimed, 0, sizeof(uint32_t) * s->bitfield_words); > > + memset(s->enable, 0, sizeof(uint32_t) * s->num_enables); > > Looking at sifive_plic_realize(): > > - Should we reset the external IRQs in a default state? Good point, I'll add that. > - Shouldn't riscv_cpu_claim_interrupts() be called at reset? I don't think so. riscv_cpu_claim_interrupts is a once and done call. Alistair > > Note: parse_hart_config() name is slightly confusing since > beside parsing, it also allocates addr_config. Maybe consider > renaming?
next prev parent reply other threads:[~2021-12-10 2:14 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-12-08 6:42 [PATCH 0/7] A collection of RISC-V cleanups and improvements Alistair Francis 2021-12-08 6:42 ` [PATCH 1/7] hw/intc: sifive_plic: Add a reset function Alistair Francis 2021-12-08 12:00 ` Philippe Mathieu-Daudé 2021-12-08 12:00 ` Philippe Mathieu-Daudé 2021-12-10 2:12 ` Alistair Francis [this message] 2021-12-10 2:12 ` Alistair Francis 2021-12-08 6:42 ` [PATCH 2/7] hw/intc: sifive_plic: Cleanup the write function Alistair Francis 2021-12-08 17:30 ` Richard Henderson 2021-12-08 17:30 ` Richard Henderson 2021-12-08 6:42 ` [PATCH 3/7] hw/intc: sifive_plic: Cleanup the read function Alistair Francis 2021-12-08 6:42 ` [PATCH 4/7] hw/intc: sifive_plic: Cleanup remaining functions Alistair Francis 2021-12-08 6:42 ` [PATCH 5/7] target/riscv: Mark the Hypervisor extension as non experimental Alistair Francis 2021-12-08 6:42 ` [PATCH 6/7] target/riscv: Enable the Hypervisor extension by default Alistair Francis 2021-12-08 6:42 ` [PATCH 7/7] hw/riscv: Use error_fatal for SoC realisation Alistair Francis 2021-12-08 11:51 ` Philippe Mathieu-Daudé 2021-12-08 11:51 ` Philippe Mathieu-Daudé 2021-12-10 7:10 ` Markus Armbruster 2021-12-10 7:10 ` Markus Armbruster
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to='CAKmqyKP37DKXzuDixY0123zVdU=NRODhH6MXapKrC4wtsNf39w@mail.gmail.com' \ --to=alistair23@gmail.com \ --cc=alistair.francis@opensource.wdc.com \ --cc=alistair.francis@wdc.com \ --cc=bin.meng@windriver.com \ --cc=bmeng.cn@gmail.com \ --cc=f4bug@amsat.org \ --cc=palmer@dabbelt.com \ --cc=qemu-devel@nongnu.org \ --cc=qemu-riscv@nongnu.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.