From: Geert Uytterhoeven <geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org> To: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Cc: Grygorii Strashko <grygorii.strashko-l0cyMroinI0@public.gmane.org>, Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>, Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>, Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>, Jiang Liu <jiang.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>, Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>, Kevin Hilman <khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>, Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>, Soren Brinkmann <soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>, "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, "linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" <linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> Subject: Re: [RFC PATCH V2 2/8] irqdomain: Don't set type when mapping an IRQ Date: Fri, 18 Mar 2016 10:16:07 +0100 [thread overview] Message-ID: <CAMuHMdULUMy2oi3fXVT-DNXAOg+KqjOVFAW2+CLVCDYFcjKO1w@mail.gmail.com> (raw) In-Reply-To: <56793A5B.4040302-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> On Tue, Dec 22, 2015 at 12:56 PM, Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote: > On 22/12/15 11:18, Grygorii Strashko wrote: >> On 12/17/2015 12:48 PM, Jon Hunter wrote: >>> Some IRQ chips, such as GPIO controllers or secondary level interrupt >>> controllers, may require require additional runtime power management >>> control to ensure they are accessible. For such IRQ chips, it makes sense >>> to enable the IRQ chip when interrupts are requested and disabled them >>> again once all interrupts have been freed. >>> >>> When mapping an IRQ, the IRQ type settings are read and then programmed. >>> The mapping of the IRQ happens before the IRQ is requested and so the >>> programming of the type settings occurs before the IRQ is requested. This >>> is a problem for IRQ chips that require additional power management >>> control because they may not be accessible yet. Therefore, when mapping >>> the IRQ, don't program the type settings, just save them and then program >>> these saved settings when the IRQ is requested (so long as if they are not >>> overridden via the call to request the IRQ). >>> >>> Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> >> This patch has side effect - some boards which have >> ARM TWD timer will produce below backtrace on boot: >> >> genirq: Setting trigger mode 4 for irq 17 failed (gic_set_type+0x0/0x58) >> twd: can't register interrupt 17 (-22) >> ------------[ cut here ]------------ >> WARNING: CPU: 0 PID: 0 at arch/arm/kernel/smp_twd.c:405 twd_local_timer_of_register+0x68/0x7c() >> This happens, most probably, because TWD IRQs definitions in DT >> do not corresponds HW and gic_configure_irq() will return -EINVAL >> example (am4372.dtsi): >> local_timer: timer@48240600 { >> compatible = "arm,cortex-a9-twd-timer"; >> reg = <0x48240600 0x100>; >> interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; >> interrupt-parent = <&gic>; >> clocks = <&mpu_periphclk>; >> status = "disabled"; >> }; > > > Hmm ... that's interesting. Looking at the GIC documentation, it does > say that it is "implementation defined" whether you can program the type > bit for a PPI. Therefore, I am wondering if we should convert the error > into a WARN instead? It would be hard to know which of the below would > be impacted from just looking at the DT files. > >> So, some additional fixes might be required. Potentially problematic files are: >> arch/arm/boot/dts/r8a7779.dts >> arch/arm/boot/dts/sh73a0.dtsi The above two are affected. Sending patches... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert@linux-m68k.org> To: Jon Hunter <jonathanh@nvidia.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com>, Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Marc Zyngier <marc.zyngier@arm.com>, Jiang Liu <jiang.liu@linux.intel.com>, Stephen Warren <swarren@wwwdotorg.org>, Thierry Reding <thierry.reding@gmail.com>, Kevin Hilman <khilman@kernel.org>, Lars-Peter Clausen <lars@metafoo.de>, Linus Walleij <linus.walleij@linaro.org>, Soren Brinkmann <soren.brinkmann@xilinx.com>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, linux-tegra@vger.kernel.org, "linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org> Subject: Re: [RFC PATCH V2 2/8] irqdomain: Don't set type when mapping an IRQ Date: Fri, 18 Mar 2016 10:16:07 +0100 [thread overview] Message-ID: <CAMuHMdULUMy2oi3fXVT-DNXAOg+KqjOVFAW2+CLVCDYFcjKO1w@mail.gmail.com> (raw) In-Reply-To: <56793A5B.4040302@nvidia.com> On Tue, Dec 22, 2015 at 12:56 PM, Jon Hunter <jonathanh@nvidia.com> wrote: > On 22/12/15 11:18, Grygorii Strashko wrote: >> On 12/17/2015 12:48 PM, Jon Hunter wrote: >>> Some IRQ chips, such as GPIO controllers or secondary level interrupt >>> controllers, may require require additional runtime power management >>> control to ensure they are accessible. For such IRQ chips, it makes sense >>> to enable the IRQ chip when interrupts are requested and disabled them >>> again once all interrupts have been freed. >>> >>> When mapping an IRQ, the IRQ type settings are read and then programmed. >>> The mapping of the IRQ happens before the IRQ is requested and so the >>> programming of the type settings occurs before the IRQ is requested. This >>> is a problem for IRQ chips that require additional power management >>> control because they may not be accessible yet. Therefore, when mapping >>> the IRQ, don't program the type settings, just save them and then program >>> these saved settings when the IRQ is requested (so long as if they are not >>> overridden via the call to request the IRQ). >>> >>> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> >> This patch has side effect - some boards which have >> ARM TWD timer will produce below backtrace on boot: >> >> genirq: Setting trigger mode 4 for irq 17 failed (gic_set_type+0x0/0x58) >> twd: can't register interrupt 17 (-22) >> ------------[ cut here ]------------ >> WARNING: CPU: 0 PID: 0 at arch/arm/kernel/smp_twd.c:405 twd_local_timer_of_register+0x68/0x7c() >> This happens, most probably, because TWD IRQs definitions in DT >> do not corresponds HW and gic_configure_irq() will return -EINVAL >> example (am4372.dtsi): >> local_timer: timer@48240600 { >> compatible = "arm,cortex-a9-twd-timer"; >> reg = <0x48240600 0x100>; >> interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; >> interrupt-parent = <&gic>; >> clocks = <&mpu_periphclk>; >> status = "disabled"; >> }; > > > Hmm ... that's interesting. Looking at the GIC documentation, it does > say that it is "implementation defined" whether you can program the type > bit for a PPI. Therefore, I am wondering if we should convert the error > into a WARN instead? It would be hard to know which of the below would > be impacted from just looking at the DT files. > >> So, some additional fixes might be required. Potentially problematic files are: >> arch/arm/boot/dts/r8a7779.dts >> arch/arm/boot/dts/sh73a0.dtsi The above two are affected. Sending patches... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
next prev parent reply other threads:[~2016-03-18 9:16 UTC|newest] Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-12-17 10:48 [RFC PATCH V2 0/8] Add support for Tegra210 AGIC Jon Hunter 2015-12-17 10:48 ` Jon Hunter 2015-12-17 10:48 ` [RFC PATCH V2 1/8] irqdomain: Ensure type settings match for an existing mapping Jon Hunter 2015-12-17 10:48 ` Jon Hunter 2015-12-17 13:16 ` Linus Walleij [not found] ` <CACRpkdYPvMfqou7t9K_5=Ojx3U_sc8B2Zkxgeu=1JXxCUU_E2Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2015-12-18 10:10 ` Jon Hunter 2015-12-18 10:10 ` Jon Hunter 2015-12-22 9:58 ` Linus Walleij [not found] ` <CACRpkdbjRiW8gcZcifHLELjBukpsCKyTQ+NpP51+v3kYLDcPHA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2015-12-22 10:00 ` Linus Walleij 2015-12-22 10:00 ` Linus Walleij [not found] ` <CACRpkdasLeVyE7MXyJ=LQHSYxUDE77VttX_TdqMV6afgk_NqrQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2015-12-22 11:27 ` Jon Hunter 2015-12-22 11:27 ` Jon Hunter 2015-12-22 11:31 ` Grygorii Strashko 2015-12-22 11:31 ` Grygorii Strashko [not found] ` <1450349309-8107-1-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2015-12-17 10:48 ` [RFC PATCH V2 2/8] irqdomain: Don't set type when mapping an IRQ Jon Hunter 2015-12-17 10:48 ` Jon Hunter [not found] ` <1450349309-8107-3-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2015-12-17 12:18 ` Linus Walleij 2015-12-17 12:18 ` Linus Walleij 2015-12-22 11:18 ` Grygorii Strashko 2015-12-22 11:18 ` Grygorii Strashko [not found] ` <56793191.30502-l0cyMroinI0@public.gmane.org> 2015-12-22 11:56 ` Jon Hunter 2015-12-22 11:56 ` Jon Hunter [not found] ` <56793A5B.4040302-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-03-18 9:16 ` Geert Uytterhoeven [this message] 2016-03-18 9:16 ` Geert Uytterhoeven 2015-12-17 10:48 ` [RFC PATCH V2 3/8] genirq: Add runtime power management support for IRQ chips Jon Hunter 2015-12-17 10:48 ` Jon Hunter 2015-12-17 13:19 ` Linus Walleij 2015-12-18 10:20 ` Jon Hunter 2016-01-12 18:40 ` Grygorii Strashko 2016-01-12 18:40 ` Grygorii Strashko 2016-01-12 21:43 ` Sören Brinkmann 2016-01-12 21:43 ` Sören Brinkmann [not found] ` <1450349309-8107-4-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-01-18 14:47 ` Ulf Hansson 2016-01-18 14:47 ` Ulf Hansson 2016-01-19 10:43 ` Jon Hunter 2016-01-20 15:30 ` Thomas Gleixner 2016-01-21 8:38 ` Jon Hunter 2016-01-21 8:38 ` Jon Hunter 2016-01-21 12:40 ` Ulf Hansson 2016-01-21 12:40 ` Ulf Hansson 2016-01-21 12:40 ` Ulf Hansson 2016-01-21 19:51 ` Thomas Gleixner 2016-01-22 11:08 ` Ulf Hansson 2016-01-22 11:08 ` Ulf Hansson 2016-01-26 17:17 ` Thomas Gleixner 2016-02-05 14:37 ` Linus Walleij 2016-02-05 14:37 ` Linus Walleij [not found] ` <CACRpkdbE-Ny585yK+DBkNENpWyk8rSEvdRdvLgMTCBp13grp4w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-03-18 13:57 ` Grygorii Strashko 2016-03-18 13:57 ` Grygorii Strashko 2015-12-17 10:48 ` [RFC PATCH V2 4/8] irqchip/gic: Don't initialise chip if mapping IO space fails Jon Hunter 2015-12-17 10:48 ` Jon Hunter [not found] ` <1450349309-8107-5-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2015-12-17 13:21 ` Linus Walleij 2015-12-17 13:21 ` Linus Walleij 2015-12-17 10:48 ` [RFC PATCH V2 5/8] irqchip/gic: Return an error if GIC initialisation fails Jon Hunter 2015-12-17 10:48 ` Jon Hunter [not found] ` <1450349309-8107-6-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2015-12-17 13:26 ` Linus Walleij 2015-12-17 13:26 ` Linus Walleij [not found] ` <CACRpkdaw+DM5ddi27UpJEg-+3A3ffS7k_Qnm4i-w2rLhpxp+8g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2015-12-18 10:24 ` Jon Hunter 2015-12-18 10:24 ` Jon Hunter 2015-12-17 10:48 ` [RFC PATCH V2 6/8] irqchip/gic: Assign irqchip dynamically Jon Hunter 2015-12-17 10:48 ` Jon Hunter [not found] ` <1450349309-8107-7-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2015-12-17 11:00 ` Marc Zyngier 2015-12-17 11:00 ` Marc Zyngier [not found] ` <567295B5.8050900-5wv7dgnIgG8@public.gmane.org> 2015-12-18 10:26 ` Jon Hunter 2015-12-18 10:26 ` Jon Hunter 2015-12-17 10:48 ` [RFC PATCH V2 7/8] irqchip/gic: Prepare for adding platform driver Jon Hunter 2015-12-17 10:48 ` Jon Hunter 2015-12-17 10:48 ` [RFC PATCH V2 8/8] irqchip/gic: Add support for tegra AGIC interrupt controller Jon Hunter 2015-12-17 10:48 ` Jon Hunter 2015-12-17 10:58 ` Jon Hunter 2015-12-17 10:58 ` Jon Hunter [not found] ` <1450349309-8107-9-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2015-12-17 13:32 ` Linus Walleij 2015-12-17 13:32 ` Linus Walleij 2015-12-18 10:44 ` Jon Hunter [not found] ` <5673E38B.7060702-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2015-12-22 10:03 ` Linus Walleij 2015-12-22 10:03 ` Linus Walleij
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