From: Geert Uytterhoeven <geert@linux-m68k.org> To: Conor Dooley <conor.dooley@microchip.com> Cc: "Linus Walleij" <linus.walleij@linaro.org>, "Bartosz Golaszewski" <bgolaszewski@baylibre.com>, "Rob Herring" <robh+dt@kernel.org>, "Jassi Brar" <jassisinghbrar@gmail.com>, "Paul Walmsley" <paul.walmsley@sifive.com>, "Palmer Dabbelt" <palmer@dabbelt.com>, "Albert Ou" <aou@eecs.berkeley.edu>, "Alessandro Zummo" <a.zummo@towertech.it>, "Alexandre Belloni" <alexandre.belloni@bootlin.com>, "Mark Brown" <broonie@kernel.org>, "Greg KH" <gregkh@linuxfoundation.org>, "Thierry Reding" <thierry.reding@gmail.com>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Lee Jones" <lee.jones@linaro.org>, "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>, "Linux I2C" <linux-i2c@vger.kernel.org>, "Linux PWM List" <linux-pwm@vger.kernel.org>, linux-riscv <linux-riscv@lists.infradead.org>, "Linux Crypto Mailing List" <linux-crypto@vger.kernel.org>, linux-rtc@vger.kernel.org, linux-spi <linux-spi@vger.kernel.org>, "USB list" <linux-usb@vger.kernel.org>, "Krzysztof Kozlowski" <krzysztof.kozlowski@canonical.com>, "Bin Meng" <bin.meng@windriver.com>, "Heiko Stuebner" <heiko@sntech.de>, "Lewis Hanly" <lewis.hanly@microchip.com>, daire.mcnamara@microchip.com, ivan.griffin@microchip.com, "Atish Patra" <atish.patra@wdc.com> Subject: Re: [PATCH v2 13/17] riscv: dts: microchip: use hart and clk defines for icicle kit Date: Fri, 17 Dec 2021 14:40:28 +0100 [thread overview] Message-ID: <CAMuHMdUYUEpU4bFobK=fpVDGzwAHQWJ=dvPVmp20DUTLSe+DRw@mail.gmail.com> (raw) In-Reply-To: <20211217093325.30612-14-conor.dooley@microchip.com> Hi Conor, Thanks for your patch! On Fri, Dec 17, 2021 at 10:33 AM <conor.dooley@microchip.com> wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > Update the Microchip Icicle kit device tree by replacing interrupt and > clock related magic numbers with their defined counterparts. Usually we make a distinction between (a) numbers that can be looked up easily in a datasheet, and (b) numbers that were made up because we needed some mapping. Of course both types of numbers are fixed, and cannot be changed. For (a), we tend to use the hardcoded numbers in the DTS files, to avoid reviewers having to go through another layer of indirection (i.e. does the number for the define match the number in the datasheet?). For (b), we use the defines, as there is no other official place to look up the numbers. > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > @@ -2,6 +2,8 @@ > /* Copyright (c) 2020 Microchip Technology Inc */ > > /dts-v1/; > +#include "dt-bindings/clock/microchip,mpfs-clock.h" The clock numbers we're made-up, so they fall under (b). > +#include "dt-bindings/interrupt-controller/riscv-hart.h" I believe these are just the official CLIC interrupt IDs, so they fall under (a)? > @@ -165,11 +167,16 @@ cache-controller@2010000 { > clint@2000000 { > compatible = "sifive,fu540-c000-clint", "sifive,clint0"; > reg = <0x0 0x2000000 0x0 0xC000>; > - interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, > - <&cpu1_intc 3>, <&cpu1_intc 7>, > - <&cpu2_intc 3>, <&cpu2_intc 7>, > - <&cpu3_intc 3>, <&cpu3_intc 7>, > - <&cpu4_intc 3>, <&cpu4_intc 7>; > + interrupts-extended = <&cpu0_intc HART_INT_M_SOFT>, > + <&cpu0_intc HART_INT_M_TIMER>, > + <&cpu1_intc HART_INT_M_SOFT>, > + <&cpu1_intc HART_INT_M_TIMER>, > + <&cpu2_intc HART_INT_M_SOFT>, > + <&cpu2_intc HART_INT_M_TIMER>, > + <&cpu3_intc HART_INT_M_SOFT>, > + <&cpu3_intc HART_INT_M_TIMER>, > + <&cpu4_intc HART_INT_M_SOFT>, > + <&cpu4_intc HART_INT_M_TIMER>; Hence I'm not sure we want changes like this? > }; > > plic: interrupt-controller@c000000 { }; > > @@ -210,7 +221,7 @@ serial0: serial@20000000 { > interrupt-parent = <&plic>; > interrupts = <90>; > current-speed = <115200>; > - clocks = <&clkcfg 8>; > + clocks = <&clkcfg CLK_MMUART0>; But this change is fine. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert@linux-m68k.org> To: Conor Dooley <conor.dooley@microchip.com> Cc: "Linus Walleij" <linus.walleij@linaro.org>, "Bartosz Golaszewski" <bgolaszewski@baylibre.com>, "Rob Herring" <robh+dt@kernel.org>, "Jassi Brar" <jassisinghbrar@gmail.com>, "Paul Walmsley" <paul.walmsley@sifive.com>, "Palmer Dabbelt" <palmer@dabbelt.com>, "Albert Ou" <aou@eecs.berkeley.edu>, "Alessandro Zummo" <a.zummo@towertech.it>, "Alexandre Belloni" <alexandre.belloni@bootlin.com>, "Mark Brown" <broonie@kernel.org>, "Greg KH" <gregkh@linuxfoundation.org>, "Thierry Reding" <thierry.reding@gmail.com>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Lee Jones" <lee.jones@linaro.org>, "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>, "Linux I2C" <linux-i2c@vger.kernel.org>, "Linux PWM List" <linux-pwm@vger.kernel.org>, linux-riscv <linux-riscv@lists.infradead.org>, "Linux Crypto Mailing List" <linux-crypto@vger.kernel.org>, linux-rtc@vger.kernel.org, linux-spi <linux-spi@vger.kernel.org>, "USB list" <linux-usb@vger.kernel.org>, "Krzysztof Kozlowski" <krzysztof.kozlowski@canonical.com>, "Bin Meng" <bin.meng@windriver.com>, "Heiko Stuebner" <heiko@sntech.de>, "Lewis Hanly" <lewis.hanly@microchip.com>, daire.mcnamara@microchip.com, ivan.griffin@microchip.com, "Atish Patra" <atish.patra@wdc.com> Subject: Re: [PATCH v2 13/17] riscv: dts: microchip: use hart and clk defines for icicle kit Date: Fri, 17 Dec 2021 14:40:28 +0100 [thread overview] Message-ID: <CAMuHMdUYUEpU4bFobK=fpVDGzwAHQWJ=dvPVmp20DUTLSe+DRw@mail.gmail.com> (raw) In-Reply-To: <20211217093325.30612-14-conor.dooley@microchip.com> Hi Conor, Thanks for your patch! On Fri, Dec 17, 2021 at 10:33 AM <conor.dooley@microchip.com> wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > Update the Microchip Icicle kit device tree by replacing interrupt and > clock related magic numbers with their defined counterparts. Usually we make a distinction between (a) numbers that can be looked up easily in a datasheet, and (b) numbers that were made up because we needed some mapping. Of course both types of numbers are fixed, and cannot be changed. For (a), we tend to use the hardcoded numbers in the DTS files, to avoid reviewers having to go through another layer of indirection (i.e. does the number for the define match the number in the datasheet?). For (b), we use the defines, as there is no other official place to look up the numbers. > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > @@ -2,6 +2,8 @@ > /* Copyright (c) 2020 Microchip Technology Inc */ > > /dts-v1/; > +#include "dt-bindings/clock/microchip,mpfs-clock.h" The clock numbers we're made-up, so they fall under (b). > +#include "dt-bindings/interrupt-controller/riscv-hart.h" I believe these are just the official CLIC interrupt IDs, so they fall under (a)? > @@ -165,11 +167,16 @@ cache-controller@2010000 { > clint@2000000 { > compatible = "sifive,fu540-c000-clint", "sifive,clint0"; > reg = <0x0 0x2000000 0x0 0xC000>; > - interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, > - <&cpu1_intc 3>, <&cpu1_intc 7>, > - <&cpu2_intc 3>, <&cpu2_intc 7>, > - <&cpu3_intc 3>, <&cpu3_intc 7>, > - <&cpu4_intc 3>, <&cpu4_intc 7>; > + interrupts-extended = <&cpu0_intc HART_INT_M_SOFT>, > + <&cpu0_intc HART_INT_M_TIMER>, > + <&cpu1_intc HART_INT_M_SOFT>, > + <&cpu1_intc HART_INT_M_TIMER>, > + <&cpu2_intc HART_INT_M_SOFT>, > + <&cpu2_intc HART_INT_M_TIMER>, > + <&cpu3_intc HART_INT_M_SOFT>, > + <&cpu3_intc HART_INT_M_TIMER>, > + <&cpu4_intc HART_INT_M_SOFT>, > + <&cpu4_intc HART_INT_M_TIMER>; Hence I'm not sure we want changes like this? > }; > > plic: interrupt-controller@c000000 { }; > > @@ -210,7 +221,7 @@ serial0: serial@20000000 { > interrupt-parent = <&plic>; > interrupts = <90>; > current-speed = <115200>; > - clocks = <&clkcfg 8>; > + clocks = <&clkcfg CLK_MMUART0>; But this change is fine. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2021-12-17 13:40 UTC|newest] Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-12-17 9:33 [PATCH v2 00/17] Update the Icicle Kit device tree conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 9:33 ` [PATCH v2 01/17] dt-bindings: interrupt-controller: create a header for RISC-V interrupts conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-21 17:47 ` Rob Herring 2021-12-21 17:47 ` Rob Herring 2021-12-17 9:33 ` [PATCH v2 02/17] dt-bindings: soc/microchip: update syscontroller compatibles conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 13:24 ` Geert Uytterhoeven 2021-12-17 13:24 ` Geert Uytterhoeven 2021-12-17 14:21 ` Rob Herring 2021-12-17 14:21 ` Rob Herring 2021-12-17 9:33 ` [PATCH v2 03/17] dt-bindings: soc/microchip: make systemcontroller a mfd conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-21 17:55 ` Rob Herring 2021-12-21 17:55 ` Rob Herring 2021-12-21 23:50 ` conor dooley 2021-12-21 23:50 ` conor dooley 2021-12-17 9:33 ` [PATCH v2 04/17] mailbox: change mailbox-mpfs compatible string conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 13:25 ` Geert Uytterhoeven 2021-12-17 13:25 ` Geert Uytterhoeven 2021-12-17 9:33 ` [PATCH v2 05/17] dt-bindings: i2c: add bindings for microchip mpfs i2c conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 14:21 ` Rob Herring 2021-12-17 14:21 ` Rob Herring 2021-12-17 9:33 ` [PATCH v2 06/17] dt-bindings: rng: add bindings for microchip mpfs rng conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 14:53 ` Krzysztof Kozlowski 2021-12-17 14:53 ` Krzysztof Kozlowski 2021-12-17 15:07 ` Krzysztof Kozlowski 2021-12-17 15:07 ` Krzysztof Kozlowski 2021-12-17 15:22 ` Conor.Dooley 2021-12-17 15:22 ` Conor.Dooley 2021-12-17 15:47 ` Krzysztof Kozlowski 2021-12-17 15:47 ` Krzysztof Kozlowski 2021-12-17 16:26 ` conor dooley 2021-12-17 16:26 ` conor dooley 2021-12-17 9:33 ` [PATCH v2 07/17] dt-bindings: rtc: add bindings for microchip mpfs rtc conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 14:21 ` Rob Herring 2021-12-17 14:21 ` Rob Herring 2021-12-20 14:37 ` Rob Herring 2021-12-20 14:37 ` Rob Herring 2021-12-17 9:33 ` [PATCH v2 08/17] dt-bindings: soc/microchip: add bindings for mpfs system services conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 9:33 ` [PATCH v2 09/17] dt-bindings: gpio: add bindings for microchip mpfs gpio conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 14:21 ` Rob Herring 2021-12-17 14:21 ` Rob Herring 2021-12-17 9:33 ` [PATCH v2 10/17] dt-bindings: spi: add bindings for microchip mpfs spi conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 11:17 ` Mark Brown 2021-12-17 11:17 ` Mark Brown 2021-12-17 11:40 ` Conor.Dooley 2021-12-17 11:40 ` Conor.Dooley 2021-12-17 11:43 ` Mark Brown 2021-12-17 11:43 ` Mark Brown 2021-12-20 8:05 ` Conor.Dooley 2021-12-20 8:05 ` Conor.Dooley 2021-12-17 14:21 ` Rob Herring 2021-12-17 14:21 ` Rob Herring 2021-12-17 9:33 ` [PATCH v2 11/17] dt-bindings: usb: add bindings for microchip mpfs musb conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 14:21 ` Rob Herring 2021-12-17 14:21 ` Rob Herring 2021-12-21 13:32 ` Rob Herring 2021-12-21 13:32 ` Rob Herring 2021-12-17 9:33 ` [PATCH v2 12/17] dt-bindings: pwm: add microchip corePWM binding conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 14:21 ` Rob Herring 2021-12-17 14:21 ` Rob Herring 2021-12-17 14:58 ` Krzysztof Kozlowski 2021-12-17 14:58 ` Krzysztof Kozlowski 2021-12-17 9:33 ` [PATCH v2 13/17] riscv: dts: microchip: use hart and clk defines for icicle kit conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 13:40 ` Geert Uytterhoeven [this message] 2021-12-17 13:40 ` Geert Uytterhoeven 2021-12-17 9:33 ` [PATCH v2 14/17] riscv: dts: microchip: add fpga fabric section to " conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 13:43 ` Geert Uytterhoeven 2021-12-17 13:43 ` Geert Uytterhoeven 2021-12-17 15:32 ` Conor.Dooley 2021-12-17 15:32 ` Conor.Dooley 2021-12-17 16:00 ` Geert Uytterhoeven 2021-12-17 16:00 ` Geert Uytterhoeven 2022-01-12 9:38 ` Conor.Dooley 2022-01-12 9:38 ` Conor.Dooley 2022-01-14 13:35 ` Conor.Dooley 2022-01-14 13:35 ` Conor.Dooley 2021-12-17 14:59 ` Krzysztof Kozlowski 2021-12-17 14:59 ` Krzysztof Kozlowski 2021-12-17 9:33 ` [PATCH v2 15/17] riscv: dts: microchip: refactor icicle kit device tree conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 15:04 ` Krzysztof Kozlowski 2021-12-17 15:04 ` Krzysztof Kozlowski 2021-12-17 15:23 ` Conor.Dooley 2021-12-17 15:23 ` Conor.Dooley 2021-12-17 9:33 ` [PATCH v2 16/17] riscv: dts: microchip: update peripherals in " conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 9:33 ` [PATCH v2 17/17] MAINTAINERS: update riscv/microchip entry conor.dooley 2021-12-17 9:33 ` conor.dooley 2021-12-17 15:09 ` Krzysztof Kozlowski 2021-12-17 15:09 ` Krzysztof Kozlowski 2021-12-23 14:56 ` Conor.Dooley 2021-12-23 14:56 ` Conor.Dooley 2021-12-23 17:36 ` Palmer Dabbelt 2021-12-23 17:36 ` Palmer Dabbelt 2022-01-12 13:32 ` Lewis.Hanly 2022-01-12 13:32 ` Lewis.Hanly 2021-12-17 9:48 ` [PATCH v2 00/17] Update the Icicle Kit device tree Geert Uytterhoeven 2021-12-17 9:48 ` Geert Uytterhoeven
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