[PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Chris Brandt]

The RZ/A2 uses a modified SCIF that until recently was only used in
Renesas MCU devices (not MPU devices).
So, while it functions mostly the same as a normal SCIF, some things
needed to be shifted around.

In the end, a standard compatible = "renesas,scif" is all that is really
needed (not a SoC specific "renesas,scif-r7s9210").

Becase there is no device tree yet, here is sample of what it would
look like:

	scif0: serial@e8007000 {
		compatible = "renesas,scif-r7s9210", "renesas,scif";
		reg = <0xe8007000 18>;
		interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp4_clks R7S9210_CLK_SCIF0>;
		clock-names = "fck";
		power-domains = <&cpg_clocks>;
		status = "disabled";
	};



Chris Brandt (3):
  serial: sh-sci: Allow for compressed SCIF address space
  serial: sh-sci: Add support for separate TEI+DRI interrupts
  serial: sh-sci: Document r7s9210 bindings

 .../bindings/serial/renesas,sci-serial.txt         | 17 +++++-
 drivers/tty/serial/sh-sci.c                        | 66 ++++++++++++++++++----
 2 files changed, 70 insertions(+), 13 deletions(-)

-- 
2.16.1

[PATCH v2 1/3] serial: sh-sci: Allow for compressed SCIF address space

[Chris Brandt]

Some devices with SCIx_SH4_SCIF_REGTYPE have no space between registers.
Use the register area size to determine the spacing between register.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
 drivers/tty/serial/sh-sci.c | 22 +++++++++++++---------
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index c181eb37f985..d9202ad1c9ca 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -315,15 +315,15 @@ static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = {
 	[SCIx_SH4_SCIF_REGTYPE] = {
 		.regs = {
 			[SCSMR]		= { 0x00, 16 },
-			[SCBRR]		= { 0x04,  8 },
-			[SCSCR]		= { 0x08, 16 },
-			[SCxTDR]	= { 0x0c,  8 },
-			[SCxSR]		= { 0x10, 16 },
-			[SCxRDR]	= { 0x14,  8 },
-			[SCFCR]		= { 0x18, 16 },
-			[SCFDR]		= { 0x1c, 16 },
-			[SCSPTR]	= { 0x20, 16 },
-			[SCLSR]		= { 0x24, 16 },
+			[SCBRR]		= { 0x02,  8 },
+			[SCSCR]		= { 0x04, 16 },
+			[SCxTDR]	= { 0x06,  8 },
+			[SCxSR]		= { 0x08, 16 },
+			[SCxRDR]	= { 0x0a,  8 },
+			[SCFCR]		= { 0x0c, 16 },
+			[SCFDR]		= { 0x0e, 16 },
+			[SCSPTR]	= { 0x10, 16 },
+			[SCLSR]		= { 0x12, 16 },
 		},
 		.fifosize = 16,
 		.overrun_reg = SCLSR,
@@ -2869,6 +2869,10 @@ static int sci_init_single(struct platform_device *dev,
 			port->regshift = 1;
 	}
 
+	if (p->regtype == SCIx_SH4_SCIF_REGTYPE)
+		if (sci_port->reg_size >= 0x20)
+			port->regshift = 1;
+
 	/*
 	 * The UART port needs an IRQ value, so we peg this to the RX IRQ
 	 * for the multi-IRQ ports, which is where we are primarily
-- 
2.16.1

Re: [PATCH v2 1/3] serial: sh-sci: Allow for compressed SCIF address space

[Geert Uytterhoeven]

Hi Chris,

On Wed, Jul 25, 2018 at 4:39 PM Chris Brandt <chris.brandt@renesas.com> wrote:
> Some devices with SCIx_SH4_SCIF_REGTYPE have no space between registers.
> Use the register area size to determine the spacing between register.
>
> Signed-off-by: Chris Brandt <chris.brandt@renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- a/drivers/tty/serial/sh-sci.c
> +++ b/drivers/tty/serial/sh-sci.c

> @@ -2869,6 +2869,10 @@ static int sci_init_single(struct platform_device *dev,
>                         port->regshift = 1;
>         }
>
> +       if (p->regtype == SCIx_SH4_SCIF_REGTYPE)
> +               if (sci_port->reg_size >= 0x20)
> +                       port->regshift = 1;
> +

So you have to be careful not to round up the reg size in DT to the next
power of two (0x20), like you did for RZ/A1 (64 is used there).

Note that while no SH board file uses SCIx_SH4_SCIF_REGTYPE, it is the
default reg type for PORT_SCIF, so some board files may be affected.
However, they all set reg_size to 0x100, so this change should be OK.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH v2 1/3] serial: sh-sci: Allow for compressed SCIF address space

[Chris Brandt]

Hi Geert,

On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> Hi Chris,
> 
> On Wed, Jul 25, 2018 at 4:39 PM Chris Brandt <chris.brandt@renesas.com>
> wrote:
> > Some devices with SCIx_SH4_SCIF_REGTYPE have no space between registers.
> > Use the register area size to determine the spacing between register.
> >
> > Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thank you.

> > +       if (p->regtype == SCIx_SH4_SCIF_REGTYPE)
> > +               if (sci_port->reg_size >= 0x20)
> > +                       port->regshift = 1;
> > +
> 
> So you have to be careful not to round up the reg size in DT to the next
> power of two (0x20), like you did for RZ/A1 (64 is used there).

Me????
It was Wolfram that committed the RZ/A1 DT scif code back in 2014 ;)

Chris

RE: [PATCH v2 1/3] serial: sh-sci: Allow for compressed SCIF address space

[Chris Brandt]

Hi Geert,

On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> Hi Chris,
> 
> On Wed, Jul 25, 2018 at 4:39 PM Chris Brandt <chris.brandt@renesas.com>
> wrote:
> > Some devices with SCIx_SH4_SCIF_REGTYPE have no space between registers.
> > Use the register area size to determine the spacing between register.
> >
> > Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thank you.

> > +       if (p->regtype == SCIx_SH4_SCIF_REGTYPE)
> > +               if (sci_port->reg_size >= 0x20)
> > +                       port->regshift = 1;
> > +
> 
> So you have to be careful not to round up the reg size in DT to the next
> power of two (0x20), like you did for RZ/A1 (64 is used there).

Me????
It was Wolfram that committed the RZ/A1 DT scif code back in 2014 ;)

Chris

Re: [PATCH v2 1/3] serial: sh-sci: Allow for compressed SCIF address space

[Geert Uytterhoeven]

Hi Chris,

On Thu, Jul 26, 2018 at 2:14 PM Chris Brandt <Chris.Brandt@renesas.com> wrote:
> On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> > On Wed, Jul 25, 2018 at 4:39 PM Chris Brandt <chris.brandt@renesas.com>
> > wrote:
> > > Some devices with SCIx_SH4_SCIF_REGTYPE have no space between registers.
> > > Use the register area size to determine the spacing between register.
> > >
> > > Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
> >
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Thank you.
>
> > > +       if (p->regtype == SCIx_SH4_SCIF_REGTYPE)
> > > +               if (sci_port->reg_size >= 0x20)
> > > +                       port->regshift = 1;
> > > +
> >
> > So you have to be careful not to round up the reg size in DT to the next
> > power of two (0x20), like you did for RZ/A1 (64 is used there).
>
> Me????
> It was Wolfram that committed the RZ/A1 DT scif code back in 2014 ;)

I stand corrected.

(and RZLSP didn't use resources yet, but the old mapbase, so there are no
 sizes ;-)

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 2/3] serial: sh-sci: Add support for separate TEI+DRI interrupts

[Chris Brandt]

Some SCIF versions mux error and break interrupts together and then provide
a separate interrupt ID for just TEI/DRI.

Allow all 6 types of interrupts to be specified via platform data (or DT)
and for any signals that are muxed together (have the same interrupt
number) simply register one handler.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
v2:
 * Move compressed SCIF reg address space to a separate commit
 * Handle all 6 possible interrupt types
---
 drivers/tty/serial/sh-sci.c | 44 +++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 41 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index d9202ad1c9ca..f1272fecbe44 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -65,6 +65,8 @@ enum {
 	SCIx_RXI_IRQ,
 	SCIx_TXI_IRQ,
 	SCIx_BRI_IRQ,
+	SCIx_DRI_IRQ,
+	SCIx_TEI_IRQ,
 	SCIx_NR_IRQS,
 
 	SCIx_MUX_IRQ = SCIx_NR_IRQS,	/* special case */
@@ -1683,11 +1685,26 @@ static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
 	return IRQ_HANDLED;
 }
 
+static irqreturn_t sci_br_interrupt(int irq, void *ptr);
+
 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
 {
 	struct uart_port *port = ptr;
 	struct sci_port *s = to_sci_port(port);
 
+	if (s->irqs[SCIx_ERI_IRQ] == s->irqs[SCIx_BRI_IRQ]) {
+		/* Break and Error interrupts are muxed */
+		unsigned short ssr_status = serial_port_in(port, SCxSR);
+
+		/* Break Interrupt */
+		if (ssr_status & SCxSR_BRK(port))
+			sci_br_interrupt(irq, ptr);
+
+		/* Break only? */
+		if (!(ssr_status & SCxSR_ERRORS(port)))
+			return IRQ_HANDLED;
+	}
+
 	/* Handle errors */
 	if (port->type == PORT_SCI) {
 		if (sci_handle_errors(port)) {
@@ -1794,6 +1811,16 @@ static const struct sci_irq_desc {
 		.handler = sci_br_interrupt,
 	},
 
+	[SCIx_DRI_IRQ] = {
+		.desc = "rx ready",
+		.handler = sci_rx_interrupt,
+	},
+
+	[SCIx_TEI_IRQ] = {
+		.desc = "tx end",
+		.handler = sci_tx_interrupt,
+	},
+
 	/*
 	 * Special muxed handler.
 	 */
@@ -1806,12 +1833,19 @@ static const struct sci_irq_desc {
 static int sci_request_irq(struct sci_port *port)
 {
 	struct uart_port *up = &port->port;
-	int i, j, ret = 0;
+	int i, j, w, ret = 0;
 
 	for (i = j = 0; i < SCIx_NR_IRQS; i++, j++) {
 		const struct sci_irq_desc *desc;
 		int irq;
 
+		/* Check if already registered (muxed) */
+		for (w = 0; w < i; w++)
+			if (port->irqs[w] == port->irqs[i])
+				w = i + 1;
+		if (w > i)
+			continue;
+
 		if (SCIx_IRQ_IS_MUXED(port)) {
 			i = SCIx_MUX_IRQ;
 			irq = up->irq;
@@ -2799,8 +2833,10 @@ static int sci_init_single(struct platform_device *dev,
 
 	/* The SCI generates several interrupts. They can be muxed together or
 	 * connected to different interrupt lines. In the muxed case only one
-	 * interrupt resource is specified. In the non-muxed case three or four
-	 * interrupt resources are specified, as the BRI interrupt is optional.
+	 * interrupt resource is specified as there is only one interrupt ID.
+	 * In the non-muxed case, up to 6 interrupt signals might be generated
+	 * from the SCI, however those signals might have their own individual
+	 * interrupt ID numbers, or muxed together with another interrupt.
 	 */
 	if (sci_port->irqs[0] < 0)
 		return -ENXIO;
@@ -2809,6 +2845,8 @@ static int sci_init_single(struct platform_device *dev,
 		sci_port->irqs[1] = sci_port->irqs[0];
 		sci_port->irqs[2] = sci_port->irqs[0];
 		sci_port->irqs[3] = sci_port->irqs[0];
+		sci_port->irqs[4] = sci_port->irqs[0];
+		sci_port->irqs[5] = sci_port->irqs[0];
 	}
 
 	sci_port->params = sci_probe_regmap(p);
-- 
2.16.1

Re: [PATCH v2 2/3] serial: sh-sci: Add support for separate TEI+DRI interrupts

[Geert Uytterhoeven]

Hi Chris,

On Wed, Jul 25, 2018 at 4:39 PM Chris Brandt <chris.brandt@renesas.com> wrote:
> Some SCIF versions mux error and break interrupts together and then provide
> a separate interrupt ID for just TEI/DRI.
>
> Allow all 6 types of interrupts to be specified via platform data (or DT)
> and for any signals that are muxed together (have the same interrupt
> number) simply register one handler.
>
> Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
> ---
> v2:
>  * Move compressed SCIF reg address space to a separate commit
>  * Handle all 6 possible interrupt types

Thanks for your patch!

> --- a/drivers/tty/serial/sh-sci.c
> +++ b/drivers/tty/serial/sh-sci.c

> @@ -1683,11 +1685,26 @@ static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
>         return IRQ_HANDLED;
>  }
>
> +static irqreturn_t sci_br_interrupt(int irq, void *ptr);

You can avoid the forward declaration by moving the whole function here.

> +
>  static irqreturn_t sci_er_interrupt(int irq, void *ptr)
>  {
>         struct uart_port *port = ptr;
>         struct sci_port *s = to_sci_port(port);
>
> +       if (s->irqs[SCIx_ERI_IRQ] == s->irqs[SCIx_BRI_IRQ]) {
> +               /* Break and Error interrupts are muxed */
> +               unsigned short ssr_status = serial_port_in(port, SCxSR);
> +
> +               /* Break Interrupt */
> +               if (ssr_status & SCxSR_BRK(port))
> +                       sci_br_interrupt(irq, ptr);
> +
> +               /* Break only? */
> +               if (!(ssr_status & SCxSR_ERRORS(port)))
> +                       return IRQ_HANDLED;
> +       }
> +
>         /* Handle errors */
>         if (port->type == PORT_SCI) {
>                 if (sci_handle_errors(port)) {

> @@ -2809,6 +2845,8 @@ static int sci_init_single(struct platform_device *dev,
>                 sci_port->irqs[1] = sci_port->irqs[0];
>                 sci_port->irqs[2] = sci_port->irqs[0];
>                 sci_port->irqs[3] = sci_port->irqs[0];
> +               sci_port->irqs[4] = sci_port->irqs[0];
> +               sci_port->irqs[5] = sci_port->irqs[0];

You may want to start using a loop from 1 to ARRAY_SIZE(sci_port->irqs) - 1
instead.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH v2 2/3] serial: sh-sci: Add support for separate TEI+DRI interrupts

[Chris Brandt]

Hi Geert,

On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> > +static irqreturn_t sci_br_interrupt(int irq, void *ptr);
> 
> You can avoid the forward declaration by moving the whole function here.

OK.

> > @@ -2809,6 +2845,8 @@ static int sci_init_single(struct platform_device
> *dev,
> >                 sci_port->irqs[1] = sci_port->irqs[0];
> >                 sci_port->irqs[2] = sci_port->irqs[0];
> >                 sci_port->irqs[3] = sci_port->irqs[0];
> > +               sci_port->irqs[4] = sci_port->irqs[0];
> > +               sci_port->irqs[5] = sci_port->irqs[0];
> 
> You may want to start using a loop from 1 to ARRAY_SIZE(sci_port->irqs) -
> 1
> instead.

OK, I'll change it.

Chris

RE: [PATCH v2 2/3] serial: sh-sci: Add support for separate TEI+DRI interrupts

[Chris Brandt]

Hi Geert,

On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> > +static irqreturn_t sci_br_interrupt(int irq, void *ptr);
> 
> You can avoid the forward declaration by moving the whole function here.

OK.

> > @@ -2809,6 +2845,8 @@ static int sci_init_single(struct platform_device
> *dev,
> >                 sci_port->irqs[1] = sci_port->irqs[0];
> >                 sci_port->irqs[2] = sci_port->irqs[0];
> >                 sci_port->irqs[3] = sci_port->irqs[0];
> > +               sci_port->irqs[4] = sci_port->irqs[0];
> > +               sci_port->irqs[5] = sci_port->irqs[0];
> 
> You may want to start using a loop from 1 to ARRAY_SIZE(sci_port->irqs) -
> 1
> instead.

OK, I'll change it.

Chris

[PATCH v2 3/3] serial: sh-sci: Document r7s9210 bindings

[Chris Brandt]

Add R7S9210 (RZ/A2) support.
Also describe interrupts property in more detail.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
v2:
 * Add more details to interrupts property
 * Geert gave a Reviewed-by for V1, but then later said that was a
   mistake because it was missing the interrupts description, so
   I didn't include his Reviewed-by yet.
---
 .../devicetree/bindings/serial/renesas,sci-serial.txt   | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
index 106808b55b6d..5d0997a04697 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
@@ -5,6 +5,7 @@ Required properties:
   - compatible: Must contain one or more of the following:
 
     - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART.
+    - "renesas,scif-r7s9210" for R7S9210 (RZ/A2) SCIF compatible UART.
     - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART.
     - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART.
     - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART.
@@ -72,7 +73,21 @@ Required properties:
     family-specific and/or generic versions.
 
   - reg: Base address and length of the I/O registers used by the UART.
-  - interrupts: Must contain an interrupt-specifier for the SCIx interrupt.
+  - interrupts: Must contain one or more interrupt-specifiers for the SCIx.
+                If a single interrupt is expressed, then all events are
+                multiplexed into this single interrupt.
+
+                If multiple interrupts are provided by the hardware, the order
+                in which the interrupts are listed must match order below. Note
+                that some HW interrupt events may be muxed together resulting
+                in duplicate entires.
+                The interrupt order is as follows:
+                  1. Error (ERI)
+                  2. Receive buffer full (RXI)
+                  3. Transmit buffer empty (TXI)
+                  4. Break (BRI)
+                  5. Data Ready (DRI)
+                  6. Transmit End (TEI)
 
   - clocks: Must contain a phandle and clock-specifier pair for each entry
     in clock-names.
-- 
2.16.1

Re: [PATCH v2 3/3] serial: sh-sci: Document r7s9210 bindings

[Geert Uytterhoeven]

Hi Chris,

On Wed, Jul 25, 2018 at 4:39 PM Chris Brandt <chris.brandt@renesas.com> wrote:
> Add R7S9210 (RZ/A2) support.
> Also describe interrupts property in more detail.
>
> Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
> ---
> v2:
>  * Add more details to interrupts property
>  * Geert gave a Reviewed-by for V1, but then later said that was a
>    mistake because it was missing the interrupts description, so
>    I didn't include his Reviewed-by yet.

Thanks for the update!

With the below typo fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
> +++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
> @@ -72,7 +73,21 @@ Required properties:
>      family-specific and/or generic versions.
>
>    - reg: Base address and length of the I/O registers used by the UART.
> -  - interrupts: Must contain an interrupt-specifier for the SCIx interrupt.
> +  - interrupts: Must contain one or more interrupt-specifiers for the SCIx.
> +                If a single interrupt is expressed, then all events are
> +                multiplexed into this single interrupt.
> +
> +                If multiple interrupts are provided by the hardware, the order
> +                in which the interrupts are listed must match order below. Note
> +                that some HW interrupt events may be muxed together resulting
> +                in duplicate entires.

entries

> +                The interrupt order is as follows:
> +                  1. Error (ERI)
> +                  2. Receive buffer full (RXI)
> +                  3. Transmit buffer empty (TXI)
> +                  4. Break (BRI)
> +                  5. Data Ready (DRI)
> +                  6. Transmit End (TEI)
>
>    - clocks: Must contain a phandle and clock-specifier pair for each entry
>      in clock-names.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH v2 3/3] serial: sh-sci: Document r7s9210 bindings

[Chris Brandt]

Hi Geert,

On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> With the below typo fixed:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

OK, I will fix the typo and resend.

Thank you.

Chris

RE: [PATCH v2 3/3] serial: sh-sci: Document r7s9210 bindings

[Chris Brandt]

Hi Geert,

On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> With the below typo fixed:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

OK, I will fix the typo and resend.

Thank you.

Chris

Re: [PATCH v2 3/3] serial: sh-sci: Document r7s9210 bindings

[Rob Herring]

On Wed, Jul 25, 2018 at 09:38:50AM -0500, Chris Brandt wrote:
> Add R7S9210 (RZ/A2) support.
> Also describe interrupts property in more detail.
> 
> Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
> ---
> v2:
>  * Add more details to interrupts property
>  * Geert gave a Reviewed-by for V1, but then later said that was a
>    mistake because it was missing the interrupts description, so
>    I didn't include his Reviewed-by yet.
> ---
>  .../devicetree/bindings/serial/renesas,sci-serial.txt   | 17 ++++++++++++++++-
>  1 file changed, 16 insertions(+), 1 deletion(-)

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Geert Uytterhoeven]

Hi Chris,

On Wed, Jul 25, 2018 at 4:39 PM Chris Brandt <chris.brandt@renesas.com> wrote:
> The RZ/A2 uses a modified SCIF that until recently was only used in
> Renesas MCU devices (not MPU devices).
> So, while it functions mostly the same as a normal SCIF, some things
> needed to be shifted around.
>
> In the end, a standard compatible = "renesas,scif" is all that is really
> needed (not a SoC specific "renesas,scif-r7s9210").

> Chris Brandt (3):
>   serial: sh-sci: Allow for compressed SCIF address space
>   serial: sh-sci: Add support for separate TEI+DRI interrupts
>   serial: sh-sci: Document r7s9210 bindings
>
>  .../bindings/serial/renesas,sci-serial.txt         | 17 +++++-
>  drivers/tty/serial/sh-sci.c                        | 66 ++++++++++++++++++----
>  2 files changed, 70 insertions(+), 13 deletions(-)

Thanks for your series!

Unfortunately Greg has already applied your v1 (and my fix for a
use-after-free), so either these have to be reverted first, or you have to
rebase against tty-next.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Chris Brandt]

Hi Geert,

On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> Thanks for your series!
> 
> Unfortunately Greg has already applied your v1 (and my fix for a
> use-after-free), so either these have to be reverted first, or you have to
> rebase against tty-next.

I assume you would prefer the newer implementation I did.

In your opinion, which one would be better (revert or rebase)?

Thanks,
Chris

RE: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Chris Brandt]

Hi Geert,

On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> Thanks for your series!
> 
> Unfortunately Greg has already applied your v1 (and my fix for a
> use-after-free), so either these have to be reverted first, or you have to
> rebase against tty-next.

I assume you would prefer the newer implementation I did.

In your opinion, which one would be better (revert or rebase)?

Thanks,
Chris

Re: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Geert Uytterhoeven]

Hi Chris,

On Thu, Jul 26, 2018 at 2:25 PM Chris Brandt <Chris.Brandt@renesas.com> wrote:
> On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> > Thanks for your series!
> >
> > Unfortunately Greg has already applied your v1 (and my fix for a
> > use-after-free), so either these have to be reverted first, or you have to
> > rebase against tty-next.
>
> I assume you would prefer the newer implementation I did.
>
> In your opinion, which one would be better (revert or rebase)?

[looking at the incremental differences]

I think the easiest for Greg is to rebase, and send 3 patches:
  1. Document interrupt order in bindings,
  2. Unify SCIx_RZ_SCIFA_REGTYPE/SCIx_SH4_SCIF_REGTYPE regtypes,
  3. Simplify interrupts.

Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Chris Brandt]

Hi Geert,

On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> > In your opinion, which one would be better (revert or rebase)?
> 
> [looking at the incremental differences]
> 
> I think the easiest for Greg is to rebase, and send 3 patches:
>   1. Document interrupt order in bindings,
>   2. Unify SCIx_RZ_SCIFA_REGTYPE/SCIx_SH4_SCIF_REGTYPE regtypes,
>   3. Simplify interrupts.

Thank you!

Chris

RE: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Chris Brandt]

Hi Geert,

On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> > In your opinion, which one would be better (revert or rebase)?
> 
> [looking at the incremental differences]
> 
> I think the easiest for Greg is to rebase, and send 3 patches:
>   1. Document interrupt order in bindings,
>   2. Unify SCIx_RZ_SCIFA_REGTYPE/SCIx_SH4_SCIF_REGTYPE regtypes,
>   3. Simplify interrupts.

Thank you!

Chris

Re: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Greg KH]

On Thu, Jul 26, 2018 at 03:01:11PM +0200, Geert Uytterhoeven wrote:
> Hi Chris,
> 
> On Thu, Jul 26, 2018 at 2:25 PM Chris Brandt <Chris.Brandt@renesas.com> wrote:
> > On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> > > Thanks for your series!
> > >
> > > Unfortunately Greg has already applied your v1 (and my fix for a
> > > use-after-free), so either these have to be reverted first, or you have to
> > > rebase against tty-next.
> >
> > I assume you would prefer the newer implementation I did.
> >
> > In your opinion, which one would be better (revert or rebase)?
> 
> [looking at the incremental differences]
> 
> I think the easiest for Greg is to rebase, and send 3 patches:

Greg does not rebase his public trees.  Nor should anyone else :)

I can revert patches if you want me to, just let me know what ones.  Or
send incremental patches on top of my tree please.  But no reverts are
going to be happening.

thanks,

greg k-h

RE: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Chris Brandt]

On Saturday, July 28, 2018 1, Greg KH wrote:
> > > In your opinion, which one would be better (revert or rebase)?
> >
> > [looking at the incremental differences]
> >
> > I think the easiest for Greg is to rebase, and send 3 patches:
> 
> Greg does not rebase his public trees.  Nor should anyone else :)
> 
> I can revert patches if you want me to, just let me know what ones.  Or
> send incremental patches on top of my tree please.  But no reverts are
> going to be happening.

Yesterday I sent a new patch series that will apply on top of the 
current tty-next and basically reverts what I did and replaces it with a 
new version that incorporates Geert's suggestions. So no reverts are
needed.

I assume now I'm just waiting to see if Geert has any feedback on the 
new series.

Chris

RE: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Chris Brandt]

On Saturday, July 28, 2018 1, Greg KH wrote:
> > > In your opinion, which one would be better (revert or rebase)?
> >
> > [looking at the incremental differences]
> >
> > I think the easiest for Greg is to rebase, and send 3 patches:
> 
> Greg does not rebase his public trees.  Nor should anyone else :)
> 
> I can revert patches if you want me to, just let me know what ones.  Or
> send incremental patches on top of my tree please.  But no reverts are
> going to be happening.

Yesterday I sent a new patch series that will apply on top of the 
current tty-next and basically reverts what I did and replaces it with a 
new version that incorporates Geert's suggestions. So no reverts are
needed.

I assume now I'm just waiting to see if Geert has any feedback on the 
new series.

Chris

Re: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Simon Horman]

On Sat, Jul 28, 2018 at 03:55:14PM +0000, Chris Brandt wrote:
> On Saturday, July 28, 2018 1, Greg KH wrote:
> > > > In your opinion, which one would be better (revert or rebase)?
> > >
> > > [looking at the incremental differences]
> > >
> > > I think the easiest for Greg is to rebase, and send 3 patches:
> > 
> > Greg does not rebase his public trees.  Nor should anyone else :)
> > 
> > I can revert patches if you want me to, just let me know what ones.  Or
> > send incremental patches on top of my tree please.  But no reverts are
> > going to be happening.

s/no reverts/no rebases/ ?

> 
> Yesterday I sent a new patch series that will apply on top of the 
> current tty-next and basically reverts what I did and replaces it with a 
> new version that incorporates Geert's suggestions. So no reverts are
> needed.
> 
> I assume now I'm just waiting to see if Geert has any feedback on the 
> new series.
> 
> Chris
> 

Re: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2

[Geert Uytterhoeven]

Hi Greg,

On Sat, Jul 28, 2018 at 4:55 PM Greg KH <gregkh@linuxfoundation.org> wrote:
> On Thu, Jul 26, 2018 at 03:01:11PM +0200, Geert Uytterhoeven wrote:
> > On Thu, Jul 26, 2018 at 2:25 PM Chris Brandt <Chris.Brandt@renesas.com> wrote:
> > > On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> > > > Thanks for your series!
> > > >
> > > > Unfortunately Greg has already applied your v1 (and my fix for a
> > > > use-after-free), so either these have to be reverted first, or you have to
> > > > rebase against tty-next.
> > >
> > > I assume you would prefer the newer implementation I did.
> > >
> > > In your opinion, which one would be better (revert or rebase)?
> >
> > [looking at the incremental differences]
> >
> > I think the easiest for Greg is to rebase, and send 3 patches:
>
> Greg does not rebase his public trees.  Nor should anyone else :)

I know ;-)

FTR, the sentence above was addressed to Chris:
"I think the easiest for Greg(,) is (for you) to rebase (your tree), and send 3
 patches".
Which is what Chris did in the mean time.

Apparently I didn't formulate it well. Will try to do better in the future.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds