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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Jeremy Linton <jeremy.linton@arm.com>,
	ACPI Devel Maling List <linux-acpi@vger.kernel.org>,
	Mark Rutland <Mark.Rutland@arm.com>,
	austinwc@codeaurora.org, tnowicki@caviumnetworks.com,
	Palmer Dabbelt <palmer@sifive.com>,
	Will Deacon <Will.Deacon@arm.com>,
	linux-riscv@lists.infradead.org, Morten.Rasmussen@arm.com,
	vkilari@codeaurora.org,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	jhugo@codeaurora.org, Al Stone <ahs3@redhat.com>,
	Len Brown <lenb@kernel.org>, John Garry <john.garry@huawei.com>,
	wangxiongfeng2@huawei.com,
	Dietmar Eggemann <Dietmar.Eggemann@arm.com>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Greg KH <gregkh@linuxfoundation.org>"Rafael J. Wysocki" <r>
Subject: Re: [PATCH v9 00/12] Support PPTT for ARM64
Date: Tue, 29 May 2018 17:50:47 +0200	[thread overview]
Message-ID: <CAMuHMdWgsRTqrgwi5Z_xyNXmzS1h4gxLaawdFAL_DGF+Yt8s-A@mail.gmail.com> (raw)
In-Reply-To: <551905a6-eaa8-97df-06ec-1ceedfbc164f@arm.com>

Hi Sudeep,

On Tue, May 29, 2018 at 3:18 PM, Sudeep Holla <sudeep.holla@arm.com> wrote:
> On 29/05/18 12:56, Geert Uytterhoeven wrote:
>> On Tue, May 29, 2018 at 1:14 PM, Sudeep Holla <sudeep.holla@arm.com> wrote:
>>> On 29/05/18 11:48, Geert Uytterhoeven wrote:
>>>> On Thu, May 17, 2018 at 7:05 PM, Catalin Marinas
>>>> <catalin.marinas@arm.com> wrote:
>>>>> On Fri, May 11, 2018 at 06:57:55PM -0500, Jeremy Linton wrote:
>>>>>> Jeremy Linton (12):
>>>>>>   arm64: topology: divorce MC scheduling domain from core_siblings
>>>>>
>>>>> Queued for 4.18 (without Sudeep's latest property_read_u64 cacheinfo
>>>>> patch - http://lkml.kernel.org/r/20180517154701.GA20281@e107155-lin; I
>>>>> can add it separately).
>>>>
>>>> This is now commit 37c3ec2d810f87ea ("arm64: topology: divorce MC
>>>> scheduling domain from core_siblings") in arm64/for-next/core, causing
>>>> system suspend on big.LITTLE systems to hang after shutting down the first
>>>> CPU:
>>>>
>>>>     $ echo mem > /sys/power/state
>>>>     PM: suspend entry (deep)
>>>>     PM: Syncing filesystems ... done.
>>>>     Freezing user space processes ... (elapsed 0.001 seconds) done.
>>>>     OOM killer disabled.
>>>>     Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
>>>>     Disabling non-boot CPUs ...
>>>>     CPU1: shutdown
>>>>     psci: CPU1 killed.
>>>
>>> Is it OK to assume the suspend failed just after shutting down one CPU
>>> or it's failing during resume ? It depends on whether you had console
>>> disabled or not.
>>
>> I have no-console-suspend enabled.
>> It's failing during suspend, the next lines should be:
>>
>>     CPU2: shutdown
>>     psci: CPU2 killed.
>>     ...
>
> OK, I was hoping to be something during resume as this patch has nothing
> executed during suspend. Do you see any change in topology before and
> after this patch applied. I am interested in the output of:
>
> $ grep "" /sys/devices/system/cpu/cpu*/topology/*

/sys/devices/system/cpu/cpu0/topology/core_id:0
/sys/devices/system/cpu/cpu0/topology/core_siblings:0f
/sys/devices/system/cpu/cpu0/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu0/topology/physical_package_id:0
/sys/devices/system/cpu/cpu0/topology/thread_siblings:01
/sys/devices/system/cpu/cpu0/topology/thread_siblings_list:0
/sys/devices/system/cpu/cpu1/topology/core_id:1
/sys/devices/system/cpu/cpu1/topology/core_siblings:0f
/sys/devices/system/cpu/cpu1/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu1/topology/physical_package_id:0
/sys/devices/system/cpu/cpu1/topology/thread_siblings:02
/sys/devices/system/cpu/cpu1/topology/thread_siblings_list:1
/sys/devices/system/cpu/cpu2/topology/core_id:2
/sys/devices/system/cpu/cpu2/topology/core_siblings:0f
/sys/devices/system/cpu/cpu2/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu2/topology/physical_package_id:0
/sys/devices/system/cpu/cpu2/topology/thread_siblings:04
/sys/devices/system/cpu/cpu2/topology/thread_siblings_list:2
/sys/devices/system/cpu/cpu3/topology/core_id:3
/sys/devices/system/cpu/cpu3/topology/core_siblings:0f
/sys/devices/system/cpu/cpu3/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu3/topology/physical_package_id:0
/sys/devices/system/cpu/cpu3/topology/thread_siblings:08
/sys/devices/system/cpu/cpu3/topology/thread_siblings_list:3
/sys/devices/system/cpu/cpu4/topology/core_id:0
/sys/devices/system/cpu/cpu4/topology/core_siblings:f0
/sys/devices/system/cpu/cpu4/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu4/topology/physical_package_id:1
/sys/devices/system/cpu/cpu4/topology/thread_siblings:10
/sys/devices/system/cpu/cpu4/topology/thread_siblings_list:4
/sys/devices/system/cpu/cpu5/topology/core_id:1
/sys/devices/system/cpu/cpu5/topology/core_siblings:f0
/sys/devices/system/cpu/cpu5/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu5/topology/physical_package_id:1
/sys/devices/system/cpu/cpu5/topology/thread_siblings:20
/sys/devices/system/cpu/cpu5/topology/thread_siblings_list:5
/sys/devices/system/cpu/cpu6/topology/core_id:2
/sys/devices/system/cpu/cpu6/topology/core_siblings:f0
/sys/devices/system/cpu/cpu6/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu6/topology/physical_package_id:1
/sys/devices/system/cpu/cpu6/topology/thread_siblings:40
/sys/devices/system/cpu/cpu6/topology/thread_siblings_list:6
/sys/devices/system/cpu/cpu7/topology/core_id:3
/sys/devices/system/cpu/cpu7/topology/core_siblings:f0
/sys/devices/system/cpu/cpu7/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu7/topology/physical_package_id:1
/sys/devices/system/cpu/cpu7/topology/thread_siblings:80
/sys/devices/system/cpu/cpu7/topology/thread_siblings_list:7

No change before/after (both match my view of the hardware).

>
>>>> For me, it fails on the following big.LITTLE systems:
>>>>
>>>>     R-Car H3 ES2.0 (4xCA57 + 4xCA53)
>>>>     R-Car M3-W (2xCA57 + 4xCA53)
>>>>
>>>
>>> Interesting, is it PSCI based system suspend ?
>>
>> Yes it is.
>
> From DT, I guess this platform doesn't have any idle states.
> Does this use genpd power domains ? I see power-domains in the DT, so
> asking to get more info. Do you have any out of tree patches especially
> if they are depending on some topology cpumasks ?

No out-of-tree patches.
I'm testing plain 37c3ec2d810f87ea vs. 37c3ec2d810f87ea^.
There are power-domains in DT, but they're not managed by the new
fancy CPU power domain code.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Jeremy Linton <jeremy.linton@arm.com>,
	ACPI Devel Maling List <linux-acpi@vger.kernel.org>,
	Mark Rutland <Mark.Rutland@arm.com>,
	austinwc@codeaurora.org, tnowicki@caviumnetworks.com,
	Palmer Dabbelt <palmer@sifive.com>,
	Will Deacon <Will.Deacon@arm.com>,
	linux-riscv@lists.infradead.org, Morten.Rasmussen@arm.com,
	vkilari@codeaurora.org,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	jhugo@codeaurora.org, Al Stone <ahs3@redhat.com>,
	Len Brown <lenb@kernel.org>, John Garry <john.garry@huawei.com>,
	wangxiongfeng2@huawei.com,
	Dietmar Eggemann <Dietmar.Eggemann@arm.com>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Greg KH <gregkh@linuxfoundation.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Hanjun Guo <hanjun.guo@linaro.org>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH v9 00/12] Support PPTT for ARM64
Date: Tue, 29 May 2018 17:50:47 +0200	[thread overview]
Message-ID: <CAMuHMdWgsRTqrgwi5Z_xyNXmzS1h4gxLaawdFAL_DGF+Yt8s-A@mail.gmail.com> (raw)
In-Reply-To: <551905a6-eaa8-97df-06ec-1ceedfbc164f@arm.com>

Hi Sudeep,

On Tue, May 29, 2018 at 3:18 PM, Sudeep Holla <sudeep.holla@arm.com> wrote:
> On 29/05/18 12:56, Geert Uytterhoeven wrote:
>> On Tue, May 29, 2018 at 1:14 PM, Sudeep Holla <sudeep.holla@arm.com> wrote:
>>> On 29/05/18 11:48, Geert Uytterhoeven wrote:
>>>> On Thu, May 17, 2018 at 7:05 PM, Catalin Marinas
>>>> <catalin.marinas@arm.com> wrote:
>>>>> On Fri, May 11, 2018 at 06:57:55PM -0500, Jeremy Linton wrote:
>>>>>> Jeremy Linton (12):
>>>>>>   arm64: topology: divorce MC scheduling domain from core_siblings
>>>>>
>>>>> Queued for 4.18 (without Sudeep's latest property_read_u64 cacheinfo
>>>>> patch - http://lkml.kernel.org/r/20180517154701.GA20281@e107155-lin; I
>>>>> can add it separately).
>>>>
>>>> This is now commit 37c3ec2d810f87ea ("arm64: topology: divorce MC
>>>> scheduling domain from core_siblings") in arm64/for-next/core, causing
>>>> system suspend on big.LITTLE systems to hang after shutting down the first
>>>> CPU:
>>>>
>>>>     $ echo mem > /sys/power/state
>>>>     PM: suspend entry (deep)
>>>>     PM: Syncing filesystems ... done.
>>>>     Freezing user space processes ... (elapsed 0.001 seconds) done.
>>>>     OOM killer disabled.
>>>>     Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
>>>>     Disabling non-boot CPUs ...
>>>>     CPU1: shutdown
>>>>     psci: CPU1 killed.
>>>
>>> Is it OK to assume the suspend failed just after shutting down one CPU
>>> or it's failing during resume ? It depends on whether you had console
>>> disabled or not.
>>
>> I have no-console-suspend enabled.
>> It's failing during suspend, the next lines should be:
>>
>>     CPU2: shutdown
>>     psci: CPU2 killed.
>>     ...
>
> OK, I was hoping to be something during resume as this patch has nothing
> executed during suspend. Do you see any change in topology before and
> after this patch applied. I am interested in the output of:
>
> $ grep "" /sys/devices/system/cpu/cpu*/topology/*

/sys/devices/system/cpu/cpu0/topology/core_id:0
/sys/devices/system/cpu/cpu0/topology/core_siblings:0f
/sys/devices/system/cpu/cpu0/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu0/topology/physical_package_id:0
/sys/devices/system/cpu/cpu0/topology/thread_siblings:01
/sys/devices/system/cpu/cpu0/topology/thread_siblings_list:0
/sys/devices/system/cpu/cpu1/topology/core_id:1
/sys/devices/system/cpu/cpu1/topology/core_siblings:0f
/sys/devices/system/cpu/cpu1/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu1/topology/physical_package_id:0
/sys/devices/system/cpu/cpu1/topology/thread_siblings:02
/sys/devices/system/cpu/cpu1/topology/thread_siblings_list:1
/sys/devices/system/cpu/cpu2/topology/core_id:2
/sys/devices/system/cpu/cpu2/topology/core_siblings:0f
/sys/devices/system/cpu/cpu2/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu2/topology/physical_package_id:0
/sys/devices/system/cpu/cpu2/topology/thread_siblings:04
/sys/devices/system/cpu/cpu2/topology/thread_siblings_list:2
/sys/devices/system/cpu/cpu3/topology/core_id:3
/sys/devices/system/cpu/cpu3/topology/core_siblings:0f
/sys/devices/system/cpu/cpu3/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu3/topology/physical_package_id:0
/sys/devices/system/cpu/cpu3/topology/thread_siblings:08
/sys/devices/system/cpu/cpu3/topology/thread_siblings_list:3
/sys/devices/system/cpu/cpu4/topology/core_id:0
/sys/devices/system/cpu/cpu4/topology/core_siblings:f0
/sys/devices/system/cpu/cpu4/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu4/topology/physical_package_id:1
/sys/devices/system/cpu/cpu4/topology/thread_siblings:10
/sys/devices/system/cpu/cpu4/topology/thread_siblings_list:4
/sys/devices/system/cpu/cpu5/topology/core_id:1
/sys/devices/system/cpu/cpu5/topology/core_siblings:f0
/sys/devices/system/cpu/cpu5/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu5/topology/physical_package_id:1
/sys/devices/system/cpu/cpu5/topology/thread_siblings:20
/sys/devices/system/cpu/cpu5/topology/thread_siblings_list:5
/sys/devices/system/cpu/cpu6/topology/core_id:2
/sys/devices/system/cpu/cpu6/topology/core_siblings:f0
/sys/devices/system/cpu/cpu6/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu6/topology/physical_package_id:1
/sys/devices/system/cpu/cpu6/topology/thread_siblings:40
/sys/devices/system/cpu/cpu6/topology/thread_siblings_list:6
/sys/devices/system/cpu/cpu7/topology/core_id:3
/sys/devices/system/cpu/cpu7/topology/core_siblings:f0
/sys/devices/system/cpu/cpu7/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu7/topology/physical_package_id:1
/sys/devices/system/cpu/cpu7/topology/thread_siblings:80
/sys/devices/system/cpu/cpu7/topology/thread_siblings_list:7

No change before/after (both match my view of the hardware).

>
>>>> For me, it fails on the following big.LITTLE systems:
>>>>
>>>>     R-Car H3 ES2.0 (4xCA57 + 4xCA53)
>>>>     R-Car M3-W (2xCA57 + 4xCA53)
>>>>
>>>
>>> Interesting, is it PSCI based system suspend ?
>>
>> Yes it is.
>
> From DT, I guess this platform doesn't have any idle states.
> Does this use genpd power domains ? I see power-domains in the DT, so
> asking to get more info. Do you have any out of tree patches especially
> if they are depending on some topology cpumasks ?

No out-of-tree patches.
I'm testing plain 37c3ec2d810f87ea vs. 37c3ec2d810f87ea^.
There are power-domains in DT, but they're not managed by the new
fancy CPU power domain code.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

WARNING: multiple messages have this Message-ID (diff)
From: geert@linux-m68k.org (Geert Uytterhoeven)
To: linux-riscv@lists.infradead.org
Subject: [PATCH v9 00/12] Support PPTT for ARM64
Date: Tue, 29 May 2018 17:50:47 +0200	[thread overview]
Message-ID: <CAMuHMdWgsRTqrgwi5Z_xyNXmzS1h4gxLaawdFAL_DGF+Yt8s-A@mail.gmail.com> (raw)
In-Reply-To: <551905a6-eaa8-97df-06ec-1ceedfbc164f@arm.com>

Hi Sudeep,

On Tue, May 29, 2018 at 3:18 PM, Sudeep Holla <sudeep.holla@arm.com> wrote:
> On 29/05/18 12:56, Geert Uytterhoeven wrote:
>> On Tue, May 29, 2018 at 1:14 PM, Sudeep Holla <sudeep.holla@arm.com> wrote:
>>> On 29/05/18 11:48, Geert Uytterhoeven wrote:
>>>> On Thu, May 17, 2018 at 7:05 PM, Catalin Marinas
>>>> <catalin.marinas@arm.com> wrote:
>>>>> On Fri, May 11, 2018 at 06:57:55PM -0500, Jeremy Linton wrote:
>>>>>> Jeremy Linton (12):
>>>>>>   arm64: topology: divorce MC scheduling domain from core_siblings
>>>>>
>>>>> Queued for 4.18 (without Sudeep's latest property_read_u64 cacheinfo
>>>>> patch - http://lkml.kernel.org/r/20180517154701.GA20281 at e107155-lin; I
>>>>> can add it separately).
>>>>
>>>> This is now commit 37c3ec2d810f87ea ("arm64: topology: divorce MC
>>>> scheduling domain from core_siblings") in arm64/for-next/core, causing
>>>> system suspend on big.LITTLE systems to hang after shutting down the first
>>>> CPU:
>>>>
>>>>     $ echo mem > /sys/power/state
>>>>     PM: suspend entry (deep)
>>>>     PM: Syncing filesystems ... done.
>>>>     Freezing user space processes ... (elapsed 0.001 seconds) done.
>>>>     OOM killer disabled.
>>>>     Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
>>>>     Disabling non-boot CPUs ...
>>>>     CPU1: shutdown
>>>>     psci: CPU1 killed.
>>>
>>> Is it OK to assume the suspend failed just after shutting down one CPU
>>> or it's failing during resume ? It depends on whether you had console
>>> disabled or not.
>>
>> I have no-console-suspend enabled.
>> It's failing during suspend, the next lines should be:
>>
>>     CPU2: shutdown
>>     psci: CPU2 killed.
>>     ...
>
> OK, I was hoping to be something during resume as this patch has nothing
> executed during suspend. Do you see any change in topology before and
> after this patch applied. I am interested in the output of:
>
> $ grep "" /sys/devices/system/cpu/cpu*/topology/*

/sys/devices/system/cpu/cpu0/topology/core_id:0
/sys/devices/system/cpu/cpu0/topology/core_siblings:0f
/sys/devices/system/cpu/cpu0/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu0/topology/physical_package_id:0
/sys/devices/system/cpu/cpu0/topology/thread_siblings:01
/sys/devices/system/cpu/cpu0/topology/thread_siblings_list:0
/sys/devices/system/cpu/cpu1/topology/core_id:1
/sys/devices/system/cpu/cpu1/topology/core_siblings:0f
/sys/devices/system/cpu/cpu1/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu1/topology/physical_package_id:0
/sys/devices/system/cpu/cpu1/topology/thread_siblings:02
/sys/devices/system/cpu/cpu1/topology/thread_siblings_list:1
/sys/devices/system/cpu/cpu2/topology/core_id:2
/sys/devices/system/cpu/cpu2/topology/core_siblings:0f
/sys/devices/system/cpu/cpu2/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu2/topology/physical_package_id:0
/sys/devices/system/cpu/cpu2/topology/thread_siblings:04
/sys/devices/system/cpu/cpu2/topology/thread_siblings_list:2
/sys/devices/system/cpu/cpu3/topology/core_id:3
/sys/devices/system/cpu/cpu3/topology/core_siblings:0f
/sys/devices/system/cpu/cpu3/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu3/topology/physical_package_id:0
/sys/devices/system/cpu/cpu3/topology/thread_siblings:08
/sys/devices/system/cpu/cpu3/topology/thread_siblings_list:3
/sys/devices/system/cpu/cpu4/topology/core_id:0
/sys/devices/system/cpu/cpu4/topology/core_siblings:f0
/sys/devices/system/cpu/cpu4/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu4/topology/physical_package_id:1
/sys/devices/system/cpu/cpu4/topology/thread_siblings:10
/sys/devices/system/cpu/cpu4/topology/thread_siblings_list:4
/sys/devices/system/cpu/cpu5/topology/core_id:1
/sys/devices/system/cpu/cpu5/topology/core_siblings:f0
/sys/devices/system/cpu/cpu5/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu5/topology/physical_package_id:1
/sys/devices/system/cpu/cpu5/topology/thread_siblings:20
/sys/devices/system/cpu/cpu5/topology/thread_siblings_list:5
/sys/devices/system/cpu/cpu6/topology/core_id:2
/sys/devices/system/cpu/cpu6/topology/core_siblings:f0
/sys/devices/system/cpu/cpu6/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu6/topology/physical_package_id:1
/sys/devices/system/cpu/cpu6/topology/thread_siblings:40
/sys/devices/system/cpu/cpu6/topology/thread_siblings_list:6
/sys/devices/system/cpu/cpu7/topology/core_id:3
/sys/devices/system/cpu/cpu7/topology/core_siblings:f0
/sys/devices/system/cpu/cpu7/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu7/topology/physical_package_id:1
/sys/devices/system/cpu/cpu7/topology/thread_siblings:80
/sys/devices/system/cpu/cpu7/topology/thread_siblings_list:7

No change before/after (both match my view of the hardware).

>
>>>> For me, it fails on the following big.LITTLE systems:
>>>>
>>>>     R-Car H3 ES2.0 (4xCA57 + 4xCA53)
>>>>     R-Car M3-W (2xCA57 + 4xCA53)
>>>>
>>>
>>> Interesting, is it PSCI based system suspend ?
>>
>> Yes it is.
>
> From DT, I guess this platform doesn't have any idle states.
> Does this use genpd power domains ? I see power-domains in the DT, so
> asking to get more info. Do you have any out of tree patches especially
> if they are depending on some topology cpumasks ?

No out-of-tree patches.
I'm testing plain 37c3ec2d810f87ea vs. 37c3ec2d810f87ea^.
There are power-domains in DT, but they're not managed by the new
fancy CPU power domain code.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

WARNING: multiple messages have this Message-ID (diff)
From: geert@linux-m68k.org (Geert Uytterhoeven)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 00/12] Support PPTT for ARM64
Date: Tue, 29 May 2018 17:50:47 +0200	[thread overview]
Message-ID: <CAMuHMdWgsRTqrgwi5Z_xyNXmzS1h4gxLaawdFAL_DGF+Yt8s-A@mail.gmail.com> (raw)
In-Reply-To: <551905a6-eaa8-97df-06ec-1ceedfbc164f@arm.com>

Hi Sudeep,

On Tue, May 29, 2018 at 3:18 PM, Sudeep Holla <sudeep.holla@arm.com> wrote:
> On 29/05/18 12:56, Geert Uytterhoeven wrote:
>> On Tue, May 29, 2018 at 1:14 PM, Sudeep Holla <sudeep.holla@arm.com> wrote:
>>> On 29/05/18 11:48, Geert Uytterhoeven wrote:
>>>> On Thu, May 17, 2018 at 7:05 PM, Catalin Marinas
>>>> <catalin.marinas@arm.com> wrote:
>>>>> On Fri, May 11, 2018 at 06:57:55PM -0500, Jeremy Linton wrote:
>>>>>> Jeremy Linton (12):
>>>>>>   arm64: topology: divorce MC scheduling domain from core_siblings
>>>>>
>>>>> Queued for 4.18 (without Sudeep's latest property_read_u64 cacheinfo
>>>>> patch - http://lkml.kernel.org/r/20180517154701.GA20281 at e107155-lin; I
>>>>> can add it separately).
>>>>
>>>> This is now commit 37c3ec2d810f87ea ("arm64: topology: divorce MC
>>>> scheduling domain from core_siblings") in arm64/for-next/core, causing
>>>> system suspend on big.LITTLE systems to hang after shutting down the first
>>>> CPU:
>>>>
>>>>     $ echo mem > /sys/power/state
>>>>     PM: suspend entry (deep)
>>>>     PM: Syncing filesystems ... done.
>>>>     Freezing user space processes ... (elapsed 0.001 seconds) done.
>>>>     OOM killer disabled.
>>>>     Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
>>>>     Disabling non-boot CPUs ...
>>>>     CPU1: shutdown
>>>>     psci: CPU1 killed.
>>>
>>> Is it OK to assume the suspend failed just after shutting down one CPU
>>> or it's failing during resume ? It depends on whether you had console
>>> disabled or not.
>>
>> I have no-console-suspend enabled.
>> It's failing during suspend, the next lines should be:
>>
>>     CPU2: shutdown
>>     psci: CPU2 killed.
>>     ...
>
> OK, I was hoping to be something during resume as this patch has nothing
> executed during suspend. Do you see any change in topology before and
> after this patch applied. I am interested in the output of:
>
> $ grep "" /sys/devices/system/cpu/cpu*/topology/*

/sys/devices/system/cpu/cpu0/topology/core_id:0
/sys/devices/system/cpu/cpu0/topology/core_siblings:0f
/sys/devices/system/cpu/cpu0/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu0/topology/physical_package_id:0
/sys/devices/system/cpu/cpu0/topology/thread_siblings:01
/sys/devices/system/cpu/cpu0/topology/thread_siblings_list:0
/sys/devices/system/cpu/cpu1/topology/core_id:1
/sys/devices/system/cpu/cpu1/topology/core_siblings:0f
/sys/devices/system/cpu/cpu1/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu1/topology/physical_package_id:0
/sys/devices/system/cpu/cpu1/topology/thread_siblings:02
/sys/devices/system/cpu/cpu1/topology/thread_siblings_list:1
/sys/devices/system/cpu/cpu2/topology/core_id:2
/sys/devices/system/cpu/cpu2/topology/core_siblings:0f
/sys/devices/system/cpu/cpu2/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu2/topology/physical_package_id:0
/sys/devices/system/cpu/cpu2/topology/thread_siblings:04
/sys/devices/system/cpu/cpu2/topology/thread_siblings_list:2
/sys/devices/system/cpu/cpu3/topology/core_id:3
/sys/devices/system/cpu/cpu3/topology/core_siblings:0f
/sys/devices/system/cpu/cpu3/topology/core_siblings_list:0-3
/sys/devices/system/cpu/cpu3/topology/physical_package_id:0
/sys/devices/system/cpu/cpu3/topology/thread_siblings:08
/sys/devices/system/cpu/cpu3/topology/thread_siblings_list:3
/sys/devices/system/cpu/cpu4/topology/core_id:0
/sys/devices/system/cpu/cpu4/topology/core_siblings:f0
/sys/devices/system/cpu/cpu4/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu4/topology/physical_package_id:1
/sys/devices/system/cpu/cpu4/topology/thread_siblings:10
/sys/devices/system/cpu/cpu4/topology/thread_siblings_list:4
/sys/devices/system/cpu/cpu5/topology/core_id:1
/sys/devices/system/cpu/cpu5/topology/core_siblings:f0
/sys/devices/system/cpu/cpu5/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu5/topology/physical_package_id:1
/sys/devices/system/cpu/cpu5/topology/thread_siblings:20
/sys/devices/system/cpu/cpu5/topology/thread_siblings_list:5
/sys/devices/system/cpu/cpu6/topology/core_id:2
/sys/devices/system/cpu/cpu6/topology/core_siblings:f0
/sys/devices/system/cpu/cpu6/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu6/topology/physical_package_id:1
/sys/devices/system/cpu/cpu6/topology/thread_siblings:40
/sys/devices/system/cpu/cpu6/topology/thread_siblings_list:6
/sys/devices/system/cpu/cpu7/topology/core_id:3
/sys/devices/system/cpu/cpu7/topology/core_siblings:f0
/sys/devices/system/cpu/cpu7/topology/core_siblings_list:4-7
/sys/devices/system/cpu/cpu7/topology/physical_package_id:1
/sys/devices/system/cpu/cpu7/topology/thread_siblings:80
/sys/devices/system/cpu/cpu7/topology/thread_siblings_list:7

No change before/after (both match my view of the hardware).

>
>>>> For me, it fails on the following big.LITTLE systems:
>>>>
>>>>     R-Car H3 ES2.0 (4xCA57 + 4xCA53)
>>>>     R-Car M3-W (2xCA57 + 4xCA53)
>>>>
>>>
>>> Interesting, is it PSCI based system suspend ?
>>
>> Yes it is.
>
> From DT, I guess this platform doesn't have any idle states.
> Does this use genpd power domains ? I see power-domains in the DT, so
> asking to get more info. Do you have any out of tree patches especially
> if they are depending on some topology cpumasks ?

No out-of-tree patches.
I'm testing plain 37c3ec2d810f87ea vs. 37c3ec2d810f87ea^.
There are power-domains in DT, but they're not managed by the new
fancy CPU power domain code.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  parent reply	other threads:[~2018-05-29 15:50 UTC|newest]

Thread overview: 185+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-11 23:57 [PATCH v9 00/12] Support PPTT for ARM64 Jeremy Linton
2018-05-11 23:57 ` Jeremy Linton
2018-05-11 23:57 ` Jeremy Linton
2018-05-11 23:57 ` [PATCH v9 01/12] drivers: base: cacheinfo: move cache_setup_of_node() Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57 ` [PATCH v9 02/12] drivers: base: cacheinfo: setup DT cache properties early Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-15 17:15   ` Jeremy Linton
2018-05-15 17:15     ` Jeremy Linton
2018-05-15 17:15     ` Jeremy Linton
2018-05-15 19:32     ` Andy Shevchenko
2018-05-15 19:32       ` Andy Shevchenko
2018-05-15 19:32       ` Andy Shevchenko
2018-05-15 19:32       ` Andy Shevchenko
2018-05-16 10:56       ` Sudeep Holla
2018-05-16 10:56         ` Sudeep Holla
2018-05-16 10:56         ` Sudeep Holla
2018-05-16 10:56         ` Sudeep Holla
2018-05-17 15:47         ` Sudeep Holla
2018-05-17 15:47           ` Sudeep Holla
2018-05-17 15:47           ` Sudeep Holla
2018-05-17 15:47           ` Sudeep Holla
2018-05-18 21:50           ` Andy Shevchenko
2018-05-18 21:50             ` Andy Shevchenko
2018-05-18 21:50             ` Andy Shevchenko
2018-05-18 21:50             ` Andy Shevchenko
2018-05-21  9:27             ` Sudeep Holla
2018-05-21  9:27               ` Sudeep Holla
2018-05-21  9:27               ` Sudeep Holla
2018-05-21  9:27               ` Sudeep Holla
2018-05-21 10:15               ` Sudeep Holla
2018-05-21 10:15                 ` Sudeep Holla
2018-05-21 10:15                 ` Sudeep Holla
2018-05-21 10:15                 ` Sudeep Holla
2018-05-21 10:32       ` [PATCH] drivers: base: cacheinfo: use OF property_read_u64 instead of get_property,read_number Sudeep Holla
2018-05-21 10:32         ` [PATCH] drivers: base: cacheinfo: use OF property_read_u64 instead of get_property, read_number Sudeep Holla
2018-05-21 12:53         ` [PATCH v2] drivers: base: cacheinfo: use OF property_read_u32 instead of get_property,read_number Sudeep Holla
2018-05-21 12:53           ` [PATCH v2] drivers: base: cacheinfo: use OF property_read_u32 instead of get_property, read_number Sudeep Holla
2018-06-05 16:21           ` [PATCH v2] drivers: base: cacheinfo: use OF property_read_u32 instead of get_property,read_number Andy Shevchenko
2018-06-05 16:21             ` Andy Shevchenko
2018-06-05 16:26             ` Sudeep Holla
2018-06-05 16:26               ` Sudeep Holla
2018-06-05 16:34               ` Andy Shevchenko
2018-06-05 16:34                 ` Andy Shevchenko
2018-05-17  6:54     ` [PATCH v9 02/12] drivers: base: cacheinfo: setup DT cache properties early Greg KH
2018-05-17  6:54       ` Greg KH
2018-05-17  6:54       ` Greg KH
2018-05-17  9:08       ` Sudeep Holla
2018-05-17  9:08         ` Sudeep Holla
2018-05-17  9:08         ` Sudeep Holla
2018-05-17  9:35         ` Greg KH
2018-05-17  9:35           ` Greg KH
2018-05-17  9:35           ` Greg KH
2018-05-11 23:57 ` [PATCH v9 03/12] cacheinfo: rename of_node to fw_token Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57 ` [PATCH v9 04/12] arm64/acpi: Create arch specific cpu to acpi id helper Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-14 14:41   ` Sudeep Holla
2018-05-14 14:41     ` Sudeep Holla
2018-05-14 14:41     ` Sudeep Holla
2018-05-11 23:58 ` [PATCH v9 05/12] ACPI/PPTT: Add Processor Properties Topology Table parsing Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-12 10:09   ` Rafael J. Wysocki
2018-05-12 10:09     ` Rafael J. Wysocki
2018-05-12 10:09     ` Rafael J. Wysocki
2018-05-12 10:09     ` Rafael J. Wysocki
2018-05-15 21:42     ` Jeremy Linton
2018-05-15 21:42       ` Jeremy Linton
2018-05-15 21:42       ` Jeremy Linton
2018-05-15 21:42       ` Jeremy Linton
2018-05-16  8:24       ` Rafael J. Wysocki
2018-05-16  8:24         ` Rafael J. Wysocki
2018-05-16  8:24         ` Rafael J. Wysocki
2018-05-16  8:24         ` Rafael J. Wysocki
2018-05-11 23:58 ` [PATCH v9 06/12] ACPI: Enable PPTT support on ARM64 Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 07/12] drivers: base cacheinfo: Add support for ACPI based firmware tables Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 08/12] arm64: " Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 09/12] arm64: topology: rename cluster_id Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 10/12] arm64: topology: enable ACPI/PPTT based CPU topology Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 11/12] ACPI: Add PPTT to injectable table list Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-12 10:10   ` Rafael J. Wysocki
2018-05-12 10:10     ` Rafael J. Wysocki
2018-05-12 10:10     ` Rafael J. Wysocki
2018-05-12 10:10     ` Rafael J. Wysocki
2018-05-11 23:58 ` [PATCH v9 12/12] arm64: topology: divorce MC scheduling domain from core_siblings Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-17 17:05 ` [PATCH v9 00/12] Support PPTT for ARM64 Catalin Marinas
2018-05-17 17:05   ` Catalin Marinas
2018-05-17 17:05   ` Catalin Marinas
2018-05-29 10:48   ` Geert Uytterhoeven
2018-05-29 10:48     ` Geert Uytterhoeven
2018-05-29 10:48     ` Geert Uytterhoeven
2018-05-29 10:48     ` Geert Uytterhoeven
2018-05-29 11:14     ` Sudeep Holla
2018-05-29 11:14       ` Sudeep Holla
2018-05-29 11:14       ` Sudeep Holla
2018-05-29 11:14       ` Sudeep Holla
2018-05-29 11:56       ` Geert Uytterhoeven
2018-05-29 11:56         ` Geert Uytterhoeven
2018-05-29 11:56         ` Geert Uytterhoeven
2018-05-29 11:56         ` Geert Uytterhoeven
2018-05-29 13:18         ` Sudeep Holla
2018-05-29 13:18           ` Sudeep Holla
2018-05-29 13:18           ` Sudeep Holla
2018-05-29 13:18           ` Sudeep Holla
2018-05-29 15:08           ` Will Deacon
2018-05-29 15:08             ` Will Deacon
2018-05-29 15:08             ` Will Deacon
2018-05-29 15:08             ` Will Deacon
2018-05-29 15:51             ` Geert Uytterhoeven
2018-05-29 15:51               ` Geert Uytterhoeven
2018-05-29 15:51               ` Geert Uytterhoeven
2018-05-29 15:51               ` Geert Uytterhoeven
2018-05-29 17:08               ` Robin Murphy
2018-05-29 17:08                 ` Robin Murphy
2018-05-29 17:08                 ` Robin Murphy
2018-05-29 17:08                 ` Robin Murphy
2018-05-29 17:18                 ` Geert Uytterhoeven
2018-05-29 17:18                   ` Geert Uytterhoeven
2018-05-29 17:18                   ` Geert Uytterhoeven
2018-05-29 17:18                   ` Geert Uytterhoeven
2018-05-29 17:31                 ` Sudeep Holla
2018-05-29 17:31                   ` Sudeep Holla
2018-05-29 17:31                   ` Sudeep Holla
2018-05-29 17:31                   ` Sudeep Holla
2018-05-29 20:16               ` Will Deacon
2018-05-29 20:16                 ` Will Deacon
2018-05-29 20:16                 ` Will Deacon
2018-05-29 20:16                 ` Will Deacon
2018-05-29 20:48                 ` Jeremy Linton
2018-05-29 20:48                   ` Jeremy Linton
2018-05-29 20:48                   ` Jeremy Linton
2018-05-29 20:48                   ` Jeremy Linton
2018-05-29 21:52               ` Jeremy Linton
2018-05-29 21:52                 ` Jeremy Linton
2018-05-29 21:52                 ` Jeremy Linton
2018-05-29 21:52                 ` Jeremy Linton
2018-05-30 13:24                 ` Sudeep Holla
2018-05-30 13:24                   ` Sudeep Holla
2018-05-30 13:24                   ` Sudeep Holla
2018-05-30 13:24                   ` Sudeep Holla
2018-05-29 15:23           ` Jeremy Linton
2018-05-29 15:23             ` Jeremy Linton
2018-05-29 15:23             ` Jeremy Linton
2018-05-29 15:23             ` Jeremy Linton
2018-05-29 15:50           ` Geert Uytterhoeven [this message]
2018-05-29 15:50             ` Geert Uytterhoeven
2018-05-29 15:50             ` Geert Uytterhoeven
2018-05-29 15:50             ` Geert Uytterhoeven
2018-05-30  8:52             ` Morten Rasmussen
2018-05-30  8:52               ` Morten Rasmussen
2018-05-30  8:52               ` Morten Rasmussen
2018-05-30  8:52               ` Morten Rasmussen
2018-06-05 13:55     ` [PATCH 1/3] Revert "arm64: topology: divorce MC scheduling domain from core_siblings" Sudeep Holla
2018-06-05 13:55       ` Sudeep Holla
2018-06-05 13:55       ` [PATCH 2/3] ACPI / PPTT: fix build when CONFIG_ACPI_PPTT is not enabled Sudeep Holla
2018-06-05 13:55         ` Sudeep Holla
2018-06-05 13:55       ` [PATCH 3/3] arm64: disable ACPI PPTT support temporarily Sudeep Holla
2018-06-05 13:55         ` Sudeep Holla
2018-06-05 14:09       ` [PATCH 1/3] Revert "arm64: topology: divorce MC scheduling domain from core_siblings" Geert Uytterhoeven
2018-06-05 14:09         ` Geert Uytterhoeven
2018-06-05 14:12         ` Sudeep Holla
2018-06-05 14:12           ` Sudeep Holla
2018-06-04 15:12   ` [PATCH v9 00/12] Support PPTT for ARM64 Catalin Marinas
2018-06-04 15:12     ` Catalin Marinas
2018-06-04 15:12     ` Catalin Marinas

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