Re: [PATCH v6 15/20] watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro

From: Sam Protsenko <semen.protsenko@linaro.org>
To: Peter Griffin <peter.griffin@linaro.org>
Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	 mturquette@baylibre.com, conor+dt@kernel.org, sboyd@kernel.org,
	 tomasz.figa@gmail.com, s.nawrocki@samsung.com,
	linus.walleij@linaro.org,  wim@linux-watchdog.org,
	linux@roeck-us.net, catalin.marinas@arm.com,  will@kernel.org,
	arnd@arndb.de, olof@lixom.net, gregkh@linuxfoundation.org,
	 jirislaby@kernel.org, cw00.choi@samsung.com,
	alim.akhtar@samsung.com,  tudor.ambarus@linaro.org,
	andre.draszik@linaro.org, saravanak@google.com,
	 willmcvicker@google.com, soc@kernel.org,
	devicetree@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org,  linux-clk@vger.kernel.org,
	linux-gpio@vger.kernel.org,  linux-watchdog@vger.kernel.org,
	kernel-team@android.com,  linux-serial@vger.kernel.org
Subject: Re: [PATCH v6 15/20] watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro
Date: Sun, 10 Dec 2023 17:37:25 -0600	[thread overview]
Message-ID: <CAPLW+4nUT8Nf9zC6UrAMJ_OpLNqe7JWxKy7xp1+_+emNgG4qkA@mail.gmail.com> (raw)
In-Reply-To: <20231209233106.147416-16-peter.griffin@linaro.org>

On Sat, Dec 9, 2023 at 5:31 PM Peter Griffin <peter.griffin@linaro.org> wrote:
>
> Update the remaining QUIRK macros to use the BIT macro.
>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>

>  drivers/watchdog/s3c2410_wdt.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
> index 7ecb762a371d..b7a03668f743 100644
> --- a/drivers/watchdog/s3c2410_wdt.c
> +++ b/drivers/watchdog/s3c2410_wdt.c
> @@ -107,11 +107,11 @@
>   * DBGACK_MASK bit disables the watchdog outputs when the SoC is in debug mode.
>   * Debug mode is determined by the DBGACK CPU signal.
>   */
> -#define QUIRK_HAS_WTCLRINT_REG                 (1 << 0)
> -#define QUIRK_HAS_PMU_MASK_RESET               (1 << 1)
> -#define QUIRK_HAS_PMU_RST_STAT                 (1 << 2)
> -#define QUIRK_HAS_PMU_AUTO_DISABLE             (1 << 3)
> -#define QUIRK_HAS_PMU_CNT_EN                   (1 << 4)
> +#define QUIRK_HAS_WTCLRINT_REG                 BIT(0)
> +#define QUIRK_HAS_PMU_MASK_RESET               BIT(1)
> +#define QUIRK_HAS_PMU_RST_STAT                 BIT(2)
> +#define QUIRK_HAS_PMU_AUTO_DISABLE             BIT(3)
> +#define QUIRK_HAS_PMU_CNT_EN                   BIT(4)
>  #define QUIRK_HAS_DBGACK_BIT                   BIT(5)
>
>  /* These quirks require that we have a PMU register map */
> --
> 2.43.0.472.g3155946c3a-goog
>