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From: "S.H. Xie" <shaohui.xie@nxp.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
	"will.deacon@arm.com" <will.deacon@arm.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"arnd@arndb.de" <arnd@arndb.de>, Vincent Hu <mingkai.hu@nxp.com>,
	Horia Geanta Neag <horia.geanta@nxp.com>,
	"Mihai Emilian Bantea" <mihai.bantea@nxp.com>,
	"C.H. Zhao" <chenhui.zhao@nxp.com>,
	"Q.Y. Gong" <qianyu.gong@nxp.com>,
	"M.H. Lian" <minghuan.lian@nxp.com>,
	"Z.Q. Hou" <zhiqiang.hou@nxp.com>
Subject: RE: [PATCH 3/7] [v2] arm64: dts: add QorIQ LS1046A SoC support
Date: Fri, 9 Sep 2016 06:48:14 +0000	[thread overview]
Message-ID: <DB5PR0401MB218327FA907E7224994C09BCE8FA0@DB5PR0401MB2183.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20160908131326.GE26570@leverpostej>

> > +	pmu {
> > +		compatible = "arm,armv8-pmuv3";
> > +		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
> > +			     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
> > +			     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
> > +			     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
> > +		interrupt-affinity = <&cpu0>,
> > +				     <&cpu1>,
> > +				     <&cpu2>,
> > +				     <&cpu3>;
> > +	};
> 
> The compatible string should be "arm,cortex-a72-pmu".
[S.H] Will fix it in next version.

Thanks,
Shaohui

WARNING: multiple messages have this Message-ID (diff)
From: "S.H. Xie" <shaohui.xie-3arQi8VN3Tc@public.gmane.org>
To: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Cc: "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
	<robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"catalin.marinas-5wv7dgnIgG8@public.gmane.org"
	<catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
	"will.deacon-5wv7dgnIgG8@public.gmane.org"
	<will.deacon-5wv7dgnIgG8@public.gmane.org>,
	"shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
	<shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"arnd-r2nGTMty4D4@public.gmane.org"
	<arnd-r2nGTMty4D4@public.gmane.org>,
	Vincent Hu <mingkai.hu-3arQi8VN3Tc@public.gmane.org>,
	Horia Geanta Neag <horia.geanta-3arQi8VN3Tc@public.gmane.org>,
	Mihai Emilian Bantea <mihai.bantea-3arQi8VN3Tc@public.gmane.org>,
	"C.H. Zhao" <chenhui.zhao-3arQi8VN3Tc@public.gmane.org>,
	"Q.Y. Gong" <qianyu.gong-3arQi8VN3Tc@public.gmane.org>,
	"M.H. Lian" <minghuan.lian-3arQi8VN3Tc@public.gmane.org>,
	"Z.Q. Hou" <zhiqiang.hou-3arQi8VN3Tc@public.gmane.org>
Subject: RE: [PATCH 3/7] [v2] arm64: dts: add QorIQ LS1046A SoC support
Date: Fri, 9 Sep 2016 06:48:14 +0000	[thread overview]
Message-ID: <DB5PR0401MB218327FA907E7224994C09BCE8FA0@DB5PR0401MB2183.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20160908131326.GE26570@leverpostej>

> > +	pmu {
> > +		compatible = "arm,armv8-pmuv3";
> > +		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
> > +			     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
> > +			     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
> > +			     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
> > +		interrupt-affinity = <&cpu0>,
> > +				     <&cpu1>,
> > +				     <&cpu2>,
> > +				     <&cpu3>;
> > +	};
> 
> The compatible string should be "arm,cortex-a72-pmu".
[S.H] Will fix it in next version.

Thanks,
Shaohui
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WARNING: multiple messages have this Message-ID (diff)
From: shaohui.xie@nxp.com (S.H. Xie)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/7] [v2] arm64: dts: add QorIQ LS1046A SoC support
Date: Fri, 9 Sep 2016 06:48:14 +0000	[thread overview]
Message-ID: <DB5PR0401MB218327FA907E7224994C09BCE8FA0@DB5PR0401MB2183.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20160908131326.GE26570@leverpostej>

> > +	pmu {
> > +		compatible = "arm,armv8-pmuv3";
> > +		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
> > +			     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
> > +			     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
> > +			     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
> > +		interrupt-affinity = <&cpu0>,
> > +				     <&cpu1>,
> > +				     <&cpu2>,
> > +				     <&cpu3>;
> > +	};
> 
> The compatible string should be "arm,cortex-a72-pmu".
[S.H] Will fix it in next version.

Thanks,
Shaohui

  parent reply	other threads:[~2016-09-09  6:48 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-05 10:01 [PATCH 0/7] [v2] arm64: dts: add QorIQ LS1046A SoC and boards support shh.xie
2016-09-05 10:01 ` shh.xie at gmail.com
2016-09-05 10:01 ` shh.xie
2016-09-05 10:01 ` [PATCH 1/7] [v2] dt-bindings: fsl: updates bindings for some SoC-specific devices shh.xie
2016-09-05 10:01   ` shh.xie at gmail.com
2016-09-05 10:01   ` shh.xie
2016-09-08  2:30   ` Shawn Guo
2016-09-08  2:30     ` Shawn Guo
2016-09-08  2:30     ` Shawn Guo
2016-09-08 10:57     ` S.H. Xie
2016-09-08 10:57       ` S.H. Xie
2016-09-08 10:57       ` S.H. Xie
2016-09-05 10:01 ` [PATCH 2/7] [v2] dt-bindings: i2c: adds two more nxp devices shh.xie
2016-09-05 10:01   ` shh.xie at gmail.com
2016-09-05 10:01   ` shh.xie
2016-09-12 16:33   ` Rob Herring
2016-09-12 16:33     ` Rob Herring
2016-09-12 16:33     ` Rob Herring
2016-09-05 10:01 ` [PATCH 3/7] [v2] arm64: dts: add QorIQ LS1046A SoC support shh.xie
2016-09-05 10:01   ` shh.xie at gmail.com
2016-09-05 10:01   ` shh.xie
2016-09-08 13:05   ` Shawn Guo
2016-09-08 13:05     ` Shawn Guo
2016-09-09  6:46     ` S.H. Xie
2016-09-09  6:46       ` S.H. Xie
2016-09-09  6:46       ` S.H. Xie
2016-09-08 13:13   ` Mark Rutland
2016-09-08 13:13     ` Mark Rutland
2016-09-08 13:18     ` Mark Rutland
2016-09-08 13:18       ` Mark Rutland
2016-09-08 13:18       ` Mark Rutland
2016-09-09  6:55       ` S.H. Xie
2016-09-09  6:55         ` S.H. Xie
2016-09-09  6:55         ` S.H. Xie
2016-09-09  9:10         ` Mark Rutland
2016-09-09  9:10           ` Mark Rutland
2016-09-09  9:10           ` Mark Rutland
2016-09-09  9:17           ` S.H. Xie
2016-09-09  9:17             ` S.H. Xie
2016-09-09  9:17             ` S.H. Xie
2016-09-09  6:48     ` S.H. Xie [this message]
2016-09-09  6:48       ` S.H. Xie
2016-09-09  6:48       ` S.H. Xie
2016-09-08 13:23   ` Marc Zyngier
2016-09-08 13:23     ` Marc Zyngier
2016-09-08 13:23     ` Marc Zyngier
2016-09-09  9:00     ` S.H. Xie
2016-09-09  9:00       ` S.H. Xie
2016-09-09  9:00       ` S.H. Xie
2016-09-05 10:01 ` [PATCH 4/7] [v2] Documentation: DT: Add entry for QorIQ LS1046A-RDB board shh.xie
2016-09-05 10:01   ` shh.xie at gmail.com
2016-09-05 10:01   ` shh.xie
2016-09-05 10:01 ` [PATCH 5/7] [v2] arm64: dts: add LS1046A-RDB board support shh.xie
2016-09-05 10:01   ` shh.xie at gmail.com
2016-09-05 10:01   ` shh.xie
2016-09-08 13:12   ` Shawn Guo
2016-09-08 13:12     ` Shawn Guo
2016-09-09  6:44     ` S.H. Xie
2016-09-09  6:44       ` S.H. Xie
2016-09-09  6:44       ` S.H. Xie
2016-09-05 10:01 ` [PATCH 6/7] [v2] Documentation: DT: Add entry for QorIQ LS1046A-QDS board shh.xie
2016-09-05 10:01   ` shh.xie at gmail.com
2016-09-05 10:01   ` shh.xie
2016-09-05 10:01 ` [PATCH 7/7] [v2] arm64: dts: add LS1046A-QDS board support shh.xie
2016-09-05 10:01   ` shh.xie at gmail.com
2016-09-05 10:01   ` shh.xie

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