From: Kostya Porotchkin <kostap@marvell.com> To: Russell King - ARM Linux admin <linux@armlinux.org.uk> Cc: Baruch Siach <baruch@tkos.co.il>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "andrew@lunn.ch" <andrew@lunn.ch>, "jaz@semihalf.com" <jaz@semihalf.com>, "gregory.clement@bootlin.com" <gregory.clement@bootlin.com>, Nadav Haklai <nadavh@marvell.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, Stefan Chulski <stefanc@marvell.com>, "mw@semihalf.com" <mw@semihalf.com>, Ben Peled <bpeled@marvell.com>, "sebastian.hesselbarth@gmail.com" <sebastian.hesselbarth@gmail.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: RE: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI settings Date: Wed, 3 Feb 2021 16:57:09 +0000 [thread overview] Message-ID: <DM5PR18MB14525D61BC500B0026F30D07CAB49@DM5PR18MB1452.namprd18.prod.outlook.com> (raw) In-Reply-To: <20210203161137.GS1463@shell.armlinux.org.uk> Hello, Russell, I agree that this patch needs rework. I will definitely do it and issue a new version. > On Wed, Feb 03, 2021 at 02:50:45PM +0000, Kostya Porotchkin wrote: > > [KP] So for older systems this "slow mode" parameter could be set on the > board level. > > When it is set in ap80x,dtsi file it downgrades all systems to HS-SDR52, even > if they support HS400 on AP side. > > MacchiatoBIN AP eMMC is connected to 3.3v regulator and has "no-1-8-v" > flag set, so it should remain in low speed anyway. > > Your reasoning does not make sense. > > The ap80x.dtsi file does not specify "marvell,xenon-phy-slow-mode". > It is not specified at this level. It is already specified at board level. [KP] it does. In current armada-ap80x.dtsi File this specification is on row 260: ap_sdhci0: sdhci@6e0000 { compatible = "marvell,armada-ap806-sdhci"; reg = <0x6e0000 0x300>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core"; clocks = <&ap_clk 4>; dma-coherent; marvell,xenon-phy-slow-mode; status = "disabled"; }; So I would like to remove this row. > Given that Macchiatobin will still use slow mode, why remove the > marvell,xenon-phy-slow-mode property from this file? [KP] Agree, I will keep this property in Macchiatobin DTS file. > > Also, if you're upgrading ap80x.dtsi to use a bus-width of 8, why keep the bus- > width specifier of 8 in the board files? [KP] The bus width is updated in A8040 DB DTS. This board utilizes 8-bit interface. The armada-ap80x.dtsi file does not specifies the bus width since it is board-specific. > > This patch just doesn't make sense, and your responses to our points seem to > add to the confusion. [KP] I am sorry about it. Hope my last response clarifies it. Kosta > > -- > RMK's Patch system: https://urldefense.proofpoint.com/v2/url?u=https- > 3A__www.armlinux.org.uk_developer_patches_&d=DwIBAg&c=nKjWec2b6R0 > mOyPaz7xtfQ&r=- > N9sN4p5NSr0JGQoQ_2UCOgAqajG99W1EbSOww0WU8o&m=V27OOcgNqKN2 > WrlW2YFvHm_D_dXoP44wPd5zyOKvEBk&s=o3OrmStt1ZuXVNlYklTV_b1wY35 > NvPPrdLqwGgtxRZU&e= > FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
WARNING: multiple messages have this Message-ID (diff)
From: Kostya Porotchkin <kostap@marvell.com> To: Russell King - ARM Linux admin <linux@armlinux.org.uk> Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, Baruch Siach <baruch@tkos.co.il>, "andrew@lunn.ch" <andrew@lunn.ch>, "jaz@semihalf.com" <jaz@semihalf.com>, "gregory.clement@bootlin.com" <gregory.clement@bootlin.com>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, Nadav Haklai <nadavh@marvell.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, Stefan Chulski <stefanc@marvell.com>, "mw@semihalf.com" <mw@semihalf.com>, Ben Peled <bpeled@marvell.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "sebastian.hesselbarth@gmail.com" <sebastian.hesselbarth@gmail.com> Subject: RE: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI settings Date: Wed, 3 Feb 2021 16:57:09 +0000 [thread overview] Message-ID: <DM5PR18MB14525D61BC500B0026F30D07CAB49@DM5PR18MB1452.namprd18.prod.outlook.com> (raw) In-Reply-To: <20210203161137.GS1463@shell.armlinux.org.uk> Hello, Russell, I agree that this patch needs rework. I will definitely do it and issue a new version. > On Wed, Feb 03, 2021 at 02:50:45PM +0000, Kostya Porotchkin wrote: > > [KP] So for older systems this "slow mode" parameter could be set on the > board level. > > When it is set in ap80x,dtsi file it downgrades all systems to HS-SDR52, even > if they support HS400 on AP side. > > MacchiatoBIN AP eMMC is connected to 3.3v regulator and has "no-1-8-v" > flag set, so it should remain in low speed anyway. > > Your reasoning does not make sense. > > The ap80x.dtsi file does not specify "marvell,xenon-phy-slow-mode". > It is not specified at this level. It is already specified at board level. [KP] it does. In current armada-ap80x.dtsi File this specification is on row 260: ap_sdhci0: sdhci@6e0000 { compatible = "marvell,armada-ap806-sdhci"; reg = <0x6e0000 0x300>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core"; clocks = <&ap_clk 4>; dma-coherent; marvell,xenon-phy-slow-mode; status = "disabled"; }; So I would like to remove this row. > Given that Macchiatobin will still use slow mode, why remove the > marvell,xenon-phy-slow-mode property from this file? [KP] Agree, I will keep this property in Macchiatobin DTS file. > > Also, if you're upgrading ap80x.dtsi to use a bus-width of 8, why keep the bus- > width specifier of 8 in the board files? [KP] The bus width is updated in A8040 DB DTS. This board utilizes 8-bit interface. The armada-ap80x.dtsi file does not specifies the bus width since it is board-specific. > > This patch just doesn't make sense, and your responses to our points seem to > add to the confusion. [KP] I am sorry about it. Hope my last response clarifies it. Kosta > > -- > RMK's Patch system: https://urldefense.proofpoint.com/v2/url?u=https- > 3A__www.armlinux.org.uk_developer_patches_&d=DwIBAg&c=nKjWec2b6R0 > mOyPaz7xtfQ&r=- > N9sN4p5NSr0JGQoQ_2UCOgAqajG99W1EbSOww0WU8o&m=V27OOcgNqKN2 > WrlW2YFvHm_D_dXoP44wPd5zyOKvEBk&s=o3OrmStt1ZuXVNlYklTV_b1wY35 > NvPPrdLqwGgtxRZU&e= > FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-02-03 17:00 UTC|newest] Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-02-03 13:31 [PATCH 00/11] Device tree fixes for Armada family kostap 2021-02-03 13:31 ` kostap 2021-02-03 13:31 ` [PATCH 01/11] fix: arm64: dts: replace wrong regulator on ap emmc kostap 2021-02-03 13:31 ` kostap 2021-02-03 13:31 ` [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI settings kostap 2021-02-03 13:31 ` kostap 2021-02-03 13:58 ` Baruch Siach 2021-02-03 13:58 ` Baruch Siach 2021-02-03 14:37 ` [EXT] " Kostya Porotchkin 2021-02-03 14:37 ` Kostya Porotchkin 2021-02-03 14:38 ` Russell King - ARM Linux admin 2021-02-03 14:38 ` Russell King - ARM Linux admin 2021-02-03 14:50 ` Kostya Porotchkin 2021-02-03 14:50 ` Kostya Porotchkin 2021-02-03 15:03 ` Kostya Porotchkin 2021-02-03 15:03 ` Kostya Porotchkin 2021-02-03 16:11 ` Russell King - ARM Linux admin 2021-02-03 16:11 ` Russell King - ARM Linux admin 2021-02-03 16:57 ` Kostya Porotchkin [this message] 2021-02-03 16:57 ` Kostya Porotchkin 2021-02-05 9:33 ` Marcin Wojtas 2021-02-05 9:33 ` Marcin Wojtas 2021-02-03 13:31 ` [PATCH 03/11] dts: mvebu: Add pin control definitions for SDIO interafce kostap 2021-02-03 13:31 ` kostap 2021-02-03 14:00 ` Baruch Siach 2021-02-03 14:00 ` Baruch Siach 2021-02-03 14:39 ` [EXT] " Kostya Porotchkin 2021-02-03 14:39 ` Kostya Porotchkin 2021-02-03 14:28 ` Russell King - ARM Linux admin 2021-02-03 14:28 ` Russell King - ARM Linux admin 2021-02-03 14:41 ` [EXT] " Kostya Porotchkin 2021-02-03 14:41 ` Kostya Porotchkin 2021-02-03 15:41 ` Andrew Lunn 2021-02-03 15:41 ` Andrew Lunn 2021-02-03 15:49 ` Kostya Porotchkin 2021-02-03 15:49 ` Kostya Porotchkin 2021-02-03 13:31 ` [PATCH 04/11] fix: dts: a8k: Add CP eMMC regulator and update device parameters kostap 2021-02-03 13:31 ` kostap 2021-02-03 13:31 ` [PATCH 05/11] arm64: dts: marvell: armada-3720-db: add comphy references kostap 2021-02-03 13:31 ` kostap 2021-02-03 13:31 ` [PATCH 06/11] arm64: dts: marvell: armada-3270-espressobin: " kostap 2021-02-03 13:31 ` kostap 2021-02-03 13:31 ` [PATCH 07/11] fix: ARM64: dts: cp110: Switch to 8-bit ECC NAND setting kostap 2021-02-03 13:31 ` kostap 2021-02-03 13:31 ` [PATCH 08/11] arm64: dts: marvell: armada-3720-db: add eeprom description kostap 2021-02-03 13:31 ` kostap 2021-02-03 13:31 ` [PATCH 09/11] dts: a3700: enable dma coherence for PCIE interface kostap 2021-02-03 13:31 ` kostap 2021-02-05 9:45 ` Marcin Wojtas 2021-02-05 9:45 ` Marcin Wojtas 2021-02-03 13:31 ` [PATCH 10/11] dts: marvell: add 2 eeprom properties to A8K DB device tree kostap 2021-02-03 13:31 ` kostap 2021-02-03 13:31 ` [PATCH 11/11] dts: marvell: add 2 eeprom properties to A7K " kostap 2021-02-03 13:31 ` kostap
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