* [PATCH 1/2] drm/amd/powerplay: add ECC feature bit
@ 2019-03-22 18:06 Evan Quan
[not found] ` <20190322180630.19021-1-evan.quan-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Evan Quan @ 2019-03-22 18:06 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Evan Quan
It's OK to have this feature bit with old SMU firmwares.
But the feature should be disabled on them.
Change-Id: I6fb4869ef454ea7b6d01cf368b457be01eeb5058
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 10 +++++++++-
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h | 1 +
drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h | 3 ++-
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
index fac7a5df7c27..49be888fcd50 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
@@ -91,6 +91,12 @@ static void vega20_set_default_registry_data(struct pp_hwmgr *hwmgr)
* MP0CLK DS
*/
data->registry_data.disallowed_features = 0xE0041C00;
+ /* ECC feature should be disabled on old SMUs */
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
+ hwmgr->smu_version = smum_get_argument(hwmgr);
+ if (hwmgr->smu_version < 0x282100)
+ data->registry_data.disallowed_features |= FEATURE_ECC_MASK;
+
data->registry_data.od_state_in_dc_support = 0;
data->registry_data.thermal_support = 1;
data->registry_data.skip_baco_hardware = 0;
@@ -357,6 +363,7 @@ static void vega20_init_dpm_defaults(struct pp_hwmgr *hwmgr)
data->smu_features[GNLD_DS_MP1CLK].smu_feature_id = FEATURE_DS_MP1CLK_BIT;
data->smu_features[GNLD_DS_MP0CLK].smu_feature_id = FEATURE_DS_MP0CLK_BIT;
data->smu_features[GNLD_XGMI].smu_feature_id = FEATURE_XGMI_BIT;
+ data->smu_features[GNLD_ECC].smu_feature_id = FEATURE_ECC_BIT;
for (i = 0; i < GNLD_FEATURES_MAX; i++) {
data->smu_features[i].smu_feature_bitmap =
@@ -3048,7 +3055,8 @@ static int vega20_get_ppfeature_status(struct pp_hwmgr *hwmgr, char *buf)
"FCLK_DS",
"MP1CLK_DS",
"MP0CLK_DS",
- "XGMI"};
+ "XGMI",
+ "ECC"};
static const char *output_title[] = {
"FEATURES",
"BITMASK",
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
index a46cdeb7da70..c3890b5e076c 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
@@ -81,6 +81,7 @@ enum {
GNLD_DS_MP1CLK,
GNLD_DS_MP0CLK,
GNLD_XGMI,
+ GNLD_ECC,
GNLD_FEATURES_MAX
};
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
index 63d5cf691549..b90089a4fb6a 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
@@ -99,7 +99,7 @@
#define FEATURE_DS_MP1CLK_BIT 30
#define FEATURE_DS_MP0CLK_BIT 31
#define FEATURE_XGMI_BIT 32
-#define FEATURE_SPARE_33_BIT 33
+#define FEATURE_ECC_BIT 33
#define FEATURE_SPARE_34_BIT 34
#define FEATURE_SPARE_35_BIT 35
#define FEATURE_SPARE_36_BIT 36
@@ -166,6 +166,7 @@
#define FEATURE_DS_MP1CLK_MASK (1 << FEATURE_DS_MP1CLK_BIT )
#define FEATURE_DS_MP0CLK_MASK (1 << FEATURE_DS_MP0CLK_BIT )
#define FEATURE_XGMI_MASK (1 << FEATURE_XGMI_BIT )
+#define FEATURE_ECC_MASK (1ULL << FEATURE_ECC_BIT )
#define DPM_OVERRIDE_DISABLE_SOCCLK_PID 0x00000001
#define DPM_OVERRIDE_DISABLE_UCLK_PID 0x00000002
--
2.21.0
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] drm/amd/powerplay: correct data type to avoid overflow
[not found] ` <20190322180630.19021-1-evan.quan-5C7GfCeVMHo@public.gmane.org>
@ 2019-03-22 18:06 ` Evan Quan
[not found] ` <20190322180630.19021-2-evan.quan-5C7GfCeVMHo@public.gmane.org>
2019-03-26 10:15 ` [PATCH 1/2] drm/amd/powerplay: add ECC feature bit Quan, Evan
2019-03-28 5:14 ` Xu, Feifei
2 siblings, 1 reply; 6+ messages in thread
From: Evan Quan @ 2019-03-22 18:06 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Evan Quan
Avoid left shift overflow.
Change-Id: If03f4f4d440b6d742d8eaa23d0bae6ddd21c01ea
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
index b90089a4fb6a..195c4ae67058 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
@@ -165,7 +165,7 @@
#define FEATURE_DS_FCLK_MASK (1 << FEATURE_DS_FCLK_BIT )
#define FEATURE_DS_MP1CLK_MASK (1 << FEATURE_DS_MP1CLK_BIT )
#define FEATURE_DS_MP0CLK_MASK (1 << FEATURE_DS_MP0CLK_BIT )
-#define FEATURE_XGMI_MASK (1 << FEATURE_XGMI_BIT )
+#define FEATURE_XGMI_MASK (1ULL << FEATURE_XGMI_BIT )
#define FEATURE_ECC_MASK (1ULL << FEATURE_ECC_BIT )
#define DPM_OVERRIDE_DISABLE_SOCCLK_PID 0x00000001
--
2.21.0
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* RE: [PATCH 1/2] drm/amd/powerplay: add ECC feature bit
[not found] ` <20190322180630.19021-1-evan.quan-5C7GfCeVMHo@public.gmane.org>
2019-03-22 18:06 ` [PATCH 2/2] drm/amd/powerplay: correct data type to avoid overflow Evan Quan
@ 2019-03-26 10:15 ` Quan, Evan
2019-03-28 5:14 ` Xu, Feifei
2 siblings, 0 replies; 6+ messages in thread
From: Quan, Evan @ 2019-03-26 10:15 UTC (permalink / raw)
To: Quan, Evan, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Ping..
> -----Original Message-----
> From: Evan Quan <evan.quan@amd.com>
> Sent: 2019年3月23日 2:06
> To: amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan <Evan.Quan@amd.com>
> Subject: [PATCH 1/2] drm/amd/powerplay: add ECC feature bit
>
> It's OK to have this feature bit with old SMU firmwares.
> But the feature should be disabled on them.
>
> Change-Id: I6fb4869ef454ea7b6d01cf368b457be01eeb5058
> Signed-off-by: Evan Quan <evan.quan@amd.com>
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 10
> +++++++++- drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h |
> 1 + drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h | 3 ++-
> 3 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> index fac7a5df7c27..49be888fcd50 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> @@ -91,6 +91,12 @@ static void vega20_set_default_registry_data(struct
> pp_hwmgr *hwmgr)
> * MP0CLK DS
> */
> data->registry_data.disallowed_features = 0xE0041C00;
> + /* ECC feature should be disabled on old SMUs */
> + smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
> + hwmgr->smu_version = smum_get_argument(hwmgr);
> + if (hwmgr->smu_version < 0x282100)
> + data->registry_data.disallowed_features |=
> FEATURE_ECC_MASK;
> +
> data->registry_data.od_state_in_dc_support = 0;
> data->registry_data.thermal_support = 1;
> data->registry_data.skip_baco_hardware = 0; @@ -357,6 +363,7 @@
> static void vega20_init_dpm_defaults(struct pp_hwmgr *hwmgr)
> data->smu_features[GNLD_DS_MP1CLK].smu_feature_id =
> FEATURE_DS_MP1CLK_BIT;
> data->smu_features[GNLD_DS_MP0CLK].smu_feature_id =
> FEATURE_DS_MP0CLK_BIT;
> data->smu_features[GNLD_XGMI].smu_feature_id =
> FEATURE_XGMI_BIT;
> + data->smu_features[GNLD_ECC].smu_feature_id =
> FEATURE_ECC_BIT;
>
> for (i = 0; i < GNLD_FEATURES_MAX; i++) {
> data->smu_features[i].smu_feature_bitmap = @@ -3048,7
> +3055,8 @@ static int vega20_get_ppfeature_status(struct pp_hwmgr
> *hwmgr, char *buf)
> "FCLK_DS",
> "MP1CLK_DS",
> "MP0CLK_DS",
> - "XGMI"};
> + "XGMI",
> + "ECC"};
> static const char *output_title[] = {
> "FEATURES",
> "BITMASK",
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
> index a46cdeb7da70..c3890b5e076c 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
> @@ -81,6 +81,7 @@ enum {
> GNLD_DS_MP1CLK,
> GNLD_DS_MP0CLK,
> GNLD_XGMI,
> + GNLD_ECC,
>
> GNLD_FEATURES_MAX
> };
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> index 63d5cf691549..b90089a4fb6a 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> @@ -99,7 +99,7 @@
> #define FEATURE_DS_MP1CLK_BIT 30
> #define FEATURE_DS_MP0CLK_BIT 31
> #define FEATURE_XGMI_BIT 32
> -#define FEATURE_SPARE_33_BIT 33
> +#define FEATURE_ECC_BIT 33
> #define FEATURE_SPARE_34_BIT 34
> #define FEATURE_SPARE_35_BIT 35
> #define FEATURE_SPARE_36_BIT 36
> @@ -166,6 +166,7 @@
> #define FEATURE_DS_MP1CLK_MASK (1 <<
> FEATURE_DS_MP1CLK_BIT )
> #define FEATURE_DS_MP0CLK_MASK (1 <<
> FEATURE_DS_MP0CLK_BIT )
> #define FEATURE_XGMI_MASK (1 << FEATURE_XGMI_BIT )
> +#define FEATURE_ECC_MASK (1ULL << FEATURE_ECC_BIT )
>
> #define DPM_OVERRIDE_DISABLE_SOCCLK_PID 0x00000001
> #define DPM_OVERRIDE_DISABLE_UCLK_PID 0x00000002
> --
> 2.21.0
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH 2/2] drm/amd/powerplay: correct data type to avoid overflow
[not found] ` <20190322180630.19021-2-evan.quan-5C7GfCeVMHo@public.gmane.org>
@ 2019-03-26 10:15 ` Quan, Evan
[not found] ` <MN2PR12MB3344F0FCFB363AA00DB5207BE45F0-rweVpJHSKToDMgCC8P//OwdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Quan, Evan @ 2019-03-26 10:15 UTC (permalink / raw)
To: Quan, Evan, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Ping..
> -----Original Message-----
> From: Evan Quan <evan.quan@amd.com>
> Sent: 2019年3月23日 2:07
> To: amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan <Evan.Quan@amd.com>
> Subject: [PATCH 2/2] drm/amd/powerplay: correct data type to avoid
> overflow
>
> Avoid left shift overflow.
>
> Change-Id: If03f4f4d440b6d742d8eaa23d0bae6ddd21c01ea
> Signed-off-by: Evan Quan <evan.quan@amd.com>
> ---
> drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> index b90089a4fb6a..195c4ae67058 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> @@ -165,7 +165,7 @@
> #define FEATURE_DS_FCLK_MASK (1 << FEATURE_DS_FCLK_BIT )
> #define FEATURE_DS_MP1CLK_MASK (1 <<
> FEATURE_DS_MP1CLK_BIT )
> #define FEATURE_DS_MP0CLK_MASK (1 <<
> FEATURE_DS_MP0CLK_BIT )
> -#define FEATURE_XGMI_MASK (1 << FEATURE_XGMI_BIT )
> +#define FEATURE_XGMI_MASK (1ULL <<
> FEATURE_XGMI_BIT )
> #define FEATURE_ECC_MASK (1ULL << FEATURE_ECC_BIT )
>
> #define DPM_OVERRIDE_DISABLE_SOCCLK_PID 0x00000001
> --
> 2.21.0
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] drm/amd/powerplay: correct data type to avoid overflow
[not found] ` <MN2PR12MB3344F0FCFB363AA00DB5207BE45F0-rweVpJHSKToDMgCC8P//OwdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2019-03-26 12:59 ` Deucher, Alexander
0 siblings, 0 replies; 6+ messages in thread
From: Deucher, Alexander @ 2019-03-26 12:59 UTC (permalink / raw)
To: Quan, Evan, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
[-- Attachment #1.1: Type: text/plain, Size: 2203 bytes --]
Series is:
Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Quan, Evan <Evan.Quan-5C7GfCeVMHo@public.gmane.org>
Sent: Tuesday, March 26, 2019 6:15 AM
To: Quan, Evan; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: RE: [PATCH 2/2] drm/amd/powerplay: correct data type to avoid overflow
Ping..
> -----Original Message-----
> From: Evan Quan <evan.quan-5C7GfCeVMHo@public.gmane.org>
> Sent: 2019年3月23日 2:07
> To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> Cc: Quan, Evan <Evan.Quan-5C7GfCeVMHo@public.gmane.org>
> Subject: [PATCH 2/2] drm/amd/powerplay: correct data type to avoid
> overflow
>
> Avoid left shift overflow.
>
> Change-Id: If03f4f4d440b6d742d8eaa23d0bae6ddd21c01ea
> Signed-off-by: Evan Quan <evan.quan-5C7GfCeVMHo@public.gmane.org>
> ---
> drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> index b90089a4fb6a..195c4ae67058 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> @@ -165,7 +165,7 @@
> #define FEATURE_DS_FCLK_MASK (1 << FEATURE_DS_FCLK_BIT )
> #define FEATURE_DS_MP1CLK_MASK (1 <<
> FEATURE_DS_MP1CLK_BIT )
> #define FEATURE_DS_MP0CLK_MASK (1 <<
> FEATURE_DS_MP0CLK_BIT )
> -#define FEATURE_XGMI_MASK (1 << FEATURE_XGMI_BIT )
> +#define FEATURE_XGMI_MASK (1ULL <<
> FEATURE_XGMI_BIT )
> #define FEATURE_ECC_MASK (1ULL << FEATURE_ECC_BIT )
>
> #define DPM_OVERRIDE_DISABLE_SOCCLK_PID 0x00000001
> --
> 2.21.0
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH 1/2] drm/amd/powerplay: add ECC feature bit
[not found] ` <20190322180630.19021-1-evan.quan-5C7GfCeVMHo@public.gmane.org>
2019-03-22 18:06 ` [PATCH 2/2] drm/amd/powerplay: correct data type to avoid overflow Evan Quan
2019-03-26 10:15 ` [PATCH 1/2] drm/amd/powerplay: add ECC feature bit Quan, Evan
@ 2019-03-28 5:14 ` Xu, Feifei
2 siblings, 0 replies; 6+ messages in thread
From: Xu, Feifei @ 2019-03-28 5:14 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Quan, Evan
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Evan Quan
Sent: Saturday, March 23, 2019 2:06 AM
To: amd-gfx@lists.freedesktop.org
Cc: Quan, Evan <Evan.Quan@amd.com>
Subject: [PATCH 1/2] drm/amd/powerplay: add ECC feature bit
It's OK to have this feature bit with old SMU firmwares.
But the feature should be disabled on them.
Change-Id: I6fb4869ef454ea7b6d01cf368b457be01eeb5058
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 10 +++++++++- drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h | 1 + drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h | 3 ++-
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
index fac7a5df7c27..49be888fcd50 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
@@ -91,6 +91,12 @@ static void vega20_set_default_registry_data(struct pp_hwmgr *hwmgr)
* MP0CLK DS
*/
data->registry_data.disallowed_features = 0xE0041C00;
+ /* ECC feature should be disabled on old SMUs */
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
+ hwmgr->smu_version = smum_get_argument(hwmgr);
+ if (hwmgr->smu_version < 0x282100)
+ data->registry_data.disallowed_features |= FEATURE_ECC_MASK;
+
data->registry_data.od_state_in_dc_support = 0;
data->registry_data.thermal_support = 1;
data->registry_data.skip_baco_hardware = 0; @@ -357,6 +363,7 @@ static void vega20_init_dpm_defaults(struct pp_hwmgr *hwmgr)
data->smu_features[GNLD_DS_MP1CLK].smu_feature_id = FEATURE_DS_MP1CLK_BIT;
data->smu_features[GNLD_DS_MP0CLK].smu_feature_id = FEATURE_DS_MP0CLK_BIT;
data->smu_features[GNLD_XGMI].smu_feature_id = FEATURE_XGMI_BIT;
+ data->smu_features[GNLD_ECC].smu_feature_id = FEATURE_ECC_BIT;
for (i = 0; i < GNLD_FEATURES_MAX; i++) {
data->smu_features[i].smu_feature_bitmap = @@ -3048,7 +3055,8 @@ static int vega20_get_ppfeature_status(struct pp_hwmgr *hwmgr, char *buf)
"FCLK_DS",
"MP1CLK_DS",
"MP0CLK_DS",
- "XGMI"};
+ "XGMI",
+ "ECC"};
static const char *output_title[] = {
"FEATURES",
"BITMASK",
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
index a46cdeb7da70..c3890b5e076c 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
@@ -81,6 +81,7 @@ enum {
GNLD_DS_MP1CLK,
GNLD_DS_MP0CLK,
GNLD_XGMI,
+ GNLD_ECC,
GNLD_FEATURES_MAX
};
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
index 63d5cf691549..b90089a4fb6a 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
@@ -99,7 +99,7 @@
#define FEATURE_DS_MP1CLK_BIT 30
#define FEATURE_DS_MP0CLK_BIT 31
#define FEATURE_XGMI_BIT 32
-#define FEATURE_SPARE_33_BIT 33
+#define FEATURE_ECC_BIT 33
#define FEATURE_SPARE_34_BIT 34
#define FEATURE_SPARE_35_BIT 35
#define FEATURE_SPARE_36_BIT 36
@@ -166,6 +166,7 @@
#define FEATURE_DS_MP1CLK_MASK (1 << FEATURE_DS_MP1CLK_BIT )
#define FEATURE_DS_MP0CLK_MASK (1 << FEATURE_DS_MP0CLK_BIT )
#define FEATURE_XGMI_MASK (1 << FEATURE_XGMI_BIT )
+#define FEATURE_ECC_MASK (1ULL << FEATURE_ECC_BIT )
#define DPM_OVERRIDE_DISABLE_SOCCLK_PID 0x00000001
#define DPM_OVERRIDE_DISABLE_UCLK_PID 0x00000002
--
2.21.0
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^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-03-28 5:14 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-22 18:06 [PATCH 1/2] drm/amd/powerplay: add ECC feature bit Evan Quan
[not found] ` <20190322180630.19021-1-evan.quan-5C7GfCeVMHo@public.gmane.org>
2019-03-22 18:06 ` [PATCH 2/2] drm/amd/powerplay: correct data type to avoid overflow Evan Quan
[not found] ` <20190322180630.19021-2-evan.quan-5C7GfCeVMHo@public.gmane.org>
2019-03-26 10:15 ` Quan, Evan
[not found] ` <MN2PR12MB3344F0FCFB363AA00DB5207BE45F0-rweVpJHSKToDMgCC8P//OwdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2019-03-26 12:59 ` Deucher, Alexander
2019-03-26 10:15 ` [PATCH 1/2] drm/amd/powerplay: add ECC feature bit Quan, Evan
2019-03-28 5:14 ` Xu, Feifei
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