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From: "Ken.Lin" <ken.lin@advantech.com>
To: "shawnguo@kernel.org" <shawnguo@kernel.org>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	"sboyd@codeaurora.org" <sboyd@codeaurora.org>,
	"mturquette@baylibre.com" <mturquette@baylibre.com>
Cc: "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Peter.Stretz" <peter.stretz@advantech.com>,
	"Peter.Chiang" <peter.chiang@advantech.com>,
	Akshay Bhat <akshay.bhat@timesys.com>
Subject: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula
Date: Thu, 6 Oct 2016 16:21:08 -0700	[thread overview]
Message-ID: <WM!045200bfb0110516327d0ae2524b3ef85289c0970f8862a128cf0f640730093100c770eaeaed67dbb4e4b439e95b4165!@dg.advantech.com> (raw)
In-Reply-To: 03B5A3CA1724CE4EAC32B27E39292A677FC5A390A9@AUSMAIL1.AUS.ADVANTECH.CORP

Hi,

We found a possible regression issue (not seen in kernel 4.7-stable), which has to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c when we did a DP test (1920x1080@60) with clock source PLL5.
The DP desired pixel clock (148.5MHz that is calculated from the input of PLL output frequency) would be correct again when we reverted this commit.
Could you please help check if the commit has the side effect since it would have impacts on our on-going project when it requires moving from kernel 4.7 to kernel 4.8 or newer version?

Please check the following URL for the details
https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_imx_correct_VL_PLL_rate_formula.pdf?dl=0


Thank you

Cheers,
Ken Lin

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WARNING: multiple messages have this Message-ID (diff)
From: "Ken.Lin" <ken.lin@advantech.com>
To: "shawnguo@kernel.org" <shawnguo@kernel.org>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	"sboyd@codeaurora.org" <sboyd@codeaurora.org>,
	"mturquette@baylibre.com" <mturquette@baylibre.com>
Cc: "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Peter.Stretz" <peter.stretz@advantech.com>,
	"Peter.Chiang" <peter.chiang@advantech.com>,
	Akshay Bhat <akshay.bhat@timesys.com>
Subject: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula
Date: Thu, 6 Oct 2016 16:21:08 -0700	[thread overview]
Message-ID: <WM!045200bfb0110516327d0ae2524b3ef85289c0970f8862a128cf0f640730093100c770eaeaed67dbb4e4b439e95b4165!@dg.advantech.com> (raw)
In-Reply-To: 03B5A3CA1724CE4EAC32B27E39292A677FC5A390A9@AUSMAIL1.AUS.ADVANTECH.CORP

Hi,

We found a possible regression issue (not seen in kernel 4.7-stable), which=
 has to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c=
 when we did a DP test (1920x1080@60) with clock source PLL5.
The DP desired pixel clock (148.5MHz that is calculated from the input of P=
LL output frequency) would be correct again when we reverted this commit.
Could you please help check if the commit has the side effect since it woul=
d have impacts on our on-going project when it requires moving from kernel =
4.7 to kernel 4.8 or newer version?

Please check the following URL for the details
https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_imx_c=
orrect_VL_PLL_rate_formula.pdf?dl=3D0


Thank you

Cheers,
Ken Lin

--=20
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.

       reply	other threads:[~2016-10-06 23:30 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <03B5A3CA1724CE4EAC32B27E39292A677FC5A390A9@AUSMAIL1.AUS.ADVANTECH.CORP>
2016-10-06 23:21 ` Ken.Lin [this message]
2016-10-06 23:21   ` The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula Ken.Lin
     [not found] <03B5A3CA1724CE4EAC32B27E39292A677FC5A390AE@AUSMAIL1.AUS.ADVANTECH.CORP>
2016-10-06 23:26 ` Ken.Lin
2016-10-06 23:26   ` Ken.Lin
2016-10-06 23:37   ` Fabio Estevam
2016-10-06 23:37     ` Fabio Estevam
2016-10-06 23:37     ` Fabio Estevam
     [not found]     ` <WM!8b5ef465717800ac4466674b98bb32450dc231d955cd4979ca96fd54828a7c3af7de5f376015ebf046c75f20677161c6!@dgg.advantech.com>
     [not found]       ` <03B5A3CA1724CE4EAC32B27E39292A677FC5A39613@AUSMAIL1.AUS.ADVANTECH.CORP>
2016-10-11 17:49         ` Ken.Lin
2016-10-11 17:49           ` Ken.Lin
2016-10-11 17:49           ` Ken.Lin
2016-10-11 18:00           ` Fabio Estevam
2016-10-11 18:00             ` Fabio Estevam
2016-10-11 18:00             ` Fabio Estevam
2016-10-11 18:34             ` Otavio Salvador
2016-10-11 18:34               ` Otavio Salvador
2016-10-11 18:34               ` Otavio Salvador
     [not found] <03B5A3CA1724CE4EAC32B27E39292A677FC5A390AF@AUSMAIL1.AUS.ADVANTECH.CORP>
2016-10-06 23:26 ` Ken.Lin
2016-10-06 23:26   ` Ken.Lin
2016-10-06 23:26   ` Ken.Lin

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