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From: Auger Eric <eric.auger@redhat.com>
To: Liu Yi L <yi.l.liu@intel.com>,
	qemu-devel@nongnu.org, alex.williamson@redhat.com,
	peterx@redhat.com
Cc: pbonzini@redhat.com, mst@redhat.com, david@gibson.dropbear.id.au,
	kevin.tian@intel.com, jun.j.tian@intel.com, yi.y.sun@intel.com,
	kvm@vger.kernel.org, hao.wu@intel.com, jean-philippe@linaro.org,
	Jacob Pan <jacob.jun.pan@linux.intel.com>,
	Yi Sun <yi.y.sun@linux.intel.com>,
	Richard Henderson <rth@twiddle.net>,
	Eduardo Habkost <ehabkost@redhat.com>
Subject: Re: [PATCH v2 07/22] intel_iommu: add set/unset_iommu_context callback
Date: Mon, 30 Mar 2020 22:23:54 +0200	[thread overview]
Message-ID: <a444318b-32c7-d43c-112a-d35a870b162d@redhat.com> (raw)
In-Reply-To: <1585542301-84087-8-git-send-email-yi.l.liu@intel.com>

Yi,

On 3/30/20 6:24 AM, Liu Yi L wrote:
> This patch adds set/unset_iommu_context() impelementation in Intel
This patch implements the set/unset_iommu_context() ops for Intel vIOMMU.
> vIOMMU. For Intel platform, pass-through modules (e.g. VFIO) could
> set HostIOMMUContext to Intel vIOMMU emulator.
> 
> Cc: Kevin Tian <kevin.tian@intel.com>
> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
> Cc: Peter Xu <peterx@redhat.com>
> Cc: Yi Sun <yi.y.sun@linux.intel.com>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Richard Henderson <rth@twiddle.net>
> Cc: Eduardo Habkost <ehabkost@redhat.com>
> Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
> ---
>  hw/i386/intel_iommu.c         | 71 ++++++++++++++++++++++++++++++++++++++++---
>  include/hw/i386/intel_iommu.h | 21 ++++++++++---
>  2 files changed, 83 insertions(+), 9 deletions(-)
> 
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 4b22910..fd349c6 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -3354,23 +3354,33 @@ static const MemoryRegionOps vtd_mem_ir_ops = {
>      },
>  };
>  
> -VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
> +/**
> + * Fetch a VTDBus instance for given PCIBus. If no existing instance,
> + * allocate one.
> + */
> +static VTDBus *vtd_find_add_bus(IntelIOMMUState *s, PCIBus *bus)
>  {
>      uintptr_t key = (uintptr_t)bus;
>      VTDBus *vtd_bus = g_hash_table_lookup(s->vtd_as_by_busptr, &key);
> -    VTDAddressSpace *vtd_dev_as;
> -    char name[128];
>  
>      if (!vtd_bus) {
>          uintptr_t *new_key = g_malloc(sizeof(*new_key));
>          *new_key = (uintptr_t)bus;
>          /* No corresponding free() */
> -        vtd_bus = g_malloc0(sizeof(VTDBus) + sizeof(VTDAddressSpace *) * \
> -                            PCI_DEVFN_MAX);
> +        vtd_bus = g_malloc0(sizeof(VTDBus));
>          vtd_bus->bus = bus;
>          g_hash_table_insert(s->vtd_as_by_busptr, new_key, vtd_bus);
>      }
> +    return vtd_bus;
> +}
>  
> +VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
> +{
> +    VTDBus *vtd_bus;
> +    VTDAddressSpace *vtd_dev_as;
> +    char name[128];
> +
> +    vtd_bus = vtd_find_add_bus(s, bus);
>      vtd_dev_as = vtd_bus->dev_as[devfn];
>  
>      if (!vtd_dev_as) {
> @@ -3436,6 +3446,55 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
>      return vtd_dev_as;
>  }
>  
> +static int vtd_dev_set_iommu_context(PCIBus *bus, void *opaque,
> +                                     int devfn,
> +                                     HostIOMMUContext *iommu_ctx)
> +{
> +    IntelIOMMUState *s = opaque;
> +    VTDBus *vtd_bus;
> +    VTDHostIOMMUContext *vtd_dev_icx;
> +
> +    assert(0 <= devfn && devfn < PCI_DEVFN_MAX);
> +
> +    vtd_bus = vtd_find_add_bus(s, bus);
> +
> +    vtd_iommu_lock(s);
> +
> +    vtd_dev_icx = vtd_bus->dev_icx[devfn];
> +
> +    assert(!vtd_dev_icx);
> +
> +    vtd_bus->dev_icx[devfn] = vtd_dev_icx =
> +                    g_malloc0(sizeof(VTDHostIOMMUContext));
> +    vtd_dev_icx->vtd_bus = vtd_bus;
> +    vtd_dev_icx->devfn = (uint8_t)devfn;
> +    vtd_dev_icx->iommu_state = s;
> +    vtd_dev_icx->iommu_ctx = iommu_ctx;
> +
> +    vtd_iommu_unlock(s);
> +
> +    return 0;
> +}
> +
> +static void vtd_dev_unset_iommu_context(PCIBus *bus, void *opaque, int devfn)
> +{
> +    IntelIOMMUState *s = opaque;
> +    VTDBus *vtd_bus;
> +    VTDHostIOMMUContext *vtd_dev_icx;
> +
> +    assert(0 <= devfn && devfn < PCI_DEVFN_MAX);
> +
> +    vtd_bus = vtd_find_add_bus(s, bus);
> +
> +    vtd_iommu_lock(s);
> +
> +    vtd_dev_icx = vtd_bus->dev_icx[devfn];
> +    g_free(vtd_dev_icx);
> +    vtd_bus->dev_icx[devfn] = NULL;
> +
> +    vtd_iommu_unlock(s);
> +}
> +
>  static uint64_t get_naturally_aligned_size(uint64_t start,
>                                             uint64_t size, int gaw)
>  {
> @@ -3731,6 +3790,8 @@ static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
>  
>  static PCIIOMMUOps vtd_iommu_ops = {
>      .get_address_space = vtd_host_dma_iommu,
> +    .set_iommu_context = vtd_dev_set_iommu_context,
> +    .unset_iommu_context = vtd_dev_unset_iommu_context,
>  };
>  
>  static bool vtd_decide_config(IntelIOMMUState *s, Error **errp)
> diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
> index 3870052..b5fefb9 100644
> --- a/include/hw/i386/intel_iommu.h
> +++ b/include/hw/i386/intel_iommu.h
> @@ -64,6 +64,7 @@ typedef union VTD_IR_TableEntry VTD_IR_TableEntry;
>  typedef union VTD_IR_MSIAddress VTD_IR_MSIAddress;
>  typedef struct VTDPASIDDirEntry VTDPASIDDirEntry;
>  typedef struct VTDPASIDEntry VTDPASIDEntry;
> +typedef struct VTDHostIOMMUContext VTDHostIOMMUContext;
>  
>  /* Context-Entry */
>  struct VTDContextEntry {
> @@ -112,10 +113,20 @@ struct VTDAddressSpace {
>      IOVATree *iova_tree;          /* Traces mapped IOVA ranges */
>  };
>  
> +struct VTDHostIOMMUContext {


> +    VTDBus *vtd_bus;
> +    uint8_t devfn;
> +    HostIOMMUContext *iommu_ctx;
I don't get why we don't have standard QOM inheritance instead of this
handle?
VTDHostContext parent_obj;

like IOMMUMemoryRegion <- MemoryRegion <- Object
> +    IntelIOMMUState *iommu_state;
> +};
> +
>  struct VTDBus {
> -    PCIBus* bus;		/* A reference to the bus to provide translation for */
> +    /* A reference to the bus to provide translation for */
> +    PCIBus *bus;
>      /* A table of VTDAddressSpace objects indexed by devfn */
> -    VTDAddressSpace *dev_as[];
> +    VTDAddressSpace *dev_as[PCI_DEVFN_MAX];
> +    /* A table of VTDHostIOMMUContext objects indexed by devfn */
> +    VTDHostIOMMUContext *dev_icx[PCI_DEVFN_MAX];
At this point of the review, it is unclear to me why the context is
associated to a device. Up to now you have not explained it should. If
so why isn't it part of VTDAddressSpace?

Thanks

Eric
>  };
>  
>  struct VTDIOTLBEntry {
> @@ -269,8 +280,10 @@ struct IntelIOMMUState {
>      bool dma_drain;                 /* Whether DMA r/w draining enabled */
>  
>      /*
> -     * Protects IOMMU states in general.  Currently it protects the
> -     * per-IOMMU IOTLB cache, and context entry cache in VTDAddressSpace.
> +     * iommu_lock protects below:
> +     * - per-IOMMU IOTLB caches
> +     * - context entry cache in VTDAddressSpace
> +     * - HostIOMMUContext pointer cached in vIOMMU
>       */
>      QemuMutex iommu_lock;
>  };
> 


WARNING: multiple messages have this Message-ID (diff)
From: Auger Eric <eric.auger@redhat.com>
To: Liu Yi L <yi.l.liu@intel.com>,
	qemu-devel@nongnu.org, alex.williamson@redhat.com,
	peterx@redhat.com
Cc: jean-philippe@linaro.org, kevin.tian@intel.com,
	Jacob Pan <jacob.jun.pan@linux.intel.com>,
	Yi Sun <yi.y.sun@linux.intel.com>,
	Eduardo Habkost <ehabkost@redhat.com>,
	kvm@vger.kernel.org, mst@redhat.com, jun.j.tian@intel.com,
	yi.y.sun@intel.com, pbonzini@redhat.com, hao.wu@intel.com,
	Richard Henderson <rth@twiddle.net>,
	david@gibson.dropbear.id.au
Subject: Re: [PATCH v2 07/22] intel_iommu: add set/unset_iommu_context callback
Date: Mon, 30 Mar 2020 22:23:54 +0200	[thread overview]
Message-ID: <a444318b-32c7-d43c-112a-d35a870b162d@redhat.com> (raw)
In-Reply-To: <1585542301-84087-8-git-send-email-yi.l.liu@intel.com>

Yi,

On 3/30/20 6:24 AM, Liu Yi L wrote:
> This patch adds set/unset_iommu_context() impelementation in Intel
This patch implements the set/unset_iommu_context() ops for Intel vIOMMU.
> vIOMMU. For Intel platform, pass-through modules (e.g. VFIO) could
> set HostIOMMUContext to Intel vIOMMU emulator.
> 
> Cc: Kevin Tian <kevin.tian@intel.com>
> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
> Cc: Peter Xu <peterx@redhat.com>
> Cc: Yi Sun <yi.y.sun@linux.intel.com>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Richard Henderson <rth@twiddle.net>
> Cc: Eduardo Habkost <ehabkost@redhat.com>
> Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
> ---
>  hw/i386/intel_iommu.c         | 71 ++++++++++++++++++++++++++++++++++++++++---
>  include/hw/i386/intel_iommu.h | 21 ++++++++++---
>  2 files changed, 83 insertions(+), 9 deletions(-)
> 
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 4b22910..fd349c6 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -3354,23 +3354,33 @@ static const MemoryRegionOps vtd_mem_ir_ops = {
>      },
>  };
>  
> -VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
> +/**
> + * Fetch a VTDBus instance for given PCIBus. If no existing instance,
> + * allocate one.
> + */
> +static VTDBus *vtd_find_add_bus(IntelIOMMUState *s, PCIBus *bus)
>  {
>      uintptr_t key = (uintptr_t)bus;
>      VTDBus *vtd_bus = g_hash_table_lookup(s->vtd_as_by_busptr, &key);
> -    VTDAddressSpace *vtd_dev_as;
> -    char name[128];
>  
>      if (!vtd_bus) {
>          uintptr_t *new_key = g_malloc(sizeof(*new_key));
>          *new_key = (uintptr_t)bus;
>          /* No corresponding free() */
> -        vtd_bus = g_malloc0(sizeof(VTDBus) + sizeof(VTDAddressSpace *) * \
> -                            PCI_DEVFN_MAX);
> +        vtd_bus = g_malloc0(sizeof(VTDBus));
>          vtd_bus->bus = bus;
>          g_hash_table_insert(s->vtd_as_by_busptr, new_key, vtd_bus);
>      }
> +    return vtd_bus;
> +}
>  
> +VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
> +{
> +    VTDBus *vtd_bus;
> +    VTDAddressSpace *vtd_dev_as;
> +    char name[128];
> +
> +    vtd_bus = vtd_find_add_bus(s, bus);
>      vtd_dev_as = vtd_bus->dev_as[devfn];
>  
>      if (!vtd_dev_as) {
> @@ -3436,6 +3446,55 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
>      return vtd_dev_as;
>  }
>  
> +static int vtd_dev_set_iommu_context(PCIBus *bus, void *opaque,
> +                                     int devfn,
> +                                     HostIOMMUContext *iommu_ctx)
> +{
> +    IntelIOMMUState *s = opaque;
> +    VTDBus *vtd_bus;
> +    VTDHostIOMMUContext *vtd_dev_icx;
> +
> +    assert(0 <= devfn && devfn < PCI_DEVFN_MAX);
> +
> +    vtd_bus = vtd_find_add_bus(s, bus);
> +
> +    vtd_iommu_lock(s);
> +
> +    vtd_dev_icx = vtd_bus->dev_icx[devfn];
> +
> +    assert(!vtd_dev_icx);
> +
> +    vtd_bus->dev_icx[devfn] = vtd_dev_icx =
> +                    g_malloc0(sizeof(VTDHostIOMMUContext));
> +    vtd_dev_icx->vtd_bus = vtd_bus;
> +    vtd_dev_icx->devfn = (uint8_t)devfn;
> +    vtd_dev_icx->iommu_state = s;
> +    vtd_dev_icx->iommu_ctx = iommu_ctx;
> +
> +    vtd_iommu_unlock(s);
> +
> +    return 0;
> +}
> +
> +static void vtd_dev_unset_iommu_context(PCIBus *bus, void *opaque, int devfn)
> +{
> +    IntelIOMMUState *s = opaque;
> +    VTDBus *vtd_bus;
> +    VTDHostIOMMUContext *vtd_dev_icx;
> +
> +    assert(0 <= devfn && devfn < PCI_DEVFN_MAX);
> +
> +    vtd_bus = vtd_find_add_bus(s, bus);
> +
> +    vtd_iommu_lock(s);
> +
> +    vtd_dev_icx = vtd_bus->dev_icx[devfn];
> +    g_free(vtd_dev_icx);
> +    vtd_bus->dev_icx[devfn] = NULL;
> +
> +    vtd_iommu_unlock(s);
> +}
> +
>  static uint64_t get_naturally_aligned_size(uint64_t start,
>                                             uint64_t size, int gaw)
>  {
> @@ -3731,6 +3790,8 @@ static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
>  
>  static PCIIOMMUOps vtd_iommu_ops = {
>      .get_address_space = vtd_host_dma_iommu,
> +    .set_iommu_context = vtd_dev_set_iommu_context,
> +    .unset_iommu_context = vtd_dev_unset_iommu_context,
>  };
>  
>  static bool vtd_decide_config(IntelIOMMUState *s, Error **errp)
> diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
> index 3870052..b5fefb9 100644
> --- a/include/hw/i386/intel_iommu.h
> +++ b/include/hw/i386/intel_iommu.h
> @@ -64,6 +64,7 @@ typedef union VTD_IR_TableEntry VTD_IR_TableEntry;
>  typedef union VTD_IR_MSIAddress VTD_IR_MSIAddress;
>  typedef struct VTDPASIDDirEntry VTDPASIDDirEntry;
>  typedef struct VTDPASIDEntry VTDPASIDEntry;
> +typedef struct VTDHostIOMMUContext VTDHostIOMMUContext;
>  
>  /* Context-Entry */
>  struct VTDContextEntry {
> @@ -112,10 +113,20 @@ struct VTDAddressSpace {
>      IOVATree *iova_tree;          /* Traces mapped IOVA ranges */
>  };
>  
> +struct VTDHostIOMMUContext {


> +    VTDBus *vtd_bus;
> +    uint8_t devfn;
> +    HostIOMMUContext *iommu_ctx;
I don't get why we don't have standard QOM inheritance instead of this
handle?
VTDHostContext parent_obj;

like IOMMUMemoryRegion <- MemoryRegion <- Object
> +    IntelIOMMUState *iommu_state;
> +};
> +
>  struct VTDBus {
> -    PCIBus* bus;		/* A reference to the bus to provide translation for */
> +    /* A reference to the bus to provide translation for */
> +    PCIBus *bus;
>      /* A table of VTDAddressSpace objects indexed by devfn */
> -    VTDAddressSpace *dev_as[];
> +    VTDAddressSpace *dev_as[PCI_DEVFN_MAX];
> +    /* A table of VTDHostIOMMUContext objects indexed by devfn */
> +    VTDHostIOMMUContext *dev_icx[PCI_DEVFN_MAX];
At this point of the review, it is unclear to me why the context is
associated to a device. Up to now you have not explained it should. If
so why isn't it part of VTDAddressSpace?

Thanks

Eric
>  };
>  
>  struct VTDIOTLBEntry {
> @@ -269,8 +280,10 @@ struct IntelIOMMUState {
>      bool dma_drain;                 /* Whether DMA r/w draining enabled */
>  
>      /*
> -     * Protects IOMMU states in general.  Currently it protects the
> -     * per-IOMMU IOTLB cache, and context entry cache in VTDAddressSpace.
> +     * iommu_lock protects below:
> +     * - per-IOMMU IOTLB caches
> +     * - context entry cache in VTDAddressSpace
> +     * - HostIOMMUContext pointer cached in vIOMMU
>       */
>      QemuMutex iommu_lock;
>  };
> 



  reply	other threads:[~2020-03-30 20:24 UTC|newest]

Thread overview: 160+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-30  4:24 [PATCH v2 00/22] intel_iommu: expose Shared Virtual Addressing to VMs Liu Yi L
2020-03-30  4:24 ` Liu Yi L
2020-03-30  4:24 ` [PATCH v2 01/22] scripts/update-linux-headers: Import iommu.h Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30  4:24 ` [PATCH v2 02/22] header file update VFIO/IOMMU vSVA APIs Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30  4:24 ` [PATCH v2 03/22] vfio: check VFIO_TYPE1_NESTING_IOMMU support Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30  9:36   ` Auger Eric
2020-03-30  9:36     ` Auger Eric
2020-03-31  6:08     ` Liu, Yi L
2020-03-31  6:08       ` Liu, Yi L
2020-03-30  4:24 ` [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30 17:22   ` Auger Eric
2020-03-30 17:22     ` Auger Eric
2020-03-31  4:10     ` Liu, Yi L
2020-03-31  4:10       ` Liu, Yi L
2020-03-31  7:47       ` Auger Eric
2020-03-31  7:47         ` Auger Eric
2020-03-31 12:43         ` Liu, Yi L
2020-03-31 12:43           ` Liu, Yi L
2020-04-06  8:04     ` Liu, Yi L
2020-04-06  8:04       ` Liu, Yi L
2020-04-06 10:30       ` Auger Eric
2020-04-06 10:30         ` Auger Eric
2020-03-30  4:24 ` [PATCH v2 05/22] hw/pci: modify pci_setup_iommu() to set PCIIOMMUOps Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30 11:02   ` Auger Eric
2020-03-30 11:02     ` Auger Eric
2020-04-02  8:52     ` Liu, Yi L
2020-04-02  8:52       ` Liu, Yi L
2020-04-02 12:41       ` Auger Eric
2020-04-02 12:41         ` Auger Eric
2020-04-02 13:37         ` Liu, Yi L
2020-04-02 13:37           ` Liu, Yi L
2020-04-02 13:49           ` Auger Eric
2020-04-02 13:49             ` Auger Eric
2020-04-06  6:27             ` Liu, Yi L
2020-04-06  6:27               ` Liu, Yi L
2020-04-06 10:04               ` Auger Eric
2020-04-06 10:04                 ` Auger Eric
2020-03-30  4:24 ` [PATCH v2 06/22] hw/pci: introduce pci_device_set/unset_iommu_context() Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30 17:30   ` Auger Eric
2020-03-30 17:30     ` Auger Eric
2020-03-31 12:14     ` Liu, Yi L
2020-03-31 12:14       ` Liu, Yi L
2020-03-30  4:24 ` [PATCH v2 07/22] intel_iommu: add set/unset_iommu_context callback Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30 20:23   ` Auger Eric [this message]
2020-03-30 20:23     ` Auger Eric
2020-03-31 12:25     ` Liu, Yi L
2020-03-31 12:25       ` Liu, Yi L
2020-03-31 12:57       ` Auger Eric
2020-03-31 12:57         ` Auger Eric
2020-03-30  4:24 ` [PATCH v2 08/22] vfio/common: provide PASID alloc/free hooks Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-31 10:47   ` Auger Eric
2020-03-31 10:47     ` Auger Eric
2020-03-31 10:59     ` Liu, Yi L
2020-03-31 10:59       ` Liu, Yi L
2020-03-31 11:15       ` Auger Eric
2020-03-31 11:15         ` Auger Eric
2020-03-31 12:54         ` Liu, Yi L
2020-03-31 12:54           ` Liu, Yi L
2020-03-30  4:24 ` [PATCH v2 09/22] vfio/common: init HostIOMMUContext per-container Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-04-01  7:50   ` Auger Eric
2020-04-01  7:50     ` Auger Eric
2020-04-06  7:12     ` Liu, Yi L
2020-04-06  7:12       ` Liu, Yi L
2020-04-06 10:20       ` Auger Eric
2020-04-06 10:20         ` Auger Eric
2020-04-07 11:59         ` Liu, Yi L
2020-04-07 11:59           ` Liu, Yi L
2020-03-30  4:24 ` [PATCH v2 10/22] vfio/pci: set host iommu context to vIOMMU Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-31 14:30   ` Auger Eric
2020-03-31 14:30     ` Auger Eric
2020-04-01  3:20     ` Liu, Yi L
2020-04-01  3:20       ` Liu, Yi L
2020-03-30  4:24 ` [PATCH v2 11/22] intel_iommu: add virtual command capability support Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30  4:24 ` [PATCH v2 12/22] intel_iommu: process PASID cache invalidation Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30  4:24 ` [PATCH v2 13/22] intel_iommu: add PASID cache management infrastructure Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-04-02  0:02   ` Peter Xu
2020-04-02  0:02     ` Peter Xu
2020-04-02  6:46     ` Liu, Yi L
2020-04-02  6:46       ` Liu, Yi L
2020-04-02 13:44       ` Peter Xu
2020-04-02 13:44         ` Peter Xu
2020-04-03 15:05         ` Liu, Yi L
2020-04-03 15:05           ` Liu, Yi L
2020-04-03 16:19           ` Peter Xu
2020-04-03 16:19             ` Peter Xu
2020-04-04 11:39             ` Liu, Yi L
2020-04-04 11:39               ` Liu, Yi L
2020-03-30  4:24 ` [PATCH v2 14/22] vfio: add bind stage-1 page table support Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30  4:24 ` [PATCH v2 15/22] intel_iommu: bind/unbind guest page table to host Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-04-02 18:09   ` Peter Xu
2020-04-02 18:09     ` Peter Xu
2020-04-03 14:29     ` Liu, Yi L
2020-04-03 14:29       ` Liu, Yi L
2020-03-30  4:24 ` [PATCH v2 16/22] intel_iommu: replay pasid binds after context cache invalidation Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-04-03 14:45   ` Peter Xu
2020-04-03 14:45     ` Peter Xu
2020-04-03 15:21     ` Liu, Yi L
2020-04-03 15:21       ` Liu, Yi L
2020-04-03 16:11       ` Peter Xu
2020-04-03 16:11         ` Peter Xu
2020-04-04 12:00         ` Liu, Yi L
2020-04-04 12:00           ` Liu, Yi L
2020-04-06 19:48           ` Peter Xu
2020-04-06 19:48             ` Peter Xu
2020-03-30  4:24 ` [PATCH v2 17/22] intel_iommu: do not pass down pasid bind for PASID #0 Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30  4:24 ` [PATCH v2 18/22] vfio: add support for flush iommu stage-1 cache Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30  4:24 ` [PATCH v2 19/22] intel_iommu: process PASID-based iotlb invalidation Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-04-03 14:47   ` Peter Xu
2020-04-03 14:47     ` Peter Xu
2020-04-03 15:21     ` Liu, Yi L
2020-04-03 15:21       ` Liu, Yi L
2020-03-30  4:24 ` [PATCH v2 20/22] intel_iommu: propagate PASID-based iotlb invalidation to host Liu Yi L
2020-03-30  4:24   ` Liu Yi L
2020-03-30  4:25 ` [PATCH v2 21/22] intel_iommu: process PASID-based Device-TLB invalidation Liu Yi L
2020-03-30  4:25   ` Liu Yi L
2020-03-30  4:25 ` [PATCH v2 22/22] intel_iommu: modify x-scalable-mode to be string option Liu Yi L
2020-03-30  4:25   ` Liu Yi L
2020-04-03 14:49   ` Peter Xu
2020-04-03 14:49     ` Peter Xu
2020-04-03 15:22     ` Liu, Yi L
2020-04-03 15:22       ` Liu, Yi L
2020-03-30  5:40 ` [PATCH v2 00/22] intel_iommu: expose Shared Virtual Addressing to VMs no-reply
2020-03-30  5:40   ` no-reply
2020-03-30 10:36 ` Auger Eric
2020-03-30 10:36   ` Auger Eric
2020-03-30 14:46   ` Peter Xu
2020-03-30 14:46     ` Peter Xu
2020-03-31  6:53     ` Liu, Yi L
2020-03-31  6:53       ` Liu, Yi L
2020-04-02  8:33 ` Jason Wang
2020-04-02  8:33   ` Jason Wang
2020-04-02 13:46   ` Peter Xu
2020-04-02 13:46     ` Peter Xu
2020-04-03  1:38     ` Jason Wang
2020-04-03  1:38       ` Jason Wang
2020-04-03 14:20     ` Liu, Yi L
2020-04-03 14:20       ` Liu, Yi L
2020-04-02 18:12 ` Peter Xu
2020-04-02 18:12   ` Peter Xu
2020-04-03 14:32   ` Liu, Yi L
2020-04-03 14:32     ` Liu, Yi L

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