Questions about bringing up MT7623 board

Questions about bringing up MT7623 board

[Kristian Evensen]

Hello,

I am currently working on trying to add mainline support for an MT7623
board I have received (Unielec U7623). I sent some initial questions
about the board in the autumn, and I got OpenWRT running in a
semi-stable state (with 4.9), but adding mainline support has proven
tricker than I thought. After spending some days banging my head
against the wall, I am starting to run out of ideas, so any pointers
or tips would be greatly appreciated.

With OpenWRT, I based the dts for the U7623 on mt7623-eMMC.dts. Since
this file is not available in the mainline kernel, I decided to use
the DTS for Banana Pi R2 as the boards seem fairly similar (and the
initial goal is just to have a kernel that boots). I got a 4.14 config
from a repo I found on the BPI-forum
(https://github.com/frank-w/BPI-R2-4.14), added missing config symbols
for 4.15, compiled a kernel and appended the dtb to the uImage. So
far, so good and the kernel compiles just fine.

When booting the kernel (from the eMMC), the trouble starts. The
kernel seems to be loaded just fine, but after "Starting kernel ..."
nothing more is written to the screen. I.e., I see the following:

bootm flag=0, states=70f
## Booting kernel from Legacy Image at 84000000 ...
   Image Name:   Linux Kernel 4.14.18-main
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    5891369 Bytes = 5.6 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK

Starting kernel ...

I had a similar error when working on getting OpenWRT to run on the
board, but then it was caused by the dtb not being appended to the
kernel. When looking around online for reasons for this error, missing
dtb or config-mistakes seems to be the two main reasons. I have
checked for misses and errors in dts and config (both compared to the
datasheet and my working 4.9 kernel), but haven't really found
anything. And the changes I have made have had no effect.

Does anyone have any idea about what could be wrong or where I should look?

Thanks in advance for any help,
Kristian

Re: Questions about bringing up MT7623 board

[Kristian Evensen]

On Sat, Feb 10, 2018 at 11:02 PM, Kristian Evensen
<kristian.evensen-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> Hello,
>
> With OpenWRT, I based the dts for the U7623 on mt7623-eMMC.dts. Since
> this file is not available in the mainline kernel, I decided to use
> the DTS for Banana Pi R2 as the boards seem fairly similar (and the
> initial goal is just to have a kernel that boots). I got a 4.14 config
> from a repo I found on the BPI-forum
> (https://github.com/frank-w/BPI-R2-4.14), added missing config symbols
> for 4.15, compiled a kernel and appended the dtb to the uImage. So
> far, so good and the kernel compiles just fine.

I see that I made some mistakes and missed some details in the
description. Sorry about that, I blame the lack of coffee :)

I did not use the DTS for the R2, as I had already seen that 4.9
failed to boot with the R2 DTS (also the no output-error). What I did
was that I took the mt7623-eMMC.dts and updated it (basically
uncommenting the switch-section) so that the compiler would not hit
any errors/warnings. I also reduced the amount of memory, as my board
only has 512MB RAM.

BR,
Kristian

Re: Questions about bringing up MT7623 board

[John Crispin]

On 11/02/18 11:33, Kristian Evensen wrote:
> On Sat, Feb 10, 2018 at 11:02 PM, Kristian Evensen
> <kristian.evensen@gmail.com> wrote:
>> Hello,
>>
>> With OpenWRT, I based the dts for the U7623 on mt7623-eMMC.dts. Since
>> this file is not available in the mainline kernel, I decided to use
>> the DTS for Banana Pi R2 as the boards seem fairly similar (and the
>> initial goal is just to have a kernel that boots). I got a 4.14 config
>> from a repo I found on the BPI-forum
>> (https://github.com/frank-w/BPI-R2-4.14), added missing config symbols
>> for 4.15, compiled a kernel and appended the dtb to the uImage. So
>> far, so good and the kernel compiles just fine.
> I see that I made some mistakes and missed some details in the
> description. Sorry about that, I blame the lack of coffee :)
>
> I did not use the DTS for the R2, as I had already seen that 4.9
> failed to boot with the R2 DTS (also the no output-error). What I did
> was that I took the mt7623-eMMC.dts and updated it (basically
> uncommenting the switch-section) so that the compiler would not hit
> any errors/warnings. I also reduced the amount of memory, as my board
> only has 512MB RAM.
>
> BR,
> Kristian
Have you tried turning on early printk ?

     John

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Re: Questions about bringing up MT7623 board

[Kristian Evensen]

[-- Attachment #1: Type: text/plain, Size: 492 bytes --]

Hi,

On Sun, Feb 11, 2018 at 11:36 AM, John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org> wrote:
> Have you tried turning on early printk ?

Yes, my bootargs (in the DTS) is: earlyprintk
block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5
mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata
   ),-(bmtpool) rootfstype=squashfs,jffs2

I have attached my current DTS in case anyone wants to take a look.

BR,
Kristian

[-- Attachment #2: mt7623-eMMC.dts --]
[-- Type: audio/vnd.dts, Size: 12478 bytes --]

[-- Attachment #3: Type: text/plain, Size: 200 bytes --]

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Re: Questions about bringing up MT7623 board

[John Crispin]

On 11/02/18 11:40, Kristian Evensen wrote:
> Hi,
>
> On Sun, Feb 11, 2018 at 11:36 AM, John Crispin <john@phrozen.org> wrote:
>> Have you tried turning on early printk ?
> Yes, my bootargs (in the DTS) is: earlyprintk
> block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5
> mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata
>     ),-(bmtpool) rootfstype=squashfs,jffs2
>
> I have attached my current DTS in case anyone wants to take a look.
>
> BR,
> Kristian
Is Earlyprinkt enabled in the kernel .config ?

     John

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Re: Questions about bringing up MT7623 board

[Kristian Evensen]

Hi,

On Sun, Feb 11, 2018 at 11:41 AM, John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org> wrote:
> Is Earlyprinkt enabled in the kernel .config ?

No, turns out CONFIG_EARLY_PRINTK was not enabled. This is the first
time I am trying to add support for a board outisde the safe walls of
OpenWRT, so sorry for such a rookie mistake.

Unfortunately, enabling CONFIG_EARLY_PRINTK had no effect. I still
have not output after "Starting kernel".

BR,
Kristian

Re: Questions about bringing up MT7623 board

[John Crispin]

On 11/02/18 11:55, Kristian Evensen wrote:
> Hi,
>
> On Sun, Feb 11, 2018 at 11:41 AM, John Crispin <john@phrozen.org> wrote:
>> Is Earlyprinkt enabled in the kernel .config ?
> No, turns out CONFIG_EARLY_PRINTK was not enabled. This is the first
> time I am trying to add support for a board outisde the safe walls of
> OpenWRT, so sorry for such a rookie mistake.
>
> Unfortunately, enabling CONFIG_EARLY_PRINTK had no effect. I still
> have not output after "Starting kernel".
>
> BR,
> Kristian
You'll also need to tell the kernel about the uart, looking at the owrt 
config you'll find ...

grep DEBUG_UART target/linux/mediatek/config-4.9
CONFIG_DEBUG_UART_8250=y
# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
CONFIG_DEBUG_UART_8250_SHIFT=2
# CONFIG_DEBUG_UART_8250_WORD is not set
CONFIG_DEBUG_UART_PHYS=0x11004000
CONFIG_DEBUG_UART_VIRT=0xf1004000

     John

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Re: Questions about bringing up MT7623 board

[Kristian Evensen]

Hi,

On Sun, Feb 11, 2018 at 12:11 PM, John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org> wrote:
> You'll also need to tell the kernel about the uart, looking at the owrt
> config you'll find ...
>
> grep DEBUG_UART target/linux/mediatek/config-4.9
> CONFIG_DEBUG_UART_8250=y
> # CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
> CONFIG_DEBUG_UART_8250_SHIFT=2
> # CONFIG_DEBUG_UART_8250_WORD is not set
> CONFIG_DEBUG_UART_PHYS=0x11004000
> CONFIG_DEBUG_UART_VIRT=0xf1004000

Thanks, I will take a look. I also made some progress. I used a
different config I found on the Banana Pi forums (availble here
http://www.fw-web.de/dokuwiki/lib/exe/fetch.php?media=bpi-r2:mt7623n_evb_ryderlee_defconfig.txt)
and while there are some errors when booting, booting to the ramdisk
works fine. So it seems that the DTS at least is not completely
broken.

BR,
Kristian

Re: Questions about bringing up MT7623 board

[Kristian Evensen]

Hi,

It turns out that enabling early printk in the kernel config did the
trick, thank you very much for pointing me to this error. I also
changed my defconfig a bit, I merged the two OpenWRT 4.9 configs
(generic and mediatek), created a new defconfig and used that as a
starting point (make ..._defconfig). Now I can finally see what is
going on and I see that the boot progresses quite far. My boot now
gets to the point where it looks for the root filesystem, but here I
have hit another problem. The kernel only produces the following
error:

[    2.037354] mmc0: new high speed MMC card at address 0001
[    2.045252] mmcblk0: mmc0:0001 008G70 7.28 GiB
[    2.053533] mmcblk0boot0: mmc0:0001 008G70 partition 1 4.00 MiB
[    2.053723] mmcblk0boot1: mmc0:0001 008G70 partition 2 4.00 MiB
[    2.053910] mmcblk0rpmb: mmc0:0001 008G70 partition 3 4.00 MiB
[    2.055456]  mmcblk0: p2 p3
[    2.056986] xhci-mtk 1a1c0000.usb: 1a1c0000.usb supply vbus not
found, using dummy regulator
[    2.153894] vpa: disabling
[    2.156608] vmc: disabling
[    2.159296] vmch: disabling
[    2.162103] vgp1: disabling
[    2.164897] vcamaf: disabling
[    2.168241] VFS: Cannot open root device "(null)" or
unknown-block(0,0): error -6
[    2.175712] Please append a correct "root=" boot option; here are
the available partitions:
[    2.184031] b300         7634944 mmcblk0
[    2.184036]  driver: mmcblk
[    2.190775]   b302         1048576 mmcblk0p2 00000000-02
[    2.190779]
[    2.197563]   b303         2097152 mmcblk0p3 00000000-03
[    2.197566]
[    2.204332] b318            4096 mmcblk0rpmb
[    2.204335]  (driver?)
[    2.210988] b310            4096 mmcblk0boot1
[    2.210992]  (driver?)
[    2.217747] b308            4096 mmcblk0boot0
[    2.217750]  (driver?)
[    2.224504] Kernel panic - not syncing: VFS: Unable to mount root
fs on unknown-block(0,0)

My rootfs, etc, is stored on mmcblk0 and the partitioning is specified
in the boot arguments (which are:
block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5
mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool)
 rootfstype=squashfs,jffs2). I have doublecheked, and I can't find any
missing MTD-options compared to the 4.9 config. Could it be that new
options have been added and have to be specified? For example,
MTD_BLOCK2MTD and MTD_CMDLINE_PARTS is set.

The log are also contains the following warnings:

[    1.845280] ------------[ cut here ]------------
[    1.845296] WARNING: CPU: 0 PID: 70 at drivers/clk/clk.c:594
clk_core_disable_lock+0x18/0x24
[    1.845299] Modules linked in:
[    1.845310] CPU: 0 PID: 70 Comm: kworker/0:2 Not tainted
4.14.18-ft-try-owrt-config #20
[    1.845313] Hardware name: Mediatek Cortex-A7 (Device Tree)
[    1.845323] Workqueue: pm genpd_power_off_work_fn
[    1.845347] [<c010dc80>] (unwind_backtrace) from [<c010a734>]
(show_stack+0x10/0x14)
[    1.845361] [<c010a734>] (show_stack) from [<c049a420>]
(dump_stack+0x70/0x8c)
[    1.845373] [<c049a420>] (dump_stack) from [<c01158b8>] (__warn+0xd8/0xf8)
[    1.845384] [<c01158b8>] (__warn) from [<c011597c>]
(warn_slowpath_null+0x1c/0x24)
[    1.845393] [<c011597c>] (warn_slowpath_null) from [<c02eed48>]
(clk_core_disable_lock+0x18/0x24)
[    1.845404] [<c02eed48>] (clk_core_disable_lock) from [<c02f7a70>]
(scpsys_power_off+0xd8/0x188)
[    1.845416] [<c02f7a70>] (scpsys_power_off) from [<c032afb0>]
(genpd_power_off+0x1d4/0x238)
[    1.845427] [<c032afb0>] (genpd_power_off) from [<c032b040>]
(genpd_power_off_work_fn+0x2c/0x40)
[    1.845437] [<c032b040>] (genpd_power_off_work_fn) from
[<c01298d8>] (process_one_work+0x1c0/0x310)
[    1.845448] [<c01298d8>] (process_one_work) from [<c012a79c>]
(worker_thread+0x2a0/0x400)
[    1.845460] [<c012a79c>] (worker_thread) from [<c012eab4>]
(kthread+0x114/0x12c)
[    1.845471] [<c012eab4>] (kthread) from [<c01070a8>]
(ret_from_fork+0x14/0x2c)
[    1.845476] ---[ end trace 5ecff3fb65f610bb ]---
[    1.845518] ------------[ cut here ]------------
[    1.845527] WARNING: CPU: 0 PID: 70 at drivers/clk/clk.c:476
clk_unprepare+0x24/0x2c
[    1.845529] Modules linked in:
[    1.845538] CPU: 0 PID: 70 Comm: kworker/0:2 Tainted: G        W
   4.14.18-ft-try-owrt-config #20
[    1.845541] Hardware name: Mediatek Cortex-A7 (Device Tree)
[    1.845547] Workqueue: pm genpd_power_off_work_fn
[    1.845561] [<c010dc80>] (unwind_backtrace) from [<c010a734>]
(show_stack+0x10/0x14)
[    1.845574] [<c010a734>] (show_stack) from [<c049a420>]
(dump_stack+0x70/0x8c)
[    1.845584] [<c049a420>] (dump_stack) from [<c01158b8>] (__warn+0xd8/0xf8)
[    1.845594] [<c01158b8>] (__warn) from [<c011597c>]
(warn_slowpath_null+0x1c/0x24)
[    1.845603] [<c011597c>] (warn_slowpath_null) from [<c02eef38>]
(clk_unprepare+0x24/0x2c)
[    1.845612] [<c02eef38>] (clk_unprepare) from [<c02f7a78>]
(scpsys_power_off+0xe0/0x188)
[    1.845623] [<c02f7a78>] (scpsys_power_off) from [<c032afb0>]
(genpd_power_off+0x1d4/0x238)
[    1.845633] [<c032afb0>] (genpd_power_off) from [<c032b040>]
(genpd_power_off_work_fn+0x2c/0x40)
[    1.845643] [<c032b040>] (genpd_power_off_work_fn) from
[<c01298d8>] (process_one_work+0x1c0/0x310)
[    1.845653] [<c01298d8>] (process_one_work) from [<c012a79c>]
(worker_thread+0x2a0/0x400)
[    1.845664] [<c012a79c>] (worker_thread) from [<c012eab4>]
(kthread+0x114/0x12c)
[    1.845675] [<c012eab4>] (kthread) from [<c01070a8>]
(ret_from_fork+0x14/0x2c)
[    1.845679] ---[ end trace 5ecff3fb65f610bc ]---

Based on some searching, these errors seems to be related to missing
PINCTRL. However, MT2701 is enabled.

Does anyone have any (more :)) tips on what could be wrong or where to look?

BR,
Kristian

Re: Questions about bringing up MT7623 board

[John Crispin]

On 11/02/18 15:01, Kristian Evensen wrote:
> Hi,
>
> It turns out that enabling early printk in the kernel config did the
> trick, thank you very much for pointing me to this error. I also
> changed my defconfig a bit, I merged the two OpenWRT 4.9 configs
> (generic and mediatek), created a new defconfig and used that as a
> starting point (make ..._defconfig). Now I can finally see what is
> going on and I see that the boot progresses quite far. My boot now
> gets to the point where it looks for the root filesystem, but here I
> have hit another problem. The kernel only produces the following
> error:
>
> [    2.037354] mmc0: new high speed MMC card at address 0001
> [    2.045252] mmcblk0: mmc0:0001 008G70 7.28 GiB
> [    2.053533] mmcblk0boot0: mmc0:0001 008G70 partition 1 4.00 MiB
> [    2.053723] mmcblk0boot1: mmc0:0001 008G70 partition 2 4.00 MiB
> [    2.053910] mmcblk0rpmb: mmc0:0001 008G70 partition 3 4.00 MiB
> [    2.055456]  mmcblk0: p2 p3
> [    2.056986] xhci-mtk 1a1c0000.usb: 1a1c0000.usb supply vbus not
> found, using dummy regulator
> [    2.153894] vpa: disabling
> [    2.156608] vmc: disabling
> [    2.159296] vmch: disabling
> [    2.162103] vgp1: disabling
> [    2.164897] vcamaf: disabling
> [    2.168241] VFS: Cannot open root device "(null)" or
> unknown-block(0,0): error -6
> [    2.175712] Please append a correct "root=" boot option; here are
> the available partitions:
> [    2.184031] b300         7634944 mmcblk0
> [    2.184036]  driver: mmcblk
> [    2.190775]   b302         1048576 mmcblk0p2 00000000-02
> [    2.190779]
> [    2.197563]   b303         2097152 mmcblk0p3 00000000-03
> [    2.197566]
> [    2.204332] b318            4096 mmcblk0rpmb
> [    2.204335]  (driver?)
> [    2.210988] b310            4096 mmcblk0boot1
> [    2.210992]  (driver?)
> [    2.217747] b308            4096 mmcblk0boot0
> [    2.217750]  (driver?)
> [    2.224504] Kernel panic - not syncing: VFS: Unable to mount root
> fs on unknown-block(0,0)
>
> My rootfs, etc, is stored on mmcblk0 and the partitioning is specified
> in the boot arguments (which are:
> block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5
> mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool)
>   rootfstype=squashfs,jffs2). I have doublecheked, and I can't find any
> missing MTD-options compared to the 4.9 config. Could it be that new
> options have been added and have to be specified? For example,
> MTD_BLOCK2MTD and MTD_CMDLINE_PARTS is set.

block2mtd is a owrt specific driver, it wont work on on vanilla.

     John

> The log are also contains the following warnings:
>
> [    1.845280] ------------[ cut here ]------------
> [    1.845296] WARNING: CPU: 0 PID: 70 at drivers/clk/clk.c:594
> clk_core_disable_lock+0x18/0x24
> [    1.845299] Modules linked in:
> [    1.845310] CPU: 0 PID: 70 Comm: kworker/0:2 Not tainted
> 4.14.18-ft-try-owrt-config #20
> [    1.845313] Hardware name: Mediatek Cortex-A7 (Device Tree)
> [    1.845323] Workqueue: pm genpd_power_off_work_fn
> [    1.845347] [<c010dc80>] (unwind_backtrace) from [<c010a734>]
> (show_stack+0x10/0x14)
> [    1.845361] [<c010a734>] (show_stack) from [<c049a420>]
> (dump_stack+0x70/0x8c)
> [    1.845373] [<c049a420>] (dump_stack) from [<c01158b8>] (__warn+0xd8/0xf8)
> [    1.845384] [<c01158b8>] (__warn) from [<c011597c>]
> (warn_slowpath_null+0x1c/0x24)
> [    1.845393] [<c011597c>] (warn_slowpath_null) from [<c02eed48>]
> (clk_core_disable_lock+0x18/0x24)
> [    1.845404] [<c02eed48>] (clk_core_disable_lock) from [<c02f7a70>]
> (scpsys_power_off+0xd8/0x188)
> [    1.845416] [<c02f7a70>] (scpsys_power_off) from [<c032afb0>]
> (genpd_power_off+0x1d4/0x238)
> [    1.845427] [<c032afb0>] (genpd_power_off) from [<c032b040>]
> (genpd_power_off_work_fn+0x2c/0x40)
> [    1.845437] [<c032b040>] (genpd_power_off_work_fn) from
> [<c01298d8>] (process_one_work+0x1c0/0x310)
> [    1.845448] [<c01298d8>] (process_one_work) from [<c012a79c>]
> (worker_thread+0x2a0/0x400)
> [    1.845460] [<c012a79c>] (worker_thread) from [<c012eab4>]
> (kthread+0x114/0x12c)
> [    1.845471] [<c012eab4>] (kthread) from [<c01070a8>]
> (ret_from_fork+0x14/0x2c)
> [    1.845476] ---[ end trace 5ecff3fb65f610bb ]---
> [    1.845518] ------------[ cut here ]------------
> [    1.845527] WARNING: CPU: 0 PID: 70 at drivers/clk/clk.c:476
> clk_unprepare+0x24/0x2c
> [    1.845529] Modules linked in:
> [    1.845538] CPU: 0 PID: 70 Comm: kworker/0:2 Tainted: G        W
>     4.14.18-ft-try-owrt-config #20
> [    1.845541] Hardware name: Mediatek Cortex-A7 (Device Tree)
> [    1.845547] Workqueue: pm genpd_power_off_work_fn
> [    1.845561] [<c010dc80>] (unwind_backtrace) from [<c010a734>]
> (show_stack+0x10/0x14)
> [    1.845574] [<c010a734>] (show_stack) from [<c049a420>]
> (dump_stack+0x70/0x8c)
> [    1.845584] [<c049a420>] (dump_stack) from [<c01158b8>] (__warn+0xd8/0xf8)
> [    1.845594] [<c01158b8>] (__warn) from [<c011597c>]
> (warn_slowpath_null+0x1c/0x24)
> [    1.845603] [<c011597c>] (warn_slowpath_null) from [<c02eef38>]
> (clk_unprepare+0x24/0x2c)
> [    1.845612] [<c02eef38>] (clk_unprepare) from [<c02f7a78>]
> (scpsys_power_off+0xe0/0x188)
> [    1.845623] [<c02f7a78>] (scpsys_power_off) from [<c032afb0>]
> (genpd_power_off+0x1d4/0x238)
> [    1.845633] [<c032afb0>] (genpd_power_off) from [<c032b040>]
> (genpd_power_off_work_fn+0x2c/0x40)
> [    1.845643] [<c032b040>] (genpd_power_off_work_fn) from
> [<c01298d8>] (process_one_work+0x1c0/0x310)
> [    1.845653] [<c01298d8>] (process_one_work) from [<c012a79c>]
> (worker_thread+0x2a0/0x400)
> [    1.845664] [<c012a79c>] (worker_thread) from [<c012eab4>]
> (kthread+0x114/0x12c)
> [    1.845675] [<c012eab4>] (kthread) from [<c01070a8>]
> (ret_from_fork+0x14/0x2c)
> [    1.845679] ---[ end trace 5ecff3fb65f610bc ]---
>
> Based on some searching, these errors seems to be related to missing
> PINCTRL. However, MT2701 is enabled.
>
> Does anyone have any (more :)) tips on what could be wrong or where to look?
>
> BR,
> Kristian
>
> _______________________________________________
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> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek


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Re: Questions about bringing up MT7623 board

[John Crispin]

On 11/02/18 17:09, Kristian Evensen wrote:
> Hi,
>
> On Sun, 11 Feb 2018 at 15:46, John Crispin <john@phrozen.org 
> <mailto:john@phrozen.org>> wrote:
>
>
>
>     On 11/02/18 15:01, Kristian Evensen wrote:
>     > Hi,
>     >
>     > It turns out that enabling early printk in the kernel config did the
>     > trick, thank you very much for pointing me to this error. I also
>     > changed my defconfig a bit, I merged the two OpenWRT 4.9 configs
>     > (generic and mediatek), created a new defconfig and used that as a
>     > starting point (make ..._defconfig). Now I can finally see what is
>     > going on and I see that the boot progresses quite far. My boot now
>     > gets to the point where it looks for the root filesystem, but here I
>     > have hit another problem. The kernel only produces the following
>     > error:
>     >
>     > [    2.037354] mmc0: new high speed MMC card at address 0001
>     > [    2.045252] mmcblk0: mmc0:0001 008G70 7.28 GiB
>     > [    2.053533] mmcblk0boot0: mmc0:0001 008G70 partition 1 4.00 MiB
>     > [    2.053723] mmcblk0boot1: mmc0:0001 008G70 partition 2 4.00 MiB
>     > [    2.053910] mmcblk0rpmb: mmc0:0001 008G70 partition 3 4.00 MiB
>     > [    2.055456]  mmcblk0: p2 p3
>     > [    2.056986] xhci-mtk 1a1c0000.usb: 1a1c0000.usb supply vbus not
>     > found, using dummy regulator
>     > [    2.153894] vpa: disabling
>     > [    2.156608] vmc: disabling
>     > [    2.159296] vmch: disabling
>     > [    2.162103] vgp1: disabling
>     > [    2.164897] vcamaf: disabling
>     > [    2.168241] VFS: Cannot open root device "(null)" or
>     > unknown-block(0,0): error -6
>     > [    2.175712] Please append a correct "root=" boot option; here are
>     > the available partitions:
>     > [    2.184031] b300         7634944 mmcblk0
>     > [    2.184036]  driver: mmcblk
>     > [    2.190775]   b302         1048576 mmcblk0p2 00000000-02
>     > [    2.190779]
>     > [    2.197563]   b303         2097152 mmcblk0p3 00000000-03
>     > [    2.197566]
>     > [    2.204332] b318            4096 mmcblk0rpmb
>     > [    2.204335]  (driver?)
>     > [    2.210988] b310            4096 mmcblk0boot1
>     > [    2.210992]  (driver?)
>     > [    2.217747] b308            4096 mmcblk0boot0
>     > [    2.217750]  (driver?)
>     > [    2.224504] Kernel panic - not syncing: VFS: Unable to mount root
>     > fs on unknown-block(0,0)
>     >
>     > My rootfs, etc, is stored on mmcblk0 and the partitioning is
>     specified
>     > in the boot arguments (which are:
>     > block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5
>     >
>     mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool)
>     >   rootfstype=squashfs,jffs2). I have doublecheked, and I can't
>     find any
>     > missing MTD-options compared to the 4.9 config. Could it be that new
>     > options have been added and have to be specified? For example,
>     > MTD_BLOCK2MTD and MTD_CMDLINE_PARTS is set.
>
>     block2mtd is a owrt specific driver, it wont work on on vanilla.
>
>
> Thanks for letting me know. I was not aware and just assumed the 
> block2mtd would work as in owrt. Perhaps a better starting point for 
> my work would be to try to hack together 4.14 support for mediatek in 
> OpenWRT. Installing a «normal» rootfs is a bit of a pain on this 
> board. Another option would be to move the mtd-patches I guess. Will 
> try both and see how it goes :)
>
> BR,
> Kristian
>

I have 4.14 support in my staging tree alread, i'll psh it to owrt the 
next couple of days

     John

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Re: Questions about bringing up MT7623 board

[John Crispin]

On 11/02/18 18:54, Kristian Evensen wrote:
> Hi,
>
>
> On Sun, 11 Feb 2018 at 18:45, John Crispin <john@phrozen.org 
> <mailto:john@phrozen.org>> wrote:
>
>
>
>     On 11/02/18 17:09, Kristian Evensen wrote:
>     > Hi,
>     >
>     > On Sun, 11 Feb 2018 at 15:46, John Crispin <john@phrozen.org
>     <mailto:john@phrozen.org>
>     > <mailto:john@phrozen.org <mailto:john@phrozen.org>>> wrote:
>     >
>     >
>     >
>     >     On 11/02/18 15:01, Kristian Evensen wrote:
>     >     > Hi,
>     >     >
>     >     > It turns out that enabling early printk in the kernel
>     config did the
>     >     > trick, thank you very much for pointing me to this error.
>     I also
>     >     > changed my defconfig a bit, I merged the two OpenWRT 4.9
>     configs
>     >     > (generic and mediatek), created a new defconfig and used
>     that as a
>     >     > starting point (make ..._defconfig). Now I can finally see
>     what is
>     >     > going on and I see that the boot progresses quite far. My
>     boot now
>     >     > gets to the point where it looks for the root filesystem,
>     but here I
>     >     > have hit another problem. The kernel only produces the
>     following
>     >     > error:
>     >     >
>     >     > [    2.037354] mmc0: new high speed MMC card at address 0001
>     >     > [    2.045252] mmcblk0: mmc0:0001 008G70 7.28 GiB
>     >     > [    2.053533] mmcblk0boot0: mmc0:0001 008G70 partition 1
>     4.00 MiB
>     >     > [    2.053723] mmcblk0boot1: mmc0:0001 008G70 partition 2
>     4.00 MiB
>     >     > [    2.053910] mmcblk0rpmb: mmc0:0001 008G70 partition 3
>     4.00 MiB
>     >     > [    2.055456]  mmcblk0: p2 p3
>     >     > [    2.056986] xhci-mtk 1a1c0000.usb: 1a1c0000.usb supply
>     vbus not
>     >     > found, using dummy regulator
>     >     > [    2.153894] vpa: disabling
>     >     > [    2.156608] vmc: disabling
>     >     > [    2.159296] vmch: disabling
>     >     > [    2.162103] vgp1: disabling
>     >     > [    2.164897] vcamaf: disabling
>     >     > [    2.168241] VFS: Cannot open root device "(null)" or
>     >     > unknown-block(0,0): error -6
>     >     > [    2.175712] Please append a correct "root=" boot
>     option; here are
>     >     > the available partitions:
>     >     > [    2.184031] b300         7634944 mmcblk0
>     >     > [    2.184036]  driver: mmcblk
>     >     > [    2.190775]   b302         1048576 mmcblk0p2 00000000-02
>     >     > [    2.190779]
>     >     > [    2.197563]   b303         2097152 mmcblk0p3 00000000-03
>     >     > [    2.197566]
>     >     > [    2.204332] b318            4096 mmcblk0rpmb
>     >     > [    2.204335]  (driver?)
>     >     > [    2.210988] b310            4096 mmcblk0boot1
>     >     > [    2.210992]  (driver?)
>     >     > [    2.217747] b308            4096 mmcblk0boot0
>     >     > [    2.217750]  (driver?)
>     >     > [    2.224504] Kernel panic - not syncing: VFS: Unable to
>     mount root
>     >     > fs on unknown-block(0,0)
>     >     >
>     >     > My rootfs, etc, is stored on mmcblk0 and the partitioning is
>     >     specified
>     >     > in the boot arguments (which are:
>     >     > block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5
>     >     >
>     >
>      mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool)
>     >     >   rootfstype=squashfs,jffs2). I have doublecheked, and I can't
>     >     find any
>     >     > missing MTD-options compared to the 4.9 config. Could it
>     be that new
>     >     > options have been added and have to be specified? For example,
>     >     > MTD_BLOCK2MTD and MTD_CMDLINE_PARTS is set.
>     >
>     >     block2mtd is a owrt specific driver, it wont work on on vanilla.
>     >
>     >
>     > Thanks for letting me know. I was not aware and just assumed the
>     > block2mtd would work as in owrt. Perhaps a better starting point for
>     > my work would be to try to hack together 4.14 support for
>     mediatek in
>     > OpenWRT. Installing a «normal» rootfs is a bit of a pain on this
>     > board. Another option would be to move the mtd-patches I guess. Will
>     > try both and see how it goes :)
>     >
>     > BR,
>     > Kristian
>     >
>
>     I have 4.14 support in my staging tree alread, i'll psh it to owrt the
>     next couple of days
>
>          John
>
>
> Great news, thanks for your effort! Would it be possible for you to 
> push it to your staging tree on openwrt.org <http://openwrt.org>, so 
> that I can pull and start testing with my board?
>
> BR,
> Kristian
>
>


will do in the morning ....
     John


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Re: Questions about bringing up MT7623 board

[Kristian Evensen]

Hi John,

On Sun, Feb 11, 2018 at 6:56 PM, John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org> wrote:
> will do in the morning ....

Thanks, looking forward to tomorrow then.

And sorry to the list and John for sending HTML-emails. Turns out the
Gmail-application for iPhone only wants to send HTML-encoded emails,
so time to find an alternative ...

-Kristian

Re: Questions about bringing up MT7623 board

[Matthias Brugger]

On 02/11/2018 11:55 AM, Kristian Evensen wrote:
> Hi,
> 
> On Sun, Feb 11, 2018 at 11:41 AM, John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org> wrote:
>> Is Earlyprinkt enabled in the kernel .config ?
> 
> No, turns out CONFIG_EARLY_PRINTK was not enabled. This is the first
> time I am trying to add support for a board outisde the safe walls of
> OpenWRT, so sorry for such a rookie mistake.
> 

More then a rookie mistake for me it's kind of an overlook which can cost you
half a day. This kind of errors at least to me they happens on a semi-regular
basis :)

Nice to see more people tinkering with Mediatek SoCs :)

Regards,
Matthias

Re: Questions about bringing up MT7623 board

[Kristian Evensen]

Hi,

On Mon, Feb 12, 2018 at 12:08 PM, Matthias Brugger
<matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>
>
> On 02/11/2018 11:55 AM, Kristian Evensen wrote:
>> Hi,
>>
>> On Sun, Feb 11, 2018 at 11:41 AM, John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org> wrote:
>>> Is Earlyprinkt enabled in the kernel .config ?
>>
>> No, turns out CONFIG_EARLY_PRINTK was not enabled. This is the first
>> time I am trying to add support for a board outisde the safe walls of
>> OpenWRT, so sorry for such a rookie mistake.
>>
>
> More then a rookie mistake for me it's kind of an overlook which can cost you
> half a day. This kind of errors at least to me they happens on a semi-regular
> basis :)

Good to know I am not the only one that has made this mistake :)

My plan now is to start with John's 4.14 mediatek support when
available and getting my board up with OpenWRT, then sending an RFC
with the DTS to the list. Once all of that is ready, I will look into
how I can partition the eMMC on my board so that I can install a
"normal" rootfs and make the board work with the mainline kernel. I am
sure I will have lots of questions, so this is probably not my last
email :)

BR,
Kristian

Re: Questions about bringing up MT7623 board

[Sean Wang]

On Mon, 2018-02-12 at 13:02 +0100, Kristian Evensen wrote:
> Hi,
> 
> On Mon, Feb 12, 2018 at 12:08 PM, Matthias Brugger
> <matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> >
> >
> > On 02/11/2018 11:55 AM, Kristian Evensen wrote:
> >> Hi,
> >>
> >> On Sun, Feb 11, 2018 at 11:41 AM, John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org> wrote:
> >>> Is Earlyprinkt enabled in the kernel .config ?
> >>
> >> No, turns out CONFIG_EARLY_PRINTK was not enabled. This is the first
> >> time I am trying to add support for a board outisde the safe walls of
> >> OpenWRT, so sorry for such a rookie mistake.
> >>
> >
> > More then a rookie mistake for me it's kind of an overlook which can cost you
> > half a day. This kind of errors at least to me they happens on a semi-regular
> > basis :)
> 
> Good to know I am not the only one that has made this mistake :)
> 
> My plan now is to start with John's 4.14 mediatek support when
> available and getting my board up with OpenWRT, then sending an RFC
> with the DTS to the list. Once all of that is ready, I will look into
> how I can partition the eMMC on my board so that I can install a
> "normal" rootfs and make the board work with the mainline kernel. I am
> sure I will have lots of questions, so this is probably not my last
> email :)
> 

Hi, Kristian

Just let you know that I will extend common files and extend/add some
existing/new official reference boards such as mt7623n with emmc/nand
and mt7623a with emmc/nand to avoid just copy-n-pasting those much
almost identical nodes into following new dts.

bananapi-r2 board is also derived and customized from mt7623n with emmc
board, so it will be reasonabe to be restructured to reuse the nodes in
common files.

The thing will happen in this two weeks. You can base the work to extend
yours. 

Your SoC is based on MT7623A? I guessed it is because I have seen some
warning happenings about generic power domains in your boot log.

	Sean

> BR,
> Kristian
> 
> _______________________________________________
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> http://lists.infradead.org/mailman/listinfo/linux-mediatek

Re: Questions about bringing up MT7623 board

[Kristian Evensen]

Hi Sean,

On Mon, Feb 12, 2018 at 3:37 PM, Sean Wang <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> wrote:
> Just let you know that I will extend common files and extend/add some
> existing/new official reference boards such as mt7623n with emmc/nand
> and mt7623a with emmc/nand to avoid just copy-n-pasting those much
> almost identical nodes into following new dts.
>
> bananapi-r2 board is also derived and customized from mt7623n with emmc
> board, so it will be reasonabe to be restructured to reuse the nodes in
> common files.
>
> The thing will happen in this two weeks. You can base the work to extend
> yours.
>
> Your SoC is based on MT7623A? I guessed it is because I have seen some
> warning happenings about generic power domains in your boot log.
>
>         Sean

Great, thanks for letting me know. My 4.9-DTS is just a slightly
modified version of the eMMC-DTS, the only changes I made was to
update bootargs and switch configuration. So adding upstream support
should, fingers crossed, be quite fast. My main motivation for adding
upstream support, in addition to it being fun, interesting and maybe
can help someone else, is to see if I can get the USB OTG port on the
board working. The port works with proprietary firmware I got with the
device, but not with 4.9 and I was not able to get a good answer on
how to enable it from the vendor. I see patches related to MT7623 and
USB, but nothing mentioning USB OTG specifically. Has there been any
work on the OTG-port, or should it "just" work out of the box? The
reason I am trying to get the OTG-port to work, is that the vendor has
connect a modem (via mini-PCIe) to this port.

Yes, the SoC I am working on is based on MT7623A. It is meant for use
in routers, so no need for HDMI, etc. (which is as far as I have
understood the main differences between N and A).

BR,
Kristian

Re: Questions about bringing up MT7623 board

[Andreas Färber]

Hi Matthias,

Am 12.02.2018 um 12:08 schrieb Matthias Brugger:
> On 02/11/2018 11:55 AM, Kristian Evensen wrote:
>> On Sun, Feb 11, 2018 at 11:41 AM, John Crispin <john@phrozen.org> wrote:
>>> Is Earlyprinkt enabled in the kernel .config ?
>>
>> No, turns out CONFIG_EARLY_PRINTK was not enabled. This is the first
>> time I am trying to add support for a board outisde the safe walls of
>> OpenWRT, so sorry for such a rookie mistake.
>>
> 
> More then a rookie mistake for me it's kind of an overlook which can cost you
> half a day. This kind of errors at least to me they happens on a semi-regular
> basis :)

Is there some problem with using earlycon on Mediatek? That should avoid
tinkering with earlyprintk Kconfig options.

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/tty/serial/8250/8250_mtk.c

The mtk8250 earlycon option is not documented for users:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/plain/Documentation/admin-guide/kernel-parameters.txt

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

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Re: Questions about bringing up MT7623 board

[Kristian Evensen]

[-- Attachment #1: Type: text/plain, Size: 4949 bytes --]

Hello,

On Mon, Feb 12, 2018 at 3:49 PM, Kristian Evensen
<kristian.evensen-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> Great, thanks for letting me know. My 4.9-DTS is just a slightly
> modified version of the eMMC-DTS, the only changes I made was to
> update bootargs and switch configuration. So adding upstream support
> should, fingers crossed, be quite fast. My main motivation for adding
> upstream support, in addition to it being fun, interesting and maybe
> can help someone else, is to see if I can get the USB OTG port on the
> board working. The port works with proprietary firmware I got with the
> device, but not with 4.9 and I was not able to get a good answer on
> how to enable it from the vendor. I see patches related to MT7623 and
> USB, but nothing mentioning USB OTG specifically. Has there been any
> work on the OTG-port, or should it "just" work out of the box? The
> reason I am trying to get the OTG-port to work, is that the vendor has
> connect a modem (via mini-PCIe) to this port.

I finally got around to working on my mt7623-board again. As a
starting point for having an easy way of building kernel + rootfs, I
used OpenWRT and the eMMC reference board-dts. I copied the dts,
updated the bootargs + memory node and then added missing nodes by
copying the most recent DTS' that I could find (usually in patches on
the mailing list or the linux-mediatek Github repo). For example, my
board uses pcie, which is not in the OpenWRT reference board dts. I
have attached my WIP patch in case anyone is curios or has time to
look. My DTS probably contains several nodes that are not needed, but
I would like to have as much as possible up and running before putting
the file on a diet.

With the patch above, I am able to bring the board up, networking
works, the USB port on the front of my device works and I can mess
around with the rootfs. However, two things do not not work and I am
starting to run out of ideas of what to try:

* My board is equipped with a 2.4GHz and a 5GHz wifi card, both
connected via PCIe. The 2.4 card is connected to a "pure" PCIe-slot
(pcie@1,0), while the 5GHz uses the slot that is shared between PCIe
and USB3.0 (I think this is pcie@2,0). Based on my naive
understanding, in order to enable this slot (as PCIe), I should set
u3phy2 to okay (since phy is u3port1 in dtsi), but not enable usb2.
However, when I set u3phy2 to okay, the 2.4GHz card disappears as well
and I can no long see the PCI bridge (output from lspci is empty). If
I don't add the u3phy2-node, then the 2.4Ghz card appears, but no
5GHz. Does anyone know how to make this slot work in PCIe-mode? I
tried with pcie@0,0 instead of pcie@2,0 as well, but it did not have
an effect.

* The board has a PCIe slot connected to the USB OTG-port, intended
for use together with modems. This slot is not working with my kernel
and for example the modem does not show up when I do lsusb. I have
been doing some digging, but so far turned up blank. Does anyone have
any pointers on where to look or where to start in order to add
support for this port? I see that the port + modem works with the
vendor firmware, but I have not been able to figure out which steps
they take to activate it.

* The following message is written to the log a couple of times during boot:

[    2.341219] ------------[ cut here ]------------
[    2.341225] WARNING: CPU: 3 PID: 65 at drivers/clk/clk.c:476
clk_unprepare+0x24/0x2c
[    2.341227] Modules linked in:
[    2.341233] CPU: 3 PID: 65 Comm: kworker/3:1 Tainted: G        W
   4.14.36 #0
[    2.341236] Hardware name: Mediatek Cortex-A7 (Device Tree)
[    2.341241] Workqueue: pm genpd_power_off_work_fn
[    2.341250] [<c010f054>] (unwind_backtrace) from [<c010b1f4>]
(show_stack+0x10/0x14)
[    2.341259] [<c010b1f4>] (show_stack) from [<c0540f9c>]
(dump_stack+0x78/0x8c)
[    2.341267] [<c0540f9c>] (dump_stack) from [<c01172e8>] (__warn+0xe4/0x100)
[    2.341273] [<c01172e8>] (__warn) from [<c01173b4>]
(warn_slowpath_null+0x20/0x28)
[    2.341281] [<c01173b4>] (warn_slowpath_null) from [<c031c4d4>]
(clk_unprepare+0x24/0x2c)
[    2.341289] [<c031c4d4>] (clk_unprepare) from [<c03260c0>]
(scpsys_power_off+0x130/0x1cc)
[    2.341297] [<c03260c0>] (scpsys_power_off) from [<c0361348>]
(genpd_power_off+0x17c/0x244)
[    2.341305] [<c0361348>] (genpd_power_off) from [<c0361bf8>]
(genpd_power_off_work_fn+0x2c/0x40)
[    2.341313] [<c0361bf8>] (genpd_power_off_work_fn) from
[<c012cd4c>] (process_one_work+0x22c/0x3d0)
[    2.341320] [<c012cd4c>] (process_one_work) from [<c012dc14>]
(worker_thread+0x308/0x524)
[    2.341327] [<c012dc14>] (worker_thread) from [<c0132464>]
(kthread+0x12c/0x138)
[    2.341335] [<c0132464>] (kthread) from [<c0107a08>]
(ret_from_fork+0x14/0x2c)
[    2.341337] ---[ end trace 7b1c61fe23a78e39 ]---

Error does not seem critical, board works fine, so not sure if this is
something to worry about or not.

Thanks in advance for any help!

BR,
Kristian

[-- Attachment #2: 0001-U7623-4.14-patch.patch --]
[-- Type: text/x-patch, Size: 19008 bytes --]

From b2c29ea45d5df714e94bb278d53daafe9274f596 Mon Sep 17 00:00:00 2001
From: Kristian Evensen <kristian.evensen@gmail.com>
Date: Sun, 29 Apr 2018 17:07:36 +0200
Subject: [PATCH] U7623 4.14 patch

---
 .../mediatek/base-files/etc/board.d/02_network     |   3 +-
 .../mediatek/base-files/lib/upgrade/platform.sh    |   3 +-
 target/linux/mediatek/image/32.mk                  |   2 +
 .../mediatek/patches-4.14/0065-u7623-dts.patch     | 676 +++++++++++++++++++++
 4 files changed, 682 insertions(+), 2 deletions(-)
 create mode 100644 target/linux/mediatek/patches-4.14/0065-u7623-dts.patch

diff --git a/target/linux/mediatek/base-files/etc/board.d/02_network b/target/linux/mediatek/base-files/etc/board.d/02_network
index 8015cf3cc2..39d9ca8cc5 100755
--- a/target/linux/mediatek/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/base-files/etc/board.d/02_network
@@ -13,7 +13,8 @@ mediatek_setup_interfaces()
 		ucidef_set_interface_lan "lan0 lan1 lan2 lan3"
 		ucidef_set_interface_wan eth1
 		;;
-	'bananapi,bpi-r2') 
+	'bananapi,bpi-r2'|\
+	'unielec,u7623')
 		ucidef_set_interface_lan "lan0 lan1 lan2 lan3"
 		ucidef_set_interface_wan wan
 		;;
diff --git a/target/linux/mediatek/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/base-files/lib/upgrade/platform.sh
index 0429ca8b89..de78193f37 100755
--- a/target/linux/mediatek/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/base-files/lib/upgrade/platform.sh
@@ -29,7 +29,8 @@ platform_check_image() {
 
 	case "$board" in
 	bananapi,bpi-r2 |\
-	mediatek,mt7623a-rfb-emmc)
+	mediatek,mt7623a-rfb-emmc |\
+	unielec,u7623)
 		local kernel_length=`(tar xf $tar_file sysupgrade-$board/kernel -O | wc -c) 2> /dev/null`
 		local rootfs_length=`(tar xf $tar_file sysupgrade-$board/root -O | wc -c) 2> /dev/null`
 		;;
diff --git a/target/linux/mediatek/image/32.mk b/target/linux/mediatek/image/32.mk
index 7b7e303124..83127592ed 100644
--- a/target/linux/mediatek/image/32.mk
+++ b/target/linux/mediatek/image/32.mk
@@ -22,6 +22,7 @@ endef
 
 COMPAT_BPI-R2:=bananapi,bpi-r2
 COMPAT_EMMC:=mediatek,mt7623a-rfb-emmc
+COMPAT_U7623:=unielec,u7623
 
 define Image/Build/squashfs
 	$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
@@ -29,4 +30,5 @@ define Image/Build/squashfs
 
 	$(call Image/Build/SysupgradeCombined,mt7623n-bananapi-bpi-r2,squashfs,$$(COMPAT_BPI-R2))
 	$(call Image/Build/SysupgradeCombined,mt7623a-rfb-emmc,squashfs,$$(COMPAT_EMMC))
+	$(call Image/Build/SysupgradeCombined,mt7623a-unielec-u7623,squashfs,$$(COMPAT_U7623))
 endef
diff --git a/target/linux/mediatek/patches-4.14/0065-u7623-dts.patch b/target/linux/mediatek/patches-4.14/0065-u7623-dts.patch
new file mode 100644
index 0000000000..4368f7ba2e
--- /dev/null
+++ b/target/linux/mediatek/patches-4.14/0065-u7623-dts.patch
@@ -0,0 +1,676 @@
+From 8b580250d31b679f9e3a71f5f9dc2edd883b0a34 Mon Sep 17 00:00:00 2001
+From: Kristian Evensen <kristian.evensen@gmail.com>
+Date: Sun, 29 Apr 2018 17:01:58 +0200
+Subject: [PATCH] Add U7623 DTS
+
+---
+ arch/arm/boot/dts/Makefile                  |   1 +
+ arch/arm/boot/dts/mt7623.dtsi               | 104 ++++++
+ arch/arm/boot/dts/mt7623a-unielec-u7623.dts | 528 ++++++++++++++++++++++++++++
+ 3 files changed, 633 insertions(+)
+ create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 3fec84fa0..3fdda8427 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -1062,6 +1062,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
+ 	mt6589-aquaris5.dtb \
+ 	mt6592-evb.dtb \
+ 	mt7623a-rfb-emmc.dtb \
++	mt7623a-unielec-u7623.dtb \
+ 	mt7623n-rfb-nand.dtb \
+ 	mt7623n-bananapi-bpi-r2.dtb \
+ 	mt8127-moose.dtb \
+diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
+index 09798f37a..a027a4975 100644
+--- a/arch/arm/boot/dts/mt7623.dtsi
++++ b/arch/arm/boot/dts/mt7623.dtsi
+@@ -670,6 +670,110 @@
+ 		#reset-cells = <1>;
+ 	};
+ 
++	pcie: pcie@1a140000 {
++		compatible = "mediatek,mt7623-pcie";
++		device_type = "pci";
++		reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */
++		      <0 0x1a142000 0 0x1000>, /* Port0 registers */
++		      <0 0x1a143000 0 0x1000>, /* Port1 registers */
++		      <0 0x1a144000 0 0x1000>; /* Port2 registers */
++		reg-names = "subsys", "port0", "port1", "port2";
++		#address-cells = <3>;
++		#size-cells = <2>;
++		#interrupt-cells = <1>;
++		interrupt-map-mask = <0xf800 0 0 0>;
++		interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>,
++				<0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>,
++				<0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
++		clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
++			 <&hifsys CLK_HIFSYS_PCIE0>,
++			 <&hifsys CLK_HIFSYS_PCIE1>,
++			 <&hifsys CLK_HIFSYS_PCIE2>;
++		clock-names = "free_ck", "sys_ck0", "sys_ck1", "sys_ck2";
++		resets = <&hifsys MT2701_HIFSYS_PCIE0_RST>,
++			 <&hifsys MT2701_HIFSYS_PCIE1_RST>,
++			 <&hifsys MT2701_HIFSYS_PCIE2_RST>;
++		reset-names = "pcie-rst0", "pcie-rst1", "pcie-rst2";
++		phys = <&pcie0_port PHY_TYPE_PCIE>,
++		       <&pcie1_port PHY_TYPE_PCIE>,
++		       <&u3port1 PHY_TYPE_PCIE>;
++		phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";
++		power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
++		bus-range = <0x00 0xff>;
++		status = "disabled";
++		ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000
++			  0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>;
++
++		pcie@0,0 {
++			reg = <0x0000 0 0 0 0>;
++			#address-cells = <3>;
++			#size-cells = <2>;
++			#interrupt-cells = <1>;
++			interrupt-map-mask = <0 0 0 0>;
++			interrupt-map = <0 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>;
++			ranges;
++			num-lanes = <1>;
++			status = "disabled";
++		};
++		pcie@1,0 {
++			reg = <0x0800 0 0 0 0>;
++			#address-cells = <3>;
++			#size-cells = <2>;
++			#interrupt-cells = <1>;
++			interrupt-map-mask = <0 0 0 0>;
++			interrupt-map = <0 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
++			ranges;
++			num-lanes = <1>;
++			status = "disabled";
++		};
++
++		pcie@2,0 {
++			reg = <0x1000 0 0 0 0>;
++			#address-cells = <3>;
++			#size-cells = <2>;
++			#interrupt-cells = <1>;
++			interrupt-map-mask = <0 0 0 0>;
++			interrupt-map = <0 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
++			ranges;
++			num-lanes = <1>;
++			status = "disabled";
++		};
++	};
++
++	pcie0_phy: pcie-phy@1a149000 {
++		compatible = "mediatek,generic-tphy-v1";
++		reg = <0 0x1a149000 0 0x0700>;
++		#address-cells = <2>;
++		#size-cells = <2>;
++		ranges;
++		status = "disabled";
++
++		pcie0_port: pcie-phy@1a149900 {
++			reg = <0 0x1a149900 0 0x0700>;
++			clocks = <&clk26m>;
++			clock-names = "ref";
++			#phy-cells = <1>;
++			status = "okay";
++		};
++	};
++
++	pcie1_phy: pcie-phy@1a14a000 {
++		compatible = "mediatek,generic-tphy-v1";
++		reg = <0 0x1a14a000 0 0x0700>;
++		#address-cells = <2>;
++		#size-cells = <2>;
++		ranges;
++		status = "disabled";
++
++		pcie1_port: pcie-phy@1a14a900 {
++			reg = <0 0x1a14a900 0 0x0700>;
++			clocks = <&clk26m>;
++			clock-names = "ref";
++			#phy-cells = <1>;
++			status = "okay";
++		};
++	};
++
+ 	usb1: usb@1a1c0000 {
+ 		compatible = "mediatek,mt7623-xhci",
+ 			     "mediatek,mt8173-xhci";
+diff --git a/arch/arm/boot/dts/mt7623a-unielec-u7623.dts b/arch/arm/boot/dts/mt7623a-unielec-u7623.dts
+new file mode 100644
+index 000000000..066b25bb4
+--- /dev/null
++++ b/arch/arm/boot/dts/mt7623a-unielec-u7623.dts
+@@ -0,0 +1,528 @@
++/*
++ * Copyright 2017 Sean Wang <sean.wang@mediatek.com>
++ *
++ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++ */
++
++/dts-v1/;
++#include <dt-bindings/input/input.h>
++#include "mt7623.dtsi"
++#include "mt6323.dtsi"
++
++/ {
++	model = "Unielec U7623 512MB RAM/8GB eMMC";
++	compatible = "unielec,u7623", "mediatek,mt7623";
++
++	aliases {
++		serial2 = &uart2;
++	};
++
++	chosen {
++		bootargs = "earlyprintk block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5 mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),6144M(userdata),-(bmtpool) root=/dev/mtdblock6 rootfstype=squashfs,jffs2";
++		stdout-path = "serial2:115200n8";
++	};
++
++	memory {
++		reg = <0 0x80000000 0 0x10000000>;
++	};
++
++	cpus {
++		cpu@0 {
++			proc-supply = <&mt6323_vproc_reg>;
++		};
++
++		cpu@1 {
++			proc-supply = <&mt6323_vproc_reg>;
++		};
++
++		cpu@2 {
++			proc-supply = <&mt6323_vproc_reg>;
++		};
++
++		cpu@3 {
++			proc-supply = <&mt6323_vproc_reg>;
++		};
++	};
++
++	reg_1p8v: regulator-1p8v {
++		compatible = "regulator-fixed";
++		regulator-name = "fixed-1.8V";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		regulator-boot-on;
++		regulator-always-on;
++	};
++
++	reg_3p3v: regulator-3p3v {
++		compatible = "regulator-fixed";
++		regulator-name = "fixed-3.3V";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-boot-on;
++		regulator-always-on;
++	};
++
++	reg_5v: regulator-5v {
++		compatible = "regulator-fixed";
++		regulator-name = "fixed-5V";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		regulator-boot-on;
++		regulator-always-on;
++	};
++
++	memory@80000000 {
++		reg = <0 0x80000000 0 0x40000000>;
++	};
++
++	mt7530: switch@0 {
++		compatible = "mediatek,mt7530";
++		#address-cells = <1>;
++		#size-cells = <0>;
++	};
++};
++
++&crypto {
++	status = "okay";
++};
++
++&eth {
++	status = "okay";
++
++	gmac0: mac@0 {
++		compatible = "mediatek,eth-mac";
++		reg = <0>;
++		phy-mode = "trgmii";
++
++		fixed-link {
++			speed = <1000>;
++			full-duplex;
++			pause;
++		};
++	};
++
++	mdio: mdio-bus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		phy5: ethernet-phy@5 {
++			reg = <5>;
++			phy-mode = "rgmii-rxid";
++		};
++	};
++};
++
++&mt7530 {
++	compatible = "mediatek,mt7530";
++	#address-cells = <1>;
++	#size-cells = <0>;
++	reg = <0>;
++	pinctrl-names = "default";
++	mediatek,mcm;
++	resets = <&ethsys 2>;
++	reset-names = "mcm";
++	core-supply = <&mt6323_vpa_reg>;
++	io-supply = <&mt6323_vemc3v3_reg>;
++
++	dsa,mii-bus = <&mdio>;
++
++	ports {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0>;
++
++		port@0 {
++			reg = <0>;
++			label = "lan0";
++			cpu = <&cpu_port0>;
++		};
++
++		port@1 {
++			reg = <1>;
++			label = "lan1";
++			cpu = <&cpu_port0>;
++		};
++
++		port@2 {
++			reg = <2>;
++			label = "lan2";
++			cpu = <&cpu_port0>;
++		};
++
++		port@3 {
++			reg = <3>;
++			label = "lan3";
++			cpu = <&cpu_port0>;
++		};
++
++		port@4 {
++			reg = <4>;
++			label = "wan";
++			cpu = <&cpu_port0>;
++		};
++
++		cpu_port0: port@6 {
++			reg = <6>;
++			label = "cpu";
++			ethernet = <&gmac0>;
++			phy-mode = "trgmii";
++
++			fixed-link {
++				speed = <1000>;
++				full-duplex;
++			};
++		};
++	};
++};
++
++&i2c0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c0_pins_a>;
++	status = "okay";
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins_b>;
++	status = "okay";
++};
++
++&i2c2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c2_pins_b>;
++	status = "okay";
++};
++
++&mmc0 {
++	pinctrl-names = "default", "state_uhs";
++	pinctrl-0 = <&mmc0_pins_default>;
++	pinctrl-1 = <&mmc0_pins_uhs>;
++	status = "okay";
++	bus-width = <8>;
++	max-frequency = <50000000>;
++	cap-mmc-highspeed;
++	vmmc-supply = <&reg_3p3v>;
++	vqmmc-supply = <&reg_1p8v>;
++	non-removable;
++};
++
++&mmc1 {
++	pinctrl-names = "default", "state_uhs";
++	pinctrl-0 = <&mmc1_pins_default>;
++	pinctrl-1 = <&mmc1_pins_uhs>;
++	status = "okay";
++	bus-width = <4>;
++	max-frequency = <50000000>;
++	cap-sd-highspeed;
++	cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
++	vmmc-supply = <&reg_3p3v>;
++	vqmmc-supply = <&reg_3p3v>;
++};
++
++&pio {
++	cir_pins_a:cir@0 {
++		pins_cir {
++			pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
++			bias-disable;
++		};
++	};
++
++	i2c0_pins_a: i2c@0 {
++		pins_i2c0 {
++			pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
++				 <MT7623_PIN_76_SCL0_FUNC_SCL0>;
++			bias-disable;
++		};
++	};
++
++	i2c1_pins_b: i2c@1 {
++		pin_i2c1 {
++			pinmux = <MT7623_PIN_242_URTS2_FUNC_SCL1>,
++				 <MT7623_PIN_243_UCTS2_FUNC_SDA1>;
++			bias-disable;
++		};
++	};
++
++	i2c2_pins_b: i2c@2 {
++		pin_i2c2 {
++			pinmux = <MT7623_PIN_122_GPIO122_FUNC_SDA2>,
++				 <MT7623_PIN_123_HTPLG_FUNC_SCL2>;
++			bias-disable;
++		};
++	};
++
++	i2s0_pins_a: i2s@0 {
++		pin_i2s0 {
++			pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
++				 <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
++				 <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
++				 <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
++				 <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
++			drive-strength = <MTK_DRIVE_12mA>;
++			bias-pull-down;
++		};
++	};
++
++	i2s1_pins_a: i2s@1 {
++		pin_i2s1 {
++			pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
++				 <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
++				 <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
++				 <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
++				 <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
++			drive-strength = <MTK_DRIVE_12mA>;
++			bias-pull-down;
++		};
++	};
++
++	mmc0_pins_default: mmc0default {
++		pins_cmd_dat {
++			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
++				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
++				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
++				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
++				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
++				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
++				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
++				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
++				 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
++			input-enable;
++			bias-pull-up;
++		};
++
++		pins_clk {
++			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
++			bias-pull-down;
++		};
++
++		pins_rst {
++			pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
++			bias-pull-up;
++		};
++	};
++
++	mmc0_pins_uhs: mmc0 {
++		pins_cmd_dat {
++			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
++				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
++				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
++				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
++				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
++				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
++				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
++				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
++				 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
++			input-enable;
++			drive-strength = <MTK_DRIVE_2mA>;
++			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
++		};
++
++		pins_clk {
++			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
++			drive-strength = <MTK_DRIVE_2mA>;
++			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
++		};
++
++		pins_rst {
++			pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
++			bias-pull-up;
++		};
++	};
++
++	mmc1_pins_default: mmc1default {
++		pins_cmd_dat {
++			pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
++				 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
++				 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
++				 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
++				 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
++			input-enable;
++			drive-strength = <MTK_DRIVE_4mA>;
++			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
++		};
++
++		pins_clk {
++			pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
++			bias-pull-down;
++			drive-strength = <MTK_DRIVE_4mA>;
++		};
++
++		pins_wp {
++			pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>;
++			input-enable;
++			bias-pull-up;
++		};
++
++		pins_insert {
++			pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>;
++			bias-pull-up;
++		};
++	};
++
++	mmc1_pins_uhs: mmc1 {
++		pins_cmd_dat {
++			pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
++				 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
++				 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
++				 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
++				 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
++			input-enable;
++			drive-strength = <MTK_DRIVE_4mA>;
++			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
++		};
++
++		pins_clk {
++			pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
++			drive-strength = <MTK_DRIVE_4mA>;
++			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
++		};
++	};
++
++	pwm_pins_a: pwm@0 {
++		pins_pwm {
++			pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
++				 <MT7623_PIN_204_PWM1_FUNC_PWM1>,
++				 <MT7623_PIN_205_PWM2_FUNC_PWM2>,
++				 <MT7623_PIN_206_PWM3_FUNC_PWM3>,
++				 <MT7623_PIN_207_PWM4_FUNC_PWM4>;
++		};
++	};
++
++	spi0_pins_a: spi@0 {
++		pins_spi {
++			pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
++				<MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
++				<MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
++				<MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
++			bias-disable;
++		};
++	};
++
++	spi1_pins_a: spi@1 {
++		pins_spi {
++			pinmux = <MT7623_PIN_7_SPI1_CSN_FUNC_SPI1_CS>,
++				<MT7623_PIN_8_SPI1_MI_FUNC_SPI1_MI>,
++				<MT7623_PIN_9_SPI1_MO_FUNC_SPI1_MO>,
++				<MT7623_PIN_199_SPI1_CK_FUNC_SPI1_CK>;
++			bias-disable;
++		};
++	};
++
++	uart0_pins_a: uart@0 {
++		pins_dat {
++			pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
++				 <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
++		};
++	};
++
++	uart1_pins_a: uart@1 {
++		pins_dat {
++			pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
++				 <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
++		};
++	};
++
++	uart2_pins_b: uart@2 {
++		pins_dat {
++			pinmux = <MT7623_PIN_200_URXD2_FUNC_URXD2>,
++				 <MT7623_PIN_201_UTXD2_FUNC_UTXD2>;
++		};
++	};
++
++	pcie_default: pcie_pin_default {
++		pins_cmd_dat {
++			pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
++				 <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
++			bias-disable;
++		};
++	};
++};
++
++&pwm {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pwm_pins_a>;
++	status = "okay";
++};
++
++&pwrap {
++	mt6323 {
++		mt6323led: led {
++			compatible = "mediatek,mt6323-led";
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			led@0 {
++				reg = <0>;
++				label = "led0";
++				default-state = "off";
++			};
++
++			led@1 {
++				reg = <1>;
++				label = "led1";
++				default-state = "off";
++			};
++
++			led@2 {
++				reg = <2>;
++				label = "led2";
++				default-state = "off";
++			};
++		};
++	};
++};
++
++&spi0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi0_pins_a>;
++	status = "okay";
++};
++
++&spi1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi1_pins_a>;
++	status = "okay";
++};
++
++&uart2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart2_pins_b>;
++	status = "okay";
++};
++
++&usb1 {
++	vusb33-supply = <&reg_3p3v>;
++	vbus-supply = <&reg_3p3v>;
++	status = "okay";
++};
++
++&u3phy1 {
++	status = "okay";
++};
++
++/*&usb2 {
++	vusb33-supply = <&reg_3p3v>;
++	vbus-supply = <&reg_3p3v>;
++	status = "okay";
++};
++
++&u3phy2 {
++	status = "okay";
++};*/
++
++&pcie {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pcie_default>;
++	status = "okay";
++
++	pcie@1,0 {
++		status = "okay";
++	};
++
++/*	pcie@2,0 {
++		status = "okay";
++	};*/
++};
++
++&pcie1_phy {
++	status = "okay";
++};
+-- 
+2.14.1
+
-- 
2.14.1


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Re: Questions about bringing up MT7623 board

[Ryder Lee]

On Sun, 2018-04-29 at 22:18 +0200, Kristian Evensen wrote:
> Hello,
> 
> On Mon, Feb 12, 2018 at 3:49 PM, Kristian Evensen
> <kristian.evensen-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> 
> * My board is equipped with a 2.4GHz and a 5GHz wifi card, both
> connected via PCIe. The 2.4 card is connected to a "pure" PCIe-slot
> (pcie@1,0), while the 5GHz uses the slot that is shared between PCIe
> and USB3.0 (I think this is pcie@2,0). Based on my naive
> understanding, in order to enable this slot (as PCIe), I should set
> u3phy2 to okay (since phy is u3port1 in dtsi), but not enable usb2.
> However, when I set u3phy2 to okay, the 2.4GHz card disappears as well
> and I can no long see the PCI bridge (output from lspci is empty). If
> I don't add the u3phy2-node, then the 2.4Ghz card appears, but no
> 5GHz. Does anyone know how to make this slot work in PCIe-mode? I
> tried with pcie@0,0 instead of pcie@2,0 as well, but it did not have
> an effect.
> 

We didn't support port2 (pcie@2,0) for mainline version, but if you want
to use it you could take a look at -
https://patchwork.kernel.org/patch/9747713/

grep: HIF_SYSCFG1 /HIF_SYSCFG1_PHY2_MASK

That is, you need to clear these bits to 0 to enable PHY for pcie@2,0.

Thanks.

Re: Questions about bringing up MT7623 board

[Kristian Evensen]

[-- Attachment #1: Type: text/plain, Size: 1405 bytes --]

Hi Ryder,

On Mon, Apr 30, 2018 at 3:42 AM, Ryder Lee <ryder.lee-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> wrote:
> We didn't support port2 (pcie@2,0) for mainline version, but if you want
> to use it you could take a look at -
> https://patchwork.kernel.org/patch/9747713/
>
> grep: HIF_SYSCFG1 /HIF_SYSCFG1_PHY2_MASK
>
> That is, you need to clear these bits to 0 to enable PHY for pcie@2,0.

Thanks a lot for the pointer. With the attached patch and a slight
update to my DTS (add a reference to hifsys for usb3phy2), both the
PCIe-slots work and I have both 2.4Ghz and 5GHz.

The "only" thing left now is the USB OTG-port. I got the SDK from the
vendor yesterday, but without any proper documentation. Looking
through the kernel configuration for my board, the only relevant
select options (that I could find), was that USB_MUSB_HDRC and
MUSB_PIO_ONLY was enabled. Enabling those options for my 4.14 kernel
has seemingly no effect, the modem connected to PCIe-slot connected to
the OTG-port (puh) is not visible. Does anyone know where I should
start looking in order to enable this port? I see that there is some
mention of OTG in phy-mtk-tphy.c, but not sure if that is relevant.
Also, as far as I can tell, my device should be set to host mode and
both usb-phys are activated (phy1 is the port on the front of my
board, phy2 shared with pcie).

Thanks in advance for any help (again)!

BR,
Kristian

[-- Attachment #2: 0001-Add-hifsys-support-to-phy-mtk-tphy.patch --]
[-- Type: text/x-patch, Size: 2168 bytes --]

From 4d054fa1f72c65e9640b3dd1a90c2ecb6dd57445 Mon Sep 17 00:00:00 2001
From: Kristian Evensen <kristian.evensen@gmail.com>
Date: Mon, 30 Apr 2018 14:38:01 +0200
Subject: [PATCH] Add hifsys-support to phy-mtk-tphy

---
 drivers/phy/mediatek/phy-mtk-tphy.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
index 721a2a1c9..0cb1cea53 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -22,6 +22,8 @@
 #include <linux/of_address.h>
 #include <linux/phy/phy.h>
 #include <linux/platform_device.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
 
 /* version V1 sub-banks offset base address */
 /* banks shared by multiple phys */
@@ -259,6 +261,9 @@
 #define RG_CDR_BIRLTD0_GEN3_MSK		GENMASK(4, 0)
 #define RG_CDR_BIRLTD0_GEN3_VAL(x)	(0x1f & (x))
 
+#define HIF_SYSCFG1			0x14
+#define HIF_SYSCFG1_PHY2_MASK		(0x3 << 20)
+
 enum mtk_phy_version {
 	MTK_PHY_V1 = 1,
 	MTK_PHY_V2,
@@ -302,6 +307,7 @@ struct mtk_tphy {
 	struct clk *u3phya_ref;	/* reference clock of usb3 anolog phy */
 	const struct mtk_phy_pdata *pdata;
 	struct mtk_phy_instance **phys;
+	struct regmap *hif;
 	int nphys;
 };
 
@@ -594,6 +600,10 @@ static void pcie_phy_instance_init(struct mtk_tphy *tphy,
 	if (tphy->pdata->version != MTK_PHY_V1)
 		return;
 
+	if (tphy->hif)
+		regmap_update_bits(tphy->hif, HIF_SYSCFG1,
+				   HIF_SYSCFG1_PHY2_MASK, 0);
+
 	tmp = readl(u3_banks->phya + U3P_U3_PHYA_DA_REG0);
 	tmp &= ~(P3A_RG_XTAL_EXT_PE1H | P3A_RG_XTAL_EXT_PE2H);
 	tmp |= P3A_RG_XTAL_EXT_PE1H_VAL(0x2) | P3A_RG_XTAL_EXT_PE2H_VAL(0x2);
@@ -1008,6 +1018,16 @@ static int mtk_tphy_probe(struct platform_device *pdev)
 		tphy->u3phya_ref = NULL;
 	}
 
+	if (of_find_property(np, "mediatek,phy-switch", NULL)) {
+		tphy->hif = syscon_regmap_lookup_by_phandle(np,
+							    "mediatek,phy-switch");
+		if (IS_ERR(tphy->hif)) {
+			dev_err(&pdev->dev,
+				"missing \"mediatek,phy-switch\" phandle\n");
+			return PTR_ERR(tphy->hif);
+		}
+	}
+
 	port = 0;
 	for_each_child_of_node(np, child_np) {
 		struct mtk_phy_instance *instance;
-- 
2.14.1


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