From: Robin Murphy <robin.murphy@arm.com> To: Will Deacon <will.deacon@arm.com> Cc: linucherian@gmail.com, catalin.marinas@arm.com, lorenzo.pieralisi@arm.com, hanjun.guo@linaro.org, sudeep.holla@arm.com, rjw@rjwysocki.net, lenb@kernel.org, joro@8bytes.org, robert.moore@intel.com, lv.zheng@intel.com, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org, devel@acpica.org, Sunil.Goutham@cavium.com, Geethasowjanya.Akula@cavium.com, robert.richter@cavium.com, linu.cherian@cavium.com, Geetha <gakula@cavium.com> Subject: Re: [RFC PATCH 3/7] iommu/arm-smmu-v3: Introduce smmu option USE_SHARED_IRQS for Silicon errata Date: Tue, 11 Apr 2017 17:38:21 +0100 [thread overview] Message-ID: <a971af83-10f1-5696-f0c6-0600c04705c3@arm.com> (raw) In-Reply-To: <20170411162123.GF17109@arm.com> On 11/04/17 17:21, Will Deacon wrote: > On Tue, Apr 11, 2017 at 04:54:26PM +0100, Robin Murphy wrote: >> On 11/04/17 15:42, linucherian@gmail.com wrote: >>> From: Geetha <gakula@cavium.com> >>> >>> Cavium 99xx SMMU implementation doesn't not support unique irq lines for >>> gerror, eventq and cmdq-sync. USE_SHARED_IRQS option enables to use single >>> irq line for all three interrupts. >> >> AFAICS, there's nothing actually wrong with using shared wired IRQs - >> the architecture spec doesn't appear to say anything about it. I think >> it might suffice to simply add IRQF_SHARED if we can see the SMMU >> doesn't support MSIs anyway - it doesn't really seem like something we >> need to treat as a specific quirk. > > No, this is not permitted by the spec. See 3.18.2 ("Interrupt sources"), > where it's clear that each source asserts a *unique* wired interrupt. Perhaps I'm reading it too generously; it does indeed specify that the *implementation* has to provide a unique output for each source, but other than suggesting a particular mode of operation based on that I don't see anything actually forbidding the *integration* from then just munging those lines together externally, as integrators so often like to do. That's the case I had in mind. Robin. > > Geetha: does your implementation support MSIs? > > Will >
WARNING: multiple messages have this Message-ID (diff)
From: robin.murphy@arm.com (Robin Murphy) To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 3/7] iommu/arm-smmu-v3: Introduce smmu option USE_SHARED_IRQS for Silicon errata Date: Tue, 11 Apr 2017 17:38:21 +0100 [thread overview] Message-ID: <a971af83-10f1-5696-f0c6-0600c04705c3@arm.com> (raw) In-Reply-To: <20170411162123.GF17109@arm.com> On 11/04/17 17:21, Will Deacon wrote: > On Tue, Apr 11, 2017 at 04:54:26PM +0100, Robin Murphy wrote: >> On 11/04/17 15:42, linucherian at gmail.com wrote: >>> From: Geetha <gakula@cavium.com> >>> >>> Cavium 99xx SMMU implementation doesn't not support unique irq lines for >>> gerror, eventq and cmdq-sync. USE_SHARED_IRQS option enables to use single >>> irq line for all three interrupts. >> >> AFAICS, there's nothing actually wrong with using shared wired IRQs - >> the architecture spec doesn't appear to say anything about it. I think >> it might suffice to simply add IRQF_SHARED if we can see the SMMU >> doesn't support MSIs anyway - it doesn't really seem like something we >> need to treat as a specific quirk. > > No, this is not permitted by the spec. See 3.18.2 ("Interrupt sources"), > where it's clear that each source asserts a *unique* wired interrupt. Perhaps I'm reading it too generously; it does indeed specify that the *implementation* has to provide a unique output for each source, but other than suggesting a particular mode of operation based on that I don't see anything actually forbidding the *integration* from then just munging those lines together externally, as integrators so often like to do. That's the case I had in mind. Robin. > > Geetha: does your implementation support MSIs? > > Will >
next prev parent reply other threads:[~2017-04-11 16:38 UTC|newest] Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-04-11 14:42 [RFC PATCH 0/7] Cavium CN99xx SMMUv3 Errata workarounds linucherian-Re5JQEeQqe8AvxtiuMwx3w 2017-04-11 14:42 ` linucherian at gmail.com 2017-04-11 14:42 ` [RFC PATCH 1/7] iommu/arm-smmu-v3: Introduce smmu option PAGE0_REGS_ONLY for Silicon errata linucherian 2017-04-11 14:42 ` linucherian at gmail.com 2017-04-11 15:42 ` Robin Murphy 2017-04-11 15:42 ` Robin Murphy 2017-04-12 5:05 ` Linu Cherian 2017-04-12 5:05 ` Linu Cherian 2017-04-11 14:42 ` [RFC PATCH 2/7] iommu/arm-smmu-v3: Do resource size checks based on smmu option PAGE0_REGS_ONLY linucherian 2017-04-11 14:42 ` linucherian at gmail.com 2017-04-11 15:43 ` Robin Murphy 2017-04-11 15:43 ` Robin Murphy 2017-04-11 16:39 ` Sunil Kovvuri 2017-04-11 16:39 ` Sunil Kovvuri 2017-04-11 14:42 ` [RFC PATCH 3/7] iommu/arm-smmu-v3: Introduce smmu option USE_SHARED_IRQS for Silicon errata linucherian 2017-04-11 14:42 ` linucherian at gmail.com 2017-04-11 15:54 ` Robin Murphy 2017-04-11 15:54 ` Robin Murphy 2017-04-11 16:21 ` Will Deacon 2017-04-11 16:21 ` Will Deacon [not found] ` <20170411162123.GF17109-5wv7dgnIgG8@public.gmane.org> 2017-04-11 16:34 ` Sunil Kovvuri 2017-04-11 16:34 ` Sunil Kovvuri 2017-04-11 16:38 ` Robin Murphy [this message] 2017-04-11 16:38 ` Robin Murphy [not found] ` <a971af83-10f1-5696-f0c6-0600c04705c3-5wv7dgnIgG8@public.gmane.org> 2017-04-11 16:41 ` Will Deacon 2017-04-11 16:41 ` Will Deacon 2017-04-11 14:42 ` [RFC PATCH 4/7] ACPICA: IORT: Add SMMuV3 model definitions linucherian 2017-04-11 14:42 ` linucherian at gmail.com 2017-04-11 15:59 ` Robin Murphy 2017-04-11 15:59 ` Robin Murphy 2017-04-11 16:57 ` Sunil Kovvuri 2017-04-11 16:57 ` Sunil Kovvuri 2017-04-12 2:33 ` Hanjun Guo 2017-04-12 2:33 ` [Devel] " Hanjun Guo 2017-04-12 2:33 ` Hanjun Guo 2017-04-12 15:21 ` Lorenzo Pieralisi 2017-04-12 15:21 ` Lorenzo Pieralisi 2017-04-11 14:42 ` [RFC PATCH 5/7] iommu/arm-smmu-v3: For ACPI based device probing, set relevant options for different SMMUv3 implementations linucherian 2017-04-11 14:42 ` linucherian at gmail.com 2017-04-12 8:43 ` Robert Richter 2017-04-12 8:43 ` Robert Richter 2017-04-12 10:32 ` Linu Cherian 2017-04-12 10:32 ` Linu Cherian 2017-04-11 14:42 ` [RFC PATCH 6/7] ACPI/IORT: Fixup SMMUv3 resource size for Cavium 99xx SMMUv3 model linucherian 2017-04-11 14:42 ` linucherian at gmail.com 2017-04-11 14:42 ` [RFC PATCH 7/7] arm64: Documentation: Add Cavium ThunderX2 SMMUv3 erratas linucherian 2017-04-11 14:42 ` linucherian at gmail.com 2017-04-11 16:30 ` [RFC PATCH 0/7] Cavium CN99xx SMMUv3 Errata workarounds Will Deacon 2017-04-11 16:30 ` Will Deacon
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