All of lore.kernel.org
 help / color / mirror / Atom feed
From: Sunil Kovvuri <sunil.kovvuri@gmail.com>
To: Robin Murphy <robin.murphy@arm.com>
Cc: linucherian@gmail.com, Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	hanjun.guo@linaro.org, sudeep.holla@arm.com, "Goutham,
	Sunil" <Sunil.Goutham@cavium.com>,
	Geethasowjanya.Akula@cavium.com, Joerg Roedel <joro@8bytes.org>,
	rjw@rjwysocki.net, robert.moore@intel.com,
	robert.richter@cavium.com, linux-acpi@vger.kernel.org,
	iommu@lists.linux-foundation.org, lv.zheng@intel.com,
	linu.cherian@cavium.com, devel@acpica.org,
	LAKML <linux-arm-kernel@lists.infradead.org>,
	lenb@kernel.org
Subject: Re: [RFC PATCH 2/7] iommu/arm-smmu-v3: Do resource size checks based on smmu option PAGE0_REGS_ONLY
Date: Tue, 11 Apr 2017 22:09:39 +0530	[thread overview]
Message-ID: <CA+sq2CfN0QOrcT9Nv3wkf-NwWwV4uO46UmDaObzmhs7W-407qA@mail.gmail.com> (raw)
In-Reply-To: <802c0a38-f5a6-e584-5795-42d8d3fd7603@arm.com>

On Tue, Apr 11, 2017 at 9:13 PM, Robin Murphy <robin.murphy@arm.com> wrote:
> On 11/04/17 15:42, linucherian@gmail.com wrote:
>> From: Linu Cherian <linu.cherian@cavium.com>
>>
>> With implementations supporting only page 0 of register space,
>> resource size can be 64k as well and hence perform size checks
>> based on smmu option PAGE0_REGS_ONLY.
>
> What harm comes of mapping page 1 if we don't access it?
>
> Robin.
>

There are multiple SMMUs on the silicon and CSRs of each SMMU are
64K apart. Hence can't map page-1 even though it's not accessed.

Thanks,
Sunil.

WARNING: multiple messages have this Message-ID (diff)
From: sunil.kovvuri@gmail.com (Sunil Kovvuri)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 2/7] iommu/arm-smmu-v3: Do resource size checks based on smmu option PAGE0_REGS_ONLY
Date: Tue, 11 Apr 2017 22:09:39 +0530	[thread overview]
Message-ID: <CA+sq2CfN0QOrcT9Nv3wkf-NwWwV4uO46UmDaObzmhs7W-407qA@mail.gmail.com> (raw)
In-Reply-To: <802c0a38-f5a6-e584-5795-42d8d3fd7603@arm.com>

On Tue, Apr 11, 2017 at 9:13 PM, Robin Murphy <robin.murphy@arm.com> wrote:
> On 11/04/17 15:42, linucherian at gmail.com wrote:
>> From: Linu Cherian <linu.cherian@cavium.com>
>>
>> With implementations supporting only page 0 of register space,
>> resource size can be 64k as well and hence perform size checks
>> based on smmu option PAGE0_REGS_ONLY.
>
> What harm comes of mapping page 1 if we don't access it?
>
> Robin.
>

There are multiple SMMUs on the silicon and CSRs of each SMMU are
64K apart. Hence can't map page-1 even though it's not accessed.

Thanks,
Sunil.

  reply	other threads:[~2017-04-11 16:39 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-11 14:42 [RFC PATCH 0/7] Cavium CN99xx SMMUv3 Errata workarounds linucherian-Re5JQEeQqe8AvxtiuMwx3w
2017-04-11 14:42 ` linucherian at gmail.com
2017-04-11 14:42 ` [RFC PATCH 1/7] iommu/arm-smmu-v3: Introduce smmu option PAGE0_REGS_ONLY for Silicon errata linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 15:42   ` Robin Murphy
2017-04-11 15:42     ` Robin Murphy
2017-04-12  5:05     ` Linu Cherian
2017-04-12  5:05       ` Linu Cherian
2017-04-11 14:42 ` [RFC PATCH 2/7] iommu/arm-smmu-v3: Do resource size checks based on smmu option PAGE0_REGS_ONLY linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 15:43   ` Robin Murphy
2017-04-11 15:43     ` Robin Murphy
2017-04-11 16:39     ` Sunil Kovvuri [this message]
2017-04-11 16:39       ` Sunil Kovvuri
2017-04-11 14:42 ` [RFC PATCH 3/7] iommu/arm-smmu-v3: Introduce smmu option USE_SHARED_IRQS for Silicon errata linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 15:54   ` Robin Murphy
2017-04-11 15:54     ` Robin Murphy
2017-04-11 16:21     ` Will Deacon
2017-04-11 16:21       ` Will Deacon
     [not found]       ` <20170411162123.GF17109-5wv7dgnIgG8@public.gmane.org>
2017-04-11 16:34         ` Sunil Kovvuri
2017-04-11 16:34           ` Sunil Kovvuri
2017-04-11 16:38       ` Robin Murphy
2017-04-11 16:38         ` Robin Murphy
     [not found]         ` <a971af83-10f1-5696-f0c6-0600c04705c3-5wv7dgnIgG8@public.gmane.org>
2017-04-11 16:41           ` Will Deacon
2017-04-11 16:41             ` Will Deacon
2017-04-11 14:42 ` [RFC PATCH 4/7] ACPICA: IORT: Add SMMuV3 model definitions linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 15:59   ` Robin Murphy
2017-04-11 15:59     ` Robin Murphy
2017-04-11 16:57     ` Sunil Kovvuri
2017-04-11 16:57       ` Sunil Kovvuri
2017-04-12  2:33       ` Hanjun Guo
2017-04-12  2:33         ` [Devel] " Hanjun Guo
2017-04-12  2:33         ` Hanjun Guo
2017-04-12 15:21       ` Lorenzo Pieralisi
2017-04-12 15:21         ` Lorenzo Pieralisi
2017-04-11 14:42 ` [RFC PATCH 5/7] iommu/arm-smmu-v3: For ACPI based device probing, set relevant options for different SMMUv3 implementations linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-12  8:43   ` Robert Richter
2017-04-12  8:43     ` Robert Richter
2017-04-12 10:32     ` Linu Cherian
2017-04-12 10:32       ` Linu Cherian
2017-04-11 14:42 ` [RFC PATCH 6/7] ACPI/IORT: Fixup SMMUv3 resource size for Cavium 99xx SMMUv3 model linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 14:42 ` [RFC PATCH 7/7] arm64: Documentation: Add Cavium ThunderX2 SMMUv3 erratas linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 16:30 ` [RFC PATCH 0/7] Cavium CN99xx SMMUv3 Errata workarounds Will Deacon
2017-04-11 16:30   ` Will Deacon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CA+sq2CfN0QOrcT9Nv3wkf-NwWwV4uO46UmDaObzmhs7W-407qA@mail.gmail.com \
    --to=sunil.kovvuri@gmail.com \
    --cc=Geethasowjanya.Akula@cavium.com \
    --cc=Sunil.Goutham@cavium.com \
    --cc=catalin.marinas@arm.com \
    --cc=devel@acpica.org \
    --cc=hanjun.guo@linaro.org \
    --cc=iommu@lists.linux-foundation.org \
    --cc=joro@8bytes.org \
    --cc=lenb@kernel.org \
    --cc=linu.cherian@cavium.com \
    --cc=linucherian@gmail.com \
    --cc=linux-acpi@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=lv.zheng@intel.com \
    --cc=rjw@rjwysocki.net \
    --cc=robert.moore@intel.com \
    --cc=robert.richter@cavium.com \
    --cc=robin.murphy@arm.com \
    --cc=sudeep.holla@arm.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.