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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org,
	coresight@lists.linaro.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 09/26] coresight: Convert coresight_timeout to use access abstraction
Date: Wed, 4 Nov 2020 10:42:56 +0000	[thread overview]
Message-ID: <b1323f88-d6b8-5525-4d2f-d001236f8860@arm.com> (raw)
In-Reply-To: <20201103180329.GB2855763@xps15>

On 11/3/20 6:03 PM, Mathieu Poirier wrote:
> On Wed, Oct 28, 2020 at 10:09:28PM +0000, Suzuki K Poulose wrote:
>> Convert the generic routines to use the new access abstraction layer
>> gradually, starting with coresigth_timeout.
>>
>> Cc: Mike Leach <mike.leach@linaro.org>
>> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>> ---



>> diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c
>> index 5baf29510f1b..34c74b05c542 100644
>> --- a/drivers/hwtracing/coresight/coresight-catu.c
>> +++ b/drivers/hwtracing/coresight/coresight-catu.c
>> @@ -401,8 +401,9 @@ static const struct attribute_group *catu_groups[] = {
>>   
>>   static inline int catu_wait_for_ready(struct catu_drvdata *drvdata)
>>   {
>> -	return coresight_timeout(drvdata->base,
>> -				 CATU_STATUS, CATU_STATUS_READY, 1);
>> +	struct csdev_access *csa = &drvdata->csdev->access;
>> +
>> +	return coresight_timeout(csa, CATU_STATUS, CATU_STATUS_READY, 1);
>>   }
>>   
>>   static int catu_enable_hw(struct catu_drvdata *drvdata, void *data)
>> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
>> index e96deaca8cab..42ba989a6b5e 100644
>> --- a/drivers/hwtracing/coresight/coresight-core.c
>> +++ b/drivers/hwtracing/coresight/coresight-core.c
>> @@ -1412,23 +1412,26 @@ static void coresight_remove_conns(struct coresight_device *csdev)
>>   }
>>   
>>   /**
>> - * coresight_timeout - loop until a bit has changed to a specific state.
>> - * @addr: base address of the area of interest.
>> - * @offset: address of a register, starting from @addr.
>> + * coresight_timeout - loop until a bit has changed to a specific register
>> + *			state.
>> + * @csa: coresight device access for the device
>> + * @offset: Offset of the register from the base of the device.
>>    * @position: the position of the bit of interest.
>>    * @value: the value the bit should have.
>>    *
>>    * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if
>>    * TIMEOUT_US has elapsed, which ever happens first.
>>    */
>> -
>> -int coresight_timeout(void __iomem *addr, u32 offset, int position, int value)
>> +int coresight_timeout(struct csdev_access *csa,
>> +		      u32 offset,
>> +		      int position,
>> +		      int value)
> 
> There is no need for stacking, please maximise the 80 characters.  The function
> stubs in coresight.h should also be revised.
> 
>>   {
>>   	int i;
>>   	u32 val;
>>   
>>   	for (i = TIMEOUT_US; i > 0; i--) {
>> -		val = __raw_readl(addr + offset);
>> +		val = csdev_access_read32(csa, offset);
> 
> I vaguely remember commenting on this, or perhaps it was on some othe patch you
> wrote...  Anyways, I think it is a good thing to go from an unordered access to
> an ordered access for the timeout function.

Yes, you did mention it in the v1.

> 
> With the above:
> 
> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>

Thanks, will address the comments.

Suzuki

WARNING: multiple messages have this Message-ID (diff)
From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: coresight@lists.linaro.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org
Subject: Re: [PATCH v3 09/26] coresight: Convert coresight_timeout to use access abstraction
Date: Wed, 4 Nov 2020 10:42:56 +0000	[thread overview]
Message-ID: <b1323f88-d6b8-5525-4d2f-d001236f8860@arm.com> (raw)
In-Reply-To: <20201103180329.GB2855763@xps15>

On 11/3/20 6:03 PM, Mathieu Poirier wrote:
> On Wed, Oct 28, 2020 at 10:09:28PM +0000, Suzuki K Poulose wrote:
>> Convert the generic routines to use the new access abstraction layer
>> gradually, starting with coresigth_timeout.
>>
>> Cc: Mike Leach <mike.leach@linaro.org>
>> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>> ---



>> diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c
>> index 5baf29510f1b..34c74b05c542 100644
>> --- a/drivers/hwtracing/coresight/coresight-catu.c
>> +++ b/drivers/hwtracing/coresight/coresight-catu.c
>> @@ -401,8 +401,9 @@ static const struct attribute_group *catu_groups[] = {
>>   
>>   static inline int catu_wait_for_ready(struct catu_drvdata *drvdata)
>>   {
>> -	return coresight_timeout(drvdata->base,
>> -				 CATU_STATUS, CATU_STATUS_READY, 1);
>> +	struct csdev_access *csa = &drvdata->csdev->access;
>> +
>> +	return coresight_timeout(csa, CATU_STATUS, CATU_STATUS_READY, 1);
>>   }
>>   
>>   static int catu_enable_hw(struct catu_drvdata *drvdata, void *data)
>> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
>> index e96deaca8cab..42ba989a6b5e 100644
>> --- a/drivers/hwtracing/coresight/coresight-core.c
>> +++ b/drivers/hwtracing/coresight/coresight-core.c
>> @@ -1412,23 +1412,26 @@ static void coresight_remove_conns(struct coresight_device *csdev)
>>   }
>>   
>>   /**
>> - * coresight_timeout - loop until a bit has changed to a specific state.
>> - * @addr: base address of the area of interest.
>> - * @offset: address of a register, starting from @addr.
>> + * coresight_timeout - loop until a bit has changed to a specific register
>> + *			state.
>> + * @csa: coresight device access for the device
>> + * @offset: Offset of the register from the base of the device.
>>    * @position: the position of the bit of interest.
>>    * @value: the value the bit should have.
>>    *
>>    * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if
>>    * TIMEOUT_US has elapsed, which ever happens first.
>>    */
>> -
>> -int coresight_timeout(void __iomem *addr, u32 offset, int position, int value)
>> +int coresight_timeout(struct csdev_access *csa,
>> +		      u32 offset,
>> +		      int position,
>> +		      int value)
> 
> There is no need for stacking, please maximise the 80 characters.  The function
> stubs in coresight.h should also be revised.
> 
>>   {
>>   	int i;
>>   	u32 val;
>>   
>>   	for (i = TIMEOUT_US; i > 0; i--) {
>> -		val = __raw_readl(addr + offset);
>> +		val = csdev_access_read32(csa, offset);
> 
> I vaguely remember commenting on this, or perhaps it was on some othe patch you
> wrote...  Anyways, I think it is a good thing to go from an unordered access to
> an ordered access for the timeout function.

Yes, you did mention it in the v1.

> 
> With the above:
> 
> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>

Thanks, will address the comments.

Suzuki

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  reply	other threads:[~2020-11-04 10:43 UTC|newest]

Thread overview: 154+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-28 22:09 [PATCH v3 00/26] coresight: Support for ETM system instructions Suzuki K Poulose
2020-10-28 22:09 ` Suzuki K Poulose
2020-10-28 22:09 ` Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 01/26] coresight: etm4x: Fix accesses to TRCVMIDCTLR1 Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 02/26] coresight: etm4x: Fix accesses to TRCCIDCTLR1 Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 03/26] coresight: etm4x: Update TRCIDR3.NUMPROCS handling to match v4.2 Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 04/26] coresight: etm4x: Fix accesses to TRCPROCSELR Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 05/26] coresight: etm4x: Handle TRCVIPCSSCTLR accesses Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 06/26] coresight: etm4x: Handle access to TRCSSPCICRn Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-02 21:46   ` Mathieu Poirier
2020-11-02 21:46     ` Mathieu Poirier
2020-11-02 22:04     ` Suzuki K Poulose
2020-11-02 22:04       ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 07/26] coresight: Introduce device access abstraction Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-03 17:14   ` Mathieu Poirier
2020-11-03 17:14     ` Mathieu Poirier
2020-11-03 17:25     ` Mathieu Poirier
2020-11-03 17:25       ` Mathieu Poirier
2020-11-04 10:07       ` Suzuki K Poulose
2020-11-04 10:07         ` Suzuki K Poulose
2020-11-09 21:00   ` Mathieu Poirier
2020-11-09 21:00     ` Mathieu Poirier
2020-11-10  9:24     ` Suzuki K Poulose
2020-11-10  9:24       ` Suzuki K Poulose
2020-11-10 17:02       ` Mathieu Poirier
2020-11-10 17:02         ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 08/26] coresight: tpiu: Prepare for using coresight " Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-03 18:03   ` Mathieu Poirier
2020-11-03 18:03     ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 09/26] coresight: Convert coresight_timeout to use " Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-03 18:03   ` Mathieu Poirier
2020-11-03 18:03     ` Mathieu Poirier
2020-11-04 10:42     ` Suzuki K Poulose [this message]
2020-11-04 10:42       ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 10/26] coresight: Convert claim/disclaim operations to use access wrappers Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-03 18:36   ` Mathieu Poirier
2020-11-03 18:36     ` Mathieu Poirier
2020-11-04 10:54     ` Suzuki K Poulose
2020-11-04 10:54       ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 11/26] coresight: etm4x: Always read the registers on the host CPU Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 12/26] coresight: etm4x: Convert all register accesses Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-03 18:53   ` Mathieu Poirier
2020-11-03 18:53     ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 13/26] coresight: etm4x: Add commentary on the registers Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-03 19:03   ` Mathieu Poirier
2020-11-03 19:03     ` Mathieu Poirier
2020-11-03 19:04   ` Mathieu Poirier
2020-11-03 19:04     ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 14/26] coresight: etm4x: Add sysreg access helpers Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-10-29 15:26   ` Suzuki K Poulose
2020-10-29 15:26     ` Suzuki K Poulose
2020-11-05 20:52   ` Mathieu Poirier
2020-11-05 20:52     ` Mathieu Poirier
2020-11-05 22:47     ` Suzuki K Poulose
2020-11-05 22:47       ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 15/26] coresight: etm4x: Define DEVARCH register fields Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 16/26] coresight: etm4x: Check for Software Lock Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-05 21:50   ` Mathieu Poirier
2020-11-05 21:50     ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 17/26] coresight: etm4x: Cleanup secure exception level masks Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-05 21:55   ` Mathieu Poirier
2020-11-05 21:55     ` Mathieu Poirier
2020-11-09  9:40     ` Suzuki K Poulose
2020-11-09  9:40       ` Suzuki K Poulose
2020-11-09 17:42       ` Mathieu Poirier
2020-11-09 17:42         ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 18/26] coresight: etm4x: Clean up " Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-06 18:52   ` Mathieu Poirier
2020-11-06 18:52     ` Mathieu Poirier
2020-11-09  9:44     ` Suzuki K Poulose
2020-11-09  9:44       ` Suzuki K Poulose
2020-11-10 23:15     ` Suzuki K Poulose
2020-11-10 23:15       ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 19/26] coresight: etm4x: Detect access early on the target CPU Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-06 20:34   ` Mathieu Poirier
2020-11-06 20:34     ` Mathieu Poirier
2020-11-09  9:48     ` Suzuki K Poulose
2020-11-09  9:48       ` Suzuki K Poulose
2020-11-09 17:48       ` Mathieu Poirier
2020-11-09 17:48         ` Mathieu Poirier
2020-11-06 20:46   ` Mathieu Poirier
2020-11-06 20:46     ` Mathieu Poirier
2020-11-10 10:47     ` Suzuki K Poulose
2020-11-10 10:47       ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 20/26] coresight: etm4x: Handle ETM architecture version Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-06 21:11   ` Mathieu Poirier
2020-11-06 21:11     ` Mathieu Poirier
2020-11-09  9:51     ` Suzuki K Poulose
2020-11-09  9:51       ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 21/26] coresight: etm4x: Use TRCDEVARCH for component discovery Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-06 21:42   ` Mathieu Poirier
2020-11-06 21:42     ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 22/26] coresight: etm4x: Add necessary synchronization for sysreg access Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-09 18:32   ` Mathieu Poirier
2020-11-09 18:32     ` Mathieu Poirier
2020-11-10 10:11     ` Suzuki K Poulose
2020-11-10 10:11       ` Suzuki K Poulose
2020-11-10 11:40       ` John Horley
2020-11-10 11:40         ` John Horley
2020-11-10 17:35       ` Mathieu Poirier
2020-11-10 17:35         ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 23/26] coresight: etm4x: Detect system instructions support Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-09 20:22   ` Mathieu Poirier
2020-11-09 20:22     ` Mathieu Poirier
2020-11-10  9:31     ` Suzuki K Poulose
2020-11-10  9:31       ` Suzuki K Poulose
2020-11-10 17:33       ` Mathieu Poirier
2020-11-10 17:33         ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 24/26] coresight: etm4x: Refactor probing routine Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-09 20:43   ` Mathieu Poirier
2020-11-09 20:43     ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 25/26] coresight: etm4x: Add support for sysreg only devices Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-09 20:46   ` Mathieu Poirier
2020-11-09 20:46     ` Mathieu Poirier
2020-11-10 10:50     ` Suzuki K Poulose
2020-11-10 10:50       ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 26/26] dts: bindings: coresight: ETM system register access only units Suzuki K Poulose
2020-10-28 22:09   ` Suzuki K Poulose
2020-11-02 15:31   ` Rob Herring
2020-11-02 15:31     ` Rob Herring
2020-11-09 20:50   ` Mathieu Poirier
2020-11-09 20:50     ` Mathieu Poirier
2020-11-10 10:51     ` Suzuki K Poulose
2020-11-10 10:51       ` Suzuki K Poulose
2020-10-29  7:53 ` [PATCH v3 00/26] coresight: Support for ETM system instructions Mike Leach
2020-10-29  7:53   ` Mike Leach
2020-10-29 15:45   ` Suzuki K Poulose
2020-10-29 15:45     ` Suzuki K Poulose

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