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* PCIe3 atomics requirement for amdkfd
@ 2017-12-19 15:04 Tom Stellard
       [not found] ` <c2c34443-9ba1-661b-476d-b657a7ddfe85-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
  0 siblings, 1 reply; 9+ messages in thread
From: Tom Stellard @ 2017-12-19 15:04 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Felix Kuehling

Hi,

How hard of a requirement is PCIe3 atomics for dGPUs with the amdkfd
kernel driver?  Is it possible to make modifications to the runtime/kernel
driver to drop this requirement?

-Tom
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: PCIe3 atomics requirement for amdkfd
       [not found] ` <c2c34443-9ba1-661b-476d-b657a7ddfe85-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
@ 2017-12-23 15:40   ` Felix Kühling
       [not found]     ` <3f7e6fed-8668-b469-8813-e6677cb980ca-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
  2017-12-25 14:55   ` Luke A. Guest
  1 sibling, 1 reply; 9+ messages in thread
From: Felix Kühling @ 2017-12-23 15:40 UTC (permalink / raw)
  To: tstellar-H+wXaHxf7aLQT0dZR+AlfA,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
  Cc: Felix Kuehling


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As I understand it, it would require changes in the ROCr Runtime and in
the firmware (MEC microcode). It also changes the programming model, so
it may affect certain applications or higher level language runtimes
that rely on atomic operations.

Regards,
  Felix


Am 19.12.2017 um 16:04 schrieb Tom Stellard:
> Hi,
>
> How hard of a requirement is PCIe3 atomics for dGPUs with the amdkfd
> kernel driver?  Is it possible to make modifications to the runtime/kernel
> driver to drop this requirement?
>
> -Tom
> _______________________________________________
> amd-gfx mailing list
> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx



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_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: PCIe3 atomics requirement for amdkfd
       [not found]     ` <3f7e6fed-8668-b469-8813-e6677cb980ca-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2017-12-23 16:26       ` Alexander Kjeldaas
       [not found]         ` <CAHVSqQe1Tj+PnCR1h+HiHC=fXC81sUG4MXC7jWwmY+TomuU=9w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  2018-01-03 14:56       ` Tom Stellard
  1 sibling, 1 reply; 9+ messages in thread
From: Alexander Kjeldaas @ 2017-12-23 16:26 UTC (permalink / raw)
  To: Felix Kühling
  Cc: Felix Kuehling, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
	tstellar-H+wXaHxf7aLQT0dZR+AlfA


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 Can the atomic ops work on the modified risers used for mining?

On Dec 23, 2017 16:41, "Felix Kühling" <felix.kuehling-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:

> As I understand it, it would require changes in the ROCr Runtime and in
> the firmware (MEC microcode). It also changes the programming model, so
> it may affect certain applications or higher level language runtimes
> that rely on atomic operations.
>
> Regards,
>   Felix
>
>
> Am 19.12.2017 um 16:04 schrieb Tom Stellard:
> > Hi,
> >
> > How hard of a requirement is PCIe3 atomics for dGPUs with the amdkfd
> > kernel driver?  Is it possible to make modifications to the
> runtime/kernel
> > driver to drop this requirement?
> >
> > -Tom
> > _______________________________________________
> > amd-gfx mailing list
> > amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
>
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
>

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_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: PCIe3 atomics requirement for amdkfd
       [not found]         ` <CAHVSqQe1Tj+PnCR1h+HiHC=fXC81sUG4MXC7jWwmY+TomuU=9w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-12-24 10:07           ` Felix Kühling
  0 siblings, 0 replies; 9+ messages in thread
From: Felix Kühling @ 2017-12-24 10:07 UTC (permalink / raw)
  To: Alexander Kjeldaas
  Cc: Felix Kuehling, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
	tstellar-H+wXaHxf7aLQT0dZR+AlfA


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Am 23.12.2017 um 17:26 schrieb Alexander Kjeldaas:
>  Can the atomic ops work on the modified risers used for mining?

If the PCI bridge on the riser supports PCIe 3 atomic routing, then yes.

Regards,
  Felix

>
> On Dec 23, 2017 16:41, "Felix Kühling" <felix.kuehling-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> <mailto:felix.kuehling-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>> wrote:
>
>     As I understand it, it would require changes in the ROCr Runtime
>     and in
>     the firmware (MEC microcode). It also changes the programming
>     model, so
>     it may affect certain applications or higher level language runtimes
>     that rely on atomic operations.
>
>     Regards,
>       Felix
>
>
>     Am 19.12.2017 um 16:04 schrieb Tom Stellard:
>     > Hi,
>     >
>     > How hard of a requirement is PCIe3 atomics for dGPUs with the amdkfd
>     > kernel driver?  Is it possible to make modifications to the
>     runtime/kernel
>     > driver to drop this requirement?
>     >
>     > -Tom
>     > _______________________________________________
>     > amd-gfx mailing list
>     > amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org <mailto:amd-gfx-PD4FTy7X32lNgt0PjOBp93rCq3LdnpKM@public.gmane.orgrg>
>     > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>     <https://lists.freedesktop.org/mailman/listinfo/amd-gfx>
>
>
>
>     _______________________________________________
>     amd-gfx mailing list
>     amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org <mailto:amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
>     https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>     <https://lists.freedesktop.org/mailman/listinfo/amd-gfx>
>



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_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: PCIe3 atomics requirement for amdkfd
       [not found] ` <c2c34443-9ba1-661b-476d-b657a7ddfe85-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
  2017-12-23 15:40   ` Felix Kühling
@ 2017-12-25 14:55   ` Luke A. Guest
       [not found]     ` <5a4b1672-4595-7e7f-0d76-9c721b61e98e-z/KZkw/0wg5BDgjK7y7TUQ@public.gmane.org>
  1 sibling, 1 reply; 9+ messages in thread
From: Luke A. Guest @ 2017-12-25 14:55 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Hi,

I have to agree here. At least there should be a non-PCIe-3.0 pathway
which implements them on the CPU, I mean, they're fairly simple atomics,
CAS, SWAP, FetchAdd.

What AMD have actually done is royally screwed over anyone with an FX
chipset, i.e. no OpenCL - the open source AMD one requires ROCm, they
abandoned Clover, maybe PoCL will work? Who knows.


On 19/12/17 15:04, Tom Stellard wrote:
> Hi,
>
> How hard of a requirement is PCIe3 atomics for dGPUs with the amdkfd
> kernel driver?  Is it possible to make modifications to the runtime/kernel
> driver to drop this requirement?
>
> -Tom
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* RE: PCIe3 atomics requirement for amdkfd
       [not found]     ` <5a4b1672-4595-7e7f-0d76-9c721b61e98e-z/KZkw/0wg5BDgjK7y7TUQ@public.gmane.org>
@ 2017-12-25 16:44       ` Bridgman, John
  0 siblings, 0 replies; 9+ messages in thread
From: Bridgman, John @ 2017-12-25 16:44 UTC (permalink / raw)
  To: Luke A. Guest, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Let's separate out OpenCL from HCC/HIP and the rest of the ROCm stack. 

We are working on a solution to deliver OpenCL without requiring atomics, but not the rest of the ROCm stack.

>-----Original Message-----
>From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf Of
>Luke A. Guest
>Sent: Monday, December 25, 2017 9:55 AM
>To: amd-gfx@lists.freedesktop.org
>Subject: Re: PCIe3 atomics requirement for amdkfd
>
>Hi,
>
>I have to agree here. At least there should be a non-PCIe-3.0 pathway which
>implements them on the CPU, I mean, they're fairly simple atomics, CAS,
>SWAP, FetchAdd.
>
>What AMD have actually done is royally screwed over anyone with an FX
>chipset, i.e. no OpenCL - the open source AMD one requires ROCm, they
>abandoned Clover, maybe PoCL will work? Who knows.
>
>
>On 19/12/17 15:04, Tom Stellard wrote:
>> Hi,
>>
>> How hard of a requirement is PCIe3 atomics for dGPUs with the amdkfd
>> kernel driver?  Is it possible to make modifications to the
>> runtime/kernel driver to drop this requirement?
>>
>> -Tom
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
>_______________________________________________
>amd-gfx mailing list
>amd-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: PCIe3 atomics requirement for amdkfd
       [not found]     ` <3f7e6fed-8668-b469-8813-e6677cb980ca-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
  2017-12-23 16:26       ` Alexander Kjeldaas
@ 2018-01-03 14:56       ` Tom Stellard
       [not found]         ` <a5d6072b-6fea-f161-3773-50f58766ed45-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
  1 sibling, 1 reply; 9+ messages in thread
From: Tom Stellard @ 2018-01-03 14:56 UTC (permalink / raw)
  To: Felix Kühling, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
  Cc: Felix Kuehling

On 12/23/2017 07:40 AM, Felix Kühling wrote:
> As I understand it, it would require changes in the ROCr Runtime and in
> the firmware (MEC microcode). It also changes the programming model, so
> it may affect certain applications or higher level language runtimes
> that rely on atomic operations.
> 

How does the MEC microcode know that it is running a ROCm workload as opposed
to a graphics workload that doesn't require PCIe3 atomics.  Is there a specific
configuration bit that is set to indicate the ROCm programming model is needed?

-Tom

> Regards,
>   Felix
> 
> 
> Am 19.12.2017 um 16:04 schrieb Tom Stellard:
>> Hi,
>>
>> How hard of a requirement is PCIe3 atomics for dGPUs with the amdkfd
>> kernel driver?  Is it possible to make modifications to the runtime/kernel
>> driver to drop this requirement?
>>
>> -Tom
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> 
> 

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* RE: PCIe3 atomics requirement for amdkfd
       [not found]         ` <a5d6072b-6fea-f161-3773-50f58766ed45-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
@ 2018-01-03 16:23           ` Liu, Shaoyun
       [not found]             ` <DM5PR12MB1179B2F3C378819556589747F41E0-2J9CzHegvk8p/eksZXEfgQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
  0 siblings, 1 reply; 9+ messages in thread
From: Liu, Shaoyun @ 2018-01-03 16:23 UTC (permalink / raw)
  To: tstellar-H+wXaHxf7aLQT0dZR+AlfA, Felix Kühling,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
  Cc: Kuehling, Felix

I think currently atomic  Ops are only used in AQL package which is only available for ROCm , graphics workload will not use AQL package. 

Regards
Shaoyun.liu

-----Original Message-----
From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf Of Tom Stellard
Sent: Wednesday, January 03, 2018 9:57 AM
To: Felix Kühling; amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix
Subject: Re: PCIe3 atomics requirement for amdkfd

On 12/23/2017 07:40 AM, Felix Kühling wrote:
> As I understand it, it would require changes in the ROCr Runtime and 
> in the firmware (MEC microcode). It also changes the programming 
> model, so it may affect certain applications or higher level language 
> runtimes that rely on atomic operations.
> 

How does the MEC microcode know that it is running a ROCm workload as opposed to a graphics workload that doesn't require PCIe3 atomics.  Is there a specific configuration bit that is set to indicate the ROCm programming model is needed?

-Tom

> Regards,
>   Felix
> 
> 
> Am 19.12.2017 um 16:04 schrieb Tom Stellard:
>> Hi,
>>
>> How hard of a requirement is PCIe3 atomics for dGPUs with the amdkfd 
>> kernel driver?  Is it possible to make modifications to the 
>> runtime/kernel driver to drop this requirement?
>>
>> -Tom
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> 
> 

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* RE: PCIe3 atomics requirement for amdkfd
       [not found]             ` <DM5PR12MB1179B2F3C378819556589747F41E0-2J9CzHegvk8p/eksZXEfgQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2018-01-03 16:40               ` Bridgman, John
  0 siblings, 0 replies; 9+ messages in thread
From: Bridgman, John @ 2018-01-03 16:40 UTC (permalink / raw)
  To: Liu, Shaoyun, tstellar-H+wXaHxf7aLQT0dZR+AlfA,
	Felix Kühling, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
  Cc: Kuehling, Felix

Agreed - MEC microcode uses atomics when the queue type is set to AQL (rather than PM4).

>-----Original Message-----
>From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf Of
>Liu, Shaoyun
>Sent: Wednesday, January 03, 2018 11:24 AM
>To: tstellar@redhat.com; Felix Kühling; amd-gfx@lists.freedesktop.org
>Cc: Kuehling, Felix
>Subject: RE: PCIe3 atomics requirement for amdkfd
>
>I think currently atomic  Ops are only used in AQL package which is only
>available for ROCm , graphics workload will not use AQL package.
>
>Regards
>Shaoyun.liu
>
>-----Original Message-----
>From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf Of
>Tom Stellard
>Sent: Wednesday, January 03, 2018 9:57 AM
>To: Felix Kühling; amd-gfx@lists.freedesktop.org
>Cc: Kuehling, Felix
>Subject: Re: PCIe3 atomics requirement for amdkfd
>
>On 12/23/2017 07:40 AM, Felix Kühling wrote:
>> As I understand it, it would require changes in the ROCr Runtime and
>> in the firmware (MEC microcode). It also changes the programming
>> model, so it may affect certain applications or higher level language
>> runtimes that rely on atomic operations.
>>
>
>How does the MEC microcode know that it is running a ROCm workload as
>opposed to a graphics workload that doesn't require PCIe3 atomics.  Is there a
>specific configuration bit that is set to indicate the ROCm programming model
>is needed?
>
>-Tom
>
>> Regards,
>>   Felix
>>
>>
>> Am 19.12.2017 um 16:04 schrieb Tom Stellard:
>>> Hi,
>>>
>>> How hard of a requirement is PCIe3 atomics for dGPUs with the amdkfd
>>> kernel driver?  Is it possible to make modifications to the
>>> runtime/kernel driver to drop this requirement?
>>>
>>> -Tom
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>>
>>
>
>_______________________________________________
>amd-gfx mailing list
>amd-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>_______________________________________________
>amd-gfx mailing list
>amd-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2018-01-03 16:40 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-12-19 15:04 PCIe3 atomics requirement for amdkfd Tom Stellard
     [not found] ` <c2c34443-9ba1-661b-476d-b657a7ddfe85-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2017-12-23 15:40   ` Felix Kühling
     [not found]     ` <3f7e6fed-8668-b469-8813-e6677cb980ca-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-12-23 16:26       ` Alexander Kjeldaas
     [not found]         ` <CAHVSqQe1Tj+PnCR1h+HiHC=fXC81sUG4MXC7jWwmY+TomuU=9w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-12-24 10:07           ` Felix Kühling
2018-01-03 14:56       ` Tom Stellard
     [not found]         ` <a5d6072b-6fea-f161-3773-50f58766ed45-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2018-01-03 16:23           ` Liu, Shaoyun
     [not found]             ` <DM5PR12MB1179B2F3C378819556589747F41E0-2J9CzHegvk8p/eksZXEfgQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-01-03 16:40               ` Bridgman, John
2017-12-25 14:55   ` Luke A. Guest
     [not found]     ` <5a4b1672-4595-7e7f-0d76-9c721b61e98e-z/KZkw/0wg5BDgjK7y7TUQ@public.gmane.org>
2017-12-25 16:44       ` Bridgman, John

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