* [PATCH 01/21] ti: tools: config: Add board config class to generate config binaries
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 19:46 ` Simon Glass
2023-01-20 10:18 ` [PATCH 02/21] tools: sysfw: Add script for generating configuration blobs Neha Malcom Francis
` (20 subsequent siblings)
21 siblings, 1 reply; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
For validating config files and generating binary config artifacts, here
board specific config class is added.
Add function cfgBinaryGen() in tibcfg_gen.py. It uses TIBoardConfig
class to load given schema and config files in YAML, validate them and
generate binaries.
Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
test/py/requirements.txt | 1 +
tools/tibcfg_gen.py | 117 +++++++++++++++++++++++++++++++++++++++
2 files changed, 118 insertions(+)
create mode 100644 tools/tibcfg_gen.py
diff --git a/test/py/requirements.txt b/test/py/requirements.txt
index fae8b59caf..e4951cce21 100644
--- a/test/py/requirements.txt
+++ b/test/py/requirements.txt
@@ -5,6 +5,7 @@ extras==1.0.0
filelock==3.0.12
fixtures==3.0.0
importlib-metadata==0.23
+jsonschema==4.0.0
linecache2==1.0.0
more-itertools==7.2.0
packaging==19.2
diff --git a/tools/tibcfg_gen.py b/tools/tibcfg_gen.py
new file mode 100644
index 0000000000..79a94efbb0
--- /dev/null
+++ b/tools/tibcfg_gen.py
@@ -0,0 +1,117 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# TI Board Configuration Class for Schema Validation and Binary Generation
+#
+
+import os
+import getopt
+import sys
+
+import yaml
+
+from jsonschema import validate
+
+
+class TIBoardConfig:
+
+ """ Texas Instruments Board Configuration File"""
+
+ def __init__(self, file, schema, data_rules=""):
+ """Load a YAML configuration file and YAML schema
+
+ Validation of the config file against the schema is also done."""
+ with open(file, 'r') as f:
+ self.file_yaml = yaml.safe_load(f)
+ with open(schema, 'r') as sch:
+ self.schema_yaml = yaml.safe_load(sch)
+ self.data_rules = data_rules
+ try:
+ validate(self.file_yaml, self.schema_yaml)
+ except Exception as e:
+ print(e)
+
+ def _convert_to_byte_chunk(self, val, data_type):
+ """Convert value into byte array"""
+ size = 0
+ if(data_type == "#/definitions/u8"):
+ size = 1
+ elif(data_type == "#/definitions/u16"):
+ size = 2
+ elif(data_type == "#/definitions/u32"):
+ size = 4
+ else:
+ raise Exception("Data type not present in definitions")
+ if type(val) == int:
+ br = val.to_bytes(size, byteorder="little")
+ return br
+
+ def _compile_yaml(self, schema_yaml, file_yaml):
+ """Convert YAML file into byte array based on YAML schema"""
+ br = bytearray()
+ for key in file_yaml.keys():
+ node = file_yaml[key]
+ node_schema = schema_yaml['properties'][key]
+ node_type = node_schema.get('type')
+ if not 'type' in node_schema:
+ br += self._convert_to_byte_chunk(node,
+ node_schema.get('$ref'))
+ elif node_type == 'object':
+ br += self._compile_yaml(node_schema, node)
+ elif node_type == 'array':
+ for item in node:
+ if not isinstance(item, dict):
+ br += self._convert_to_byte_chunk(
+ item, schema_yaml['properties'][key]['items']["$ref"])
+ else:
+ br += self._compile_yaml(node_schema.get('items'), item)
+ return br
+
+ def generate_binaries(self, out_path=""):
+ """Generate config binary artifacts from the loaded YAML configuration file"""
+ if not os.path.isdir(out_path):
+ os.mkdir(out_path)
+ for key in self.file_yaml.keys():
+ node = self.file_yaml[key]
+ node_schema = self.schema_yaml['properties'][key]
+ br = self._compile_yaml(node_schema, node)
+ path = os.path.join(out_path, key + ".bin")
+ with open(path, 'wb') as cfg:
+ cfg.write(br)
+
+ def delete_binaries(self, out_path=""):
+ """Delete generated binaries"""
+ if os.path.isdir(out_path):
+ for key in self.file_yaml.keys():
+ path = os.path.join(out_path, key + ".bin")
+ if os.path.isfile(path):
+ os.remove(path)
+
+
+def cfgBinaryGen():
+ """Generate config binaries from YAML config file and YAML schema
+ Arguments:
+ - config_yaml: board config file in YAML
+ - schema_yaml: schema file in YAML to validate config_yaml against
+ - output_dir: output directory where generated binaries can be populated
+ Pass the arguments along with the filename in the Makefile.
+ """
+ opts, args = getopt.getopt(sys.argv[1:], "c:s:o")
+ output_dir = None
+ for opt, val in opts:
+ if opt == "-c":
+ config_yaml = val
+ elif opt == "-s":
+ schema_yaml = val
+ elif opt == "-o":
+ output_dir = os.path.abspath(val)
+ if output_dir is None:
+ output_dir = os.getcwd()
+ try:
+ tibcfg = TIBoardConfig(config_yaml, schema_yaml)
+ tibcfg.generate_binaries(output_dir)
+ except:
+ raise ValueError("Could not find config files!")
+
+
+cfgBinaryGen()
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH 01/21] ti: tools: config: Add board config class to generate config binaries
2023-01-20 10:18 ` [PATCH 01/21] ti: tools: config: Add board config class to generate config binaries Neha Malcom Francis
@ 2023-01-20 19:46 ` Simon Glass
0 siblings, 0 replies; 31+ messages in thread
From: Simon Glass @ 2023-01-20 19:46 UTC (permalink / raw)
To: Neha Malcom Francis
Cc: u-boot, trini, afd, vigneshr, rogerq, alpernebiyasak, nm, bb
Hi Neha,
On Fri, 20 Jan 2023 at 03:19, Neha Malcom Francis <n-francis@ti.com> wrote:
>
> For validating config files and generating binary config artifacts, here
> board specific config class is added.
>
> Add function cfgBinaryGen() in tibcfg_gen.py. It uses TIBoardConfig
> class to load given schema and config files in YAML, validate them and
> generate binaries.
>
> Signed-off-by: Tarun Sahu <t-sahu@ti.com>
> [n-francis@ti.com: prepared patch for upstreaming]
> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> ---
> test/py/requirements.txt | 1 +
> tools/tibcfg_gen.py | 117 +++++++++++++++++++++++++++++++++++++++
> 2 files changed, 118 insertions(+)
> create mode 100644 tools/tibcfg_gen.py
Please don't add new build scripts to U-Boot. This should go into binman.
Regards,
Simon
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 02/21] tools: sysfw: Add script for generating configuration blobs
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 01/21] ti: tools: config: Add board config class to generate config binaries Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-23 14:19 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 03/21] tools: binman: add ti-secure entry type Neha Malcom Francis
` (19 subsequent siblings)
21 siblings, 1 reply; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Certain devices in the K3 architecture such as AM64x require board
configuration binaries packed along with their descriptions into a
sysfw_data binary. The final binary is required to be packed into the
final system firmware images.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
tools/k3_sysfw_boardcfg_blob_creator.py | 116 ++++++++++++++++++++++++
1 file changed, 116 insertions(+)
create mode 100755 tools/k3_sysfw_boardcfg_blob_creator.py
diff --git a/tools/k3_sysfw_boardcfg_blob_creator.py b/tools/k3_sysfw_boardcfg_blob_creator.py
new file mode 100755
index 0000000000..da99808521
--- /dev/null
+++ b/tools/k3_sysfw_boardcfg_blob_creator.py
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# TI Script for Board Configuration Packaging
+#
+
+import argparse
+import logging
+import os
+import struct
+import tempfile
+from shutil import copyfileobj
+from shutil import rmtree
+
+BOARDCFG = 0xB
+BOARDCFG_SEC = 0xD
+BOARDCFG_PM = 0xE
+BOARDCFG_RM = 0xC
+BOARDCFG_NUM_ELEMS = 4
+
+class BoardCfgDesc():
+ """Get board config descriptor for a given file """
+
+ fmt = '<HHHBB'
+ index = 0
+ offset = 0
+
+ def __init__(self, outfile, devgrp,
+ sw_rev = 0,
+ num_elems = BOARDCFG_NUM_ELEMS):
+ self.devgrp = devgrp
+ try:
+ self.fh = open(outfile, 'wb')
+ bytes = self.fh.write(struct.pack('<BB', num_elems, sw_rev))
+ self.offset += bytes
+ self.offset += num_elems * struct.calcsize(self.fmt)
+ self.tmpdir = tempfile.mkdtemp()
+ descfile = os.path.join(self.tmpdir, "desc")
+ bcfgfile = os.path.join(self.tmpdir, "bcfg")
+ self.desc_fh = open(descfile, "wb+")
+ self.bcfg_fh = open(bcfgfile, "wb+")
+ except:
+ raise Exception("File Error")
+
+ def add_boardcfg(self, bcfgtype, bcfgfile):
+ with open(bcfgfile, 'rb') as bfh:
+ bcfg = bfh.read()
+ size = len(bcfg)
+ desc = struct.pack(self.fmt, bcfgtype, self.offset, size, self.devgrp, 0)
+ self.desc_fh.write(desc)
+ self.bcfg_fh.write(bcfg)
+ logging.debug("Packing boardcfg data of size [%d bytes] from file %s", size, bcfgfile)
+ self.offset += size
+ self.index += 1
+
+ def finalize(self):
+ try:
+ self.desc_fh.seek(0)
+ self.bcfg_fh.seek(0)
+ copyfileobj(self.desc_fh, self.fh)
+ copyfileobj(self.bcfg_fh, self.fh)
+ except:
+ logging.error("**** Error in finalizing boardcfg file ****")
+ raise Exception("File Error")
+ finally:
+ self.fh.close()
+ self.desc_fh.close()
+ self.bcfg_fh.close()
+ rmtree(self.tmpdir)
+
+def create_sysfw_blob(args):
+ """Create a SYSFW data blob to be used as a component in combined image """
+
+ logging.info("#### Creating SYSFW data blob - %s ####", args.output_file.name)
+ logging.info("#### SW Rev = %d", args.sw_rev)
+ logging.info("#### Device Group = %d", args.devgrp)
+
+ cnt = 0
+ if args.boardcfg is not None: cnt = cnt + 1
+ if args.boardcfg_sec is not None: cnt = cnt + 1
+ if args.boardcfg_pm is not None: cnt = cnt + 1
+ if args.boardcfg_rm is not None: cnt = cnt + 1
+
+ blob = BoardCfgDesc(args.output_file.name, args.devgrp, args.sw_rev, cnt)
+ if args.boardcfg is not None:
+ logging.info("#### Board config binary - %s", args.boardcfg.name)
+ blob.add_boardcfg(BOARDCFG, args.boardcfg.name)
+ if args.boardcfg_sec is not None:
+ logging.info("#### Board config security binary - %s", args.boardcfg_sec.name)
+ blob.add_boardcfg(BOARDCFG_SEC, args.boardcfg_sec.name)
+ if args.boardcfg_pm is not None:
+ logging.info("#### Board config PM binary - %s", args.boardcfg_pm.name)
+ blob.add_boardcfg(BOARDCFG_PM, args.boardcfg_pm.name)
+ if args.boardcfg_rm is not None:
+ logging.info("#### Board config RM binary - %s", args.boardcfg_rm.name)
+ blob.add_boardcfg(BOARDCFG_RM, args.boardcfg_rm.name)
+
+ blob.finalize()
+
+# options -> device, sw_rev, boardcfg, security boardcfg, pm boardcfg, rm boardcfg, output file
+
+# parser for mandatory arguments
+pp = argparse.ArgumentParser(add_help=False)
+pp.add_argument('-l', '--log-level', type=str, default="INFO", choices=["INFO", "DEBUG"])
+pp.add_argument('--sw-rev', type=int, default=1)
+pp.add_argument('-o', '--output-file', type=argparse.FileType('wb'), default="./sysfw-data.bin")
+pp.add_argument('-d', '--devgrp', type=int, default=0)
+pp.add_argument('-b', '--boardcfg', type=argparse.FileType('rb'))
+pp.add_argument('-s', '--boardcfg-sec', type=argparse.FileType('rb'))
+pp.add_argument('-p', '--boardcfg-pm', type=argparse.FileType('rb'))
+pp.add_argument('-r', '--boardcfg-rm', type=argparse.FileType('rb'))
+
+args = pp.parse_args()
+logging.getLogger().setLevel(args.log_level)
+logging.debug(args)
+create_sysfw_blob(args)
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH 02/21] tools: sysfw: Add script for generating configuration blobs
2023-01-20 10:18 ` [PATCH 02/21] tools: sysfw: Add script for generating configuration blobs Neha Malcom Francis
@ 2023-01-23 14:19 ` Neha Malcom Francis
2023-01-23 18:42 ` Simon Glass
0 siblings, 1 reply; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-23 14:19 UTC (permalink / raw)
To: Simon Glass; +Cc: alpernebiyasak, nm, bb, u-boot, trini, afd, vigneshr, rogerq
Hi Simon,
On 20/01/23 15:48, Neha Malcom Francis wrote:
> Certain devices in the K3 architecture such as AM64x require board
> configuration binaries packed along with their descriptions into a
> sysfw_data binary. The final binary is required to be packed into the
> final system firmware images.
>
> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> ---
> tools/k3_sysfw_boardcfg_blob_creator.py | 116 ++++++++++++++++++++++++
> 1 file changed, 116 insertions(+)
> create mode 100755 tools/k3_sysfw_boardcfg_blob_creator.py
>
> diff --git a/tools/k3_sysfw_boardcfg_blob_creator.py b/tools/k3_sysfw_boardcfg_blob_creator.py
> new file mode 100755
> index 0000000000..da99808521
> --- /dev/null
> +++ b/tools/k3_sysfw_boardcfg_blob_creator.py
> @@ -0,0 +1,116 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> +#
> +# TI Script for Board Configuration Packaging
> +#
> +
> +import argparse
> +import logging
> +import os
> +import struct
> +import tempfile
> +from shutil import copyfileobj
> +from shutil import rmtree
> +
> +BOARDCFG = 0xB
> +BOARDCFG_SEC = 0xD
> +BOARDCFG_PM = 0xE
> +BOARDCFG_RM = 0xC
> +BOARDCFG_NUM_ELEMS = 4
> +
> +class BoardCfgDesc():
> + """Get board config descriptor for a given file """
> +
> + fmt = '<HHHBB'
> + index = 0
> + offset = 0
> +
> + def __init__(self, outfile, devgrp,
> + sw_rev = 0,
> + num_elems = BOARDCFG_NUM_ELEMS):
> + self.devgrp = devgrp
> + try:
> + self.fh = open(outfile, 'wb')
> + bytes = self.fh.write(struct.pack('<BB', num_elems, sw_rev))
> + self.offset += bytes
> + self.offset += num_elems * struct.calcsize(self.fmt)
> + self.tmpdir = tempfile.mkdtemp()
> + descfile = os.path.join(self.tmpdir, "desc")
> + bcfgfile = os.path.join(self.tmpdir, "bcfg")
> + self.desc_fh = open(descfile, "wb+")
> + self.bcfg_fh = open(bcfgfile, "wb+")
> + except:
> + raise Exception("File Error")
> +
> + def add_boardcfg(self, bcfgtype, bcfgfile):
> + with open(bcfgfile, 'rb') as bfh:
> + bcfg = bfh.read()
> + size = len(bcfg)
> + desc = struct.pack(self.fmt, bcfgtype, self.offset, size, self.devgrp, 0)
> + self.desc_fh.write(desc)
> + self.bcfg_fh.write(bcfg)
> + logging.debug("Packing boardcfg data of size [%d bytes] from file %s", size, bcfgfile)
> + self.offset += size
> + self.index += 1
> +
> + def finalize(self):
> + try:
> + self.desc_fh.seek(0)
> + self.bcfg_fh.seek(0)
> + copyfileobj(self.desc_fh, self.fh)
> + copyfileobj(self.bcfg_fh, self.fh)
> + except:
> + logging.error("**** Error in finalizing boardcfg file ****")
> + raise Exception("File Error")
> + finally:
> + self.fh.close()
> + self.desc_fh.close()
> + self.bcfg_fh.close()
> + rmtree(self.tmpdir)
> +
> +def create_sysfw_blob(args):
> + """Create a SYSFW data blob to be used as a component in combined image """
> +
> + logging.info("#### Creating SYSFW data blob - %s ####", args.output_file.name)
> + logging.info("#### SW Rev = %d", args.sw_rev)
> + logging.info("#### Device Group = %d", args.devgrp)
> +
> + cnt = 0
> + if args.boardcfg is not None: cnt = cnt + 1
> + if args.boardcfg_sec is not None: cnt = cnt + 1
> + if args.boardcfg_pm is not None: cnt = cnt + 1
> + if args.boardcfg_rm is not None: cnt = cnt + 1
> +
> + blob = BoardCfgDesc(args.output_file.name, args.devgrp, args.sw_rev, cnt)
> + if args.boardcfg is not None:
> + logging.info("#### Board config binary - %s", args.boardcfg.name)
> + blob.add_boardcfg(BOARDCFG, args.boardcfg.name)
> + if args.boardcfg_sec is not None:
> + logging.info("#### Board config security binary - %s", args.boardcfg_sec.name)
> + blob.add_boardcfg(BOARDCFG_SEC, args.boardcfg_sec.name)
> + if args.boardcfg_pm is not None:
> + logging.info("#### Board config PM binary - %s", args.boardcfg_pm.name)
> + blob.add_boardcfg(BOARDCFG_PM, args.boardcfg_pm.name)
> + if args.boardcfg_rm is not None:
> + logging.info("#### Board config RM binary - %s", args.boardcfg_rm.name)
> + blob.add_boardcfg(BOARDCFG_RM, args.boardcfg_rm.name)
> +
> + blob.finalize()
> +
> +# options -> device, sw_rev, boardcfg, security boardcfg, pm boardcfg, rm boardcfg, output file
> +
> +# parser for mandatory arguments
> +pp = argparse.ArgumentParser(add_help=False)
> +pp.add_argument('-l', '--log-level', type=str, default="INFO", choices=["INFO", "DEBUG"])
> +pp.add_argument('--sw-rev', type=int, default=1)
> +pp.add_argument('-o', '--output-file', type=argparse.FileType('wb'), default="./sysfw-data.bin")
> +pp.add_argument('-d', '--devgrp', type=int, default=0)
> +pp.add_argument('-b', '--boardcfg', type=argparse.FileType('rb'))
> +pp.add_argument('-s', '--boardcfg-sec', type=argparse.FileType('rb'))
> +pp.add_argument('-p', '--boardcfg-pm', type=argparse.FileType('rb'))
> +pp.add_argument('-r', '--boardcfg-rm', type=argparse.FileType('rb'))
> +
> +args = pp.parse_args()
> +logging.getLogger().setLevel(args.log_level)
> +logging.debug(args)
> +create_sysfw_blob(args)
Working on your reviews, I'm trying to get rid of all external scripts
and putting them into btools/etypes which seems fit.
* ti_secure_path can be nicely put into a btool
* ti_boardcfg can also be an etype that outputs <type>-cfg.bins
But... I am not sure about this script above
k3_sysfw_boardcfg_blob_creator.py. This script essentially does a more
detailed packing of the <type>-cfg.bins that have been generated by
binman. Since binman doesn't account for dependencies as of now; I am
not sure how to go about it. Any pointers?
I could have something like
combined-sysfw-cfg.bin {
sysfw-boardcfg {
ti-boardcfg {
config = "board-cfg.yaml";
schema = "schema.yaml";
}
ti-boardcfg {
config = "sec-cfg.yaml";
...
But is there any way to not have to implement this entry within entry
coupled with packaging, which I think might get a little messy?
--
Thanking You
Neha Malcom Francis
^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH 02/21] tools: sysfw: Add script for generating configuration blobs
2023-01-23 14:19 ` Neha Malcom Francis
@ 2023-01-23 18:42 ` Simon Glass
2023-01-24 10:04 ` Neha Malcom Francis
0 siblings, 1 reply; 31+ messages in thread
From: Simon Glass @ 2023-01-23 18:42 UTC (permalink / raw)
To: Neha Malcom Francis
Cc: alpernebiyasak, nm, bb, u-boot, trini, afd, vigneshr, rogerq
Hi Neha,
On Mon, 23 Jan 2023 at 07:19, Neha Malcom Francis <n-francis@ti.com> wrote:
>
> Hi Simon,
>
> On 20/01/23 15:48, Neha Malcom Francis wrote:
> > Certain devices in the K3 architecture such as AM64x require board
> > configuration binaries packed along with their descriptions into a
> > sysfw_data binary. The final binary is required to be packed into the
> > final system firmware images.
> >
> > Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> > ---
> > tools/k3_sysfw_boardcfg_blob_creator.py | 116 ++++++++++++++++++++++++
> > 1 file changed, 116 insertions(+)
> > create mode 100755 tools/k3_sysfw_boardcfg_blob_creator.py
> >
> > diff --git a/tools/k3_sysfw_boardcfg_blob_creator.py b/tools/k3_sysfw_boardcfg_blob_creator.py
> > new file mode 100755
> > index 0000000000..da99808521
> > --- /dev/null
> > +++ b/tools/k3_sysfw_boardcfg_blob_creator.py
> > @@ -0,0 +1,116 @@
> > +# SPDX-License-Identifier: GPL-2.0+
> > +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> > +#
> > +# TI Script for Board Configuration Packaging
> > +#
> > +
> > +import argparse
> > +import logging
> > +import os
> > +import struct
> > +import tempfile
> > +from shutil import copyfileobj
> > +from shutil import rmtree
> > +
> > +BOARDCFG = 0xB
> > +BOARDCFG_SEC = 0xD
> > +BOARDCFG_PM = 0xE
> > +BOARDCFG_RM = 0xC
> > +BOARDCFG_NUM_ELEMS = 4
> > +
> > +class BoardCfgDesc():
> > + """Get board config descriptor for a given file """
> > +
> > + fmt = '<HHHBB'
> > + index = 0
> > + offset = 0
> > +
> > + def __init__(self, outfile, devgrp,
> > + sw_rev = 0,
> > + num_elems = BOARDCFG_NUM_ELEMS):
> > + self.devgrp = devgrp
> > + try:
> > + self.fh = open(outfile, 'wb')
> > + bytes = self.fh.write(struct.pack('<BB', num_elems, sw_rev))
> > + self.offset += bytes
> > + self.offset += num_elems * struct.calcsize(self.fmt)
> > + self.tmpdir = tempfile.mkdtemp()
> > + descfile = os.path.join(self.tmpdir, "desc")
> > + bcfgfile = os.path.join(self.tmpdir, "bcfg")
> > + self.desc_fh = open(descfile, "wb+")
> > + self.bcfg_fh = open(bcfgfile, "wb+")
> > + except:
> > + raise Exception("File Error")
> > +
> > + def add_boardcfg(self, bcfgtype, bcfgfile):
> > + with open(bcfgfile, 'rb') as bfh:
> > + bcfg = bfh.read()
> > + size = len(bcfg)
> > + desc = struct.pack(self.fmt, bcfgtype, self.offset, size, self.devgrp, 0)
> > + self.desc_fh.write(desc)
> > + self.bcfg_fh.write(bcfg)
> > + logging.debug("Packing boardcfg data of size [%d bytes] from file %s", size, bcfgfile)
> > + self.offset += size
> > + self.index += 1
> > +
> > + def finalize(self):
> > + try:
> > + self.desc_fh.seek(0)
> > + self.bcfg_fh.seek(0)
> > + copyfileobj(self.desc_fh, self.fh)
> > + copyfileobj(self.bcfg_fh, self.fh)
> > + except:
> > + logging.error("**** Error in finalizing boardcfg file ****")
> > + raise Exception("File Error")
> > + finally:
> > + self.fh.close()
> > + self.desc_fh.close()
> > + self.bcfg_fh.close()
> > + rmtree(self.tmpdir)
> > +
> > +def create_sysfw_blob(args):
> > + """Create a SYSFW data blob to be used as a component in combined image """
> > +
> > + logging.info("#### Creating SYSFW data blob - %s ####", args.output_file.name)
> > + logging.info("#### SW Rev = %d", args.sw_rev)
> > + logging.info("#### Device Group = %d", args.devgrp)
> > +
> > + cnt = 0
> > + if args.boardcfg is not None: cnt = cnt + 1
> > + if args.boardcfg_sec is not None: cnt = cnt + 1
> > + if args.boardcfg_pm is not None: cnt = cnt + 1
> > + if args.boardcfg_rm is not None: cnt = cnt + 1
> > +
> > + blob = BoardCfgDesc(args.output_file.name, args.devgrp, args.sw_rev, cnt)
> > + if args.boardcfg is not None:
> > + logging.info("#### Board config binary - %s", args.boardcfg.name)
> > + blob.add_boardcfg(BOARDCFG, args.boardcfg.name)
> > + if args.boardcfg_sec is not None:
> > + logging.info("#### Board config security binary - %s", args.boardcfg_sec.name)
> > + blob.add_boardcfg(BOARDCFG_SEC, args.boardcfg_sec.name)
> > + if args.boardcfg_pm is not None:
> > + logging.info("#### Board config PM binary - %s", args.boardcfg_pm.name)
> > + blob.add_boardcfg(BOARDCFG_PM, args.boardcfg_pm.name)
> > + if args.boardcfg_rm is not None:
> > + logging.info("#### Board config RM binary - %s", args.boardcfg_rm.name)
> > + blob.add_boardcfg(BOARDCFG_RM, args.boardcfg_rm.name)
> > +
> > + blob.finalize()
> > +
> > +# options -> device, sw_rev, boardcfg, security boardcfg, pm boardcfg, rm boardcfg, output file
> > +
> > +# parser for mandatory arguments
> > +pp = argparse.ArgumentParser(add_help=False)
> > +pp.add_argument('-l', '--log-level', type=str, default="INFO", choices=["INFO", "DEBUG"])
> > +pp.add_argument('--sw-rev', type=int, default=1)
> > +pp.add_argument('-o', '--output-file', type=argparse.FileType('wb'), default="./sysfw-data.bin")
> > +pp.add_argument('-d', '--devgrp', type=int, default=0)
> > +pp.add_argument('-b', '--boardcfg', type=argparse.FileType('rb'))
> > +pp.add_argument('-s', '--boardcfg-sec', type=argparse.FileType('rb'))
> > +pp.add_argument('-p', '--boardcfg-pm', type=argparse.FileType('rb'))
> > +pp.add_argument('-r', '--boardcfg-rm', type=argparse.FileType('rb'))
> > +
> > +args = pp.parse_args()
> > +logging.getLogger().setLevel(args.log_level)
> > +logging.debug(args)
> > +create_sysfw_blob(args)
>
> Working on your reviews, I'm trying to get rid of all external scripts
> and putting them into btools/etypes which seems fit.
> * ti_secure_path can be nicely put into a btool
> * ti_boardcfg can also be an etype that outputs <type>-cfg.bins
>
> But... I am not sure about this script above
> k3_sysfw_boardcfg_blob_creator.py. This script essentially does a more
> detailed packing of the <type>-cfg.bins that have been generated by
> binman. Since binman doesn't account for dependencies as of now; I am
> not sure how to go about it. Any pointers?
>
> I could have something like
>
> combined-sysfw-cfg.bin {
> sysfw-boardcfg {
> ti-boardcfg {
> config = "board-cfg.yaml";
> schema = "schema.yaml";
> }
> ti-boardcfg {
> config = "sec-cfg.yaml";
> ...
>
> But is there any way to not have to implement this entry within entry
> coupled with packaging, which I think might get a little messy?
Yes you can have entries within entries and it should work fine. See
[1] for an example of that. It is a correct description of how the
image is put together, so I don't really see a better way.
BTW perhaps 'config' and 'schema' are a bit too generic, but we can
worry about that later. There is no schema validation for binman at
present but I suspect I'll be looking at later in the year.
Regarding accounting for dependencies, it is possible to put a
'filename' property in a section such that binman outputs the contents
of the section to a separate file.
Regards,
SImon
[1] https://patchwork.ozlabs.org/project/uboot/patch/20220110031413.1970836-39-sjg@chromium.org/
^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH 02/21] tools: sysfw: Add script for generating configuration blobs
2023-01-23 18:42 ` Simon Glass
@ 2023-01-24 10:04 ` Neha Malcom Francis
0 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-24 10:04 UTC (permalink / raw)
To: Simon Glass; +Cc: alpernebiyasak, nm, bb, u-boot, trini, afd, vigneshr, rogerq
Hi Simon,
On 24/01/23 00:12, Simon Glass wrote:
> Hi Neha,
>
> On Mon, 23 Jan 2023 at 07:19, Neha Malcom Francis <n-francis@ti.com> wrote:
>>
>> Hi Simon,
>>
>> On 20/01/23 15:48, Neha Malcom Francis wrote:
>>> Certain devices in the K3 architecture such as AM64x require board
>>> configuration binaries packed along with their descriptions into a
>>> sysfw_data binary. The final binary is required to be packed into the
>>> final system firmware images.
>>>
>>> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
>>> ---
>>> tools/k3_sysfw_boardcfg_blob_creator.py | 116 ++++++++++++++++++++++++
>>> 1 file changed, 116 insertions(+)
>>> create mode 100755 tools/k3_sysfw_boardcfg_blob_creator.py
>>>
>>> diff --git a/tools/k3_sysfw_boardcfg_blob_creator.py b/tools/k3_sysfw_boardcfg_blob_creator.py
>>> new file mode 100755
>>> index 0000000000..da99808521
>>> --- /dev/null
>>> +++ b/tools/k3_sysfw_boardcfg_blob_creator.py
>>> @@ -0,0 +1,116 @@
>>> +# SPDX-License-Identifier: GPL-2.0+
>>> +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
>>> +#
>>> +# TI Script for Board Configuration Packaging
>>> +#
>>> +
>>> +import argparse
>>> +import logging
>>> +import os
>>> +import struct
>>> +import tempfile
>>> +from shutil import copyfileobj
>>> +from shutil import rmtree
>>> +
>>> +BOARDCFG = 0xB
>>> +BOARDCFG_SEC = 0xD
>>> +BOARDCFG_PM = 0xE
>>> +BOARDCFG_RM = 0xC
>>> +BOARDCFG_NUM_ELEMS = 4
>>> +
>>> +class BoardCfgDesc():
>>> + """Get board config descriptor for a given file """
>>> +
>>> + fmt = '<HHHBB'
>>> + index = 0
>>> + offset = 0
>>> +
>>> + def __init__(self, outfile, devgrp,
>>> + sw_rev = 0,
>>> + num_elems = BOARDCFG_NUM_ELEMS):
>>> + self.devgrp = devgrp
>>> + try:
>>> + self.fh = open(outfile, 'wb')
>>> + bytes = self.fh.write(struct.pack('<BB', num_elems, sw_rev))
>>> + self.offset += bytes
>>> + self.offset += num_elems * struct.calcsize(self.fmt)
>>> + self.tmpdir = tempfile.mkdtemp()
>>> + descfile = os.path.join(self.tmpdir, "desc")
>>> + bcfgfile = os.path.join(self.tmpdir, "bcfg")
>>> + self.desc_fh = open(descfile, "wb+")
>>> + self.bcfg_fh = open(bcfgfile, "wb+")
>>> + except:
>>> + raise Exception("File Error")
>>> +
>>> + def add_boardcfg(self, bcfgtype, bcfgfile):
>>> + with open(bcfgfile, 'rb') as bfh:
>>> + bcfg = bfh.read()
>>> + size = len(bcfg)
>>> + desc = struct.pack(self.fmt, bcfgtype, self.offset, size, self.devgrp, 0)
>>> + self.desc_fh.write(desc)
>>> + self.bcfg_fh.write(bcfg)
>>> + logging.debug("Packing boardcfg data of size [%d bytes] from file %s", size, bcfgfile)
>>> + self.offset += size
>>> + self.index += 1
>>> +
>>> + def finalize(self):
>>> + try:
>>> + self.desc_fh.seek(0)
>>> + self.bcfg_fh.seek(0)
>>> + copyfileobj(self.desc_fh, self.fh)
>>> + copyfileobj(self.bcfg_fh, self.fh)
>>> + except:
>>> + logging.error("**** Error in finalizing boardcfg file ****")
>>> + raise Exception("File Error")
>>> + finally:
>>> + self.fh.close()
>>> + self.desc_fh.close()
>>> + self.bcfg_fh.close()
>>> + rmtree(self.tmpdir)
>>> +
>>> +def create_sysfw_blob(args):
>>> + """Create a SYSFW data blob to be used as a component in combined image """
>>> +
>>> + logging.info("#### Creating SYSFW data blob - %s ####", args.output_file.name)
>>> + logging.info("#### SW Rev = %d", args.sw_rev)
>>> + logging.info("#### Device Group = %d", args.devgrp)
>>> +
>>> + cnt = 0
>>> + if args.boardcfg is not None: cnt = cnt + 1
>>> + if args.boardcfg_sec is not None: cnt = cnt + 1
>>> + if args.boardcfg_pm is not None: cnt = cnt + 1
>>> + if args.boardcfg_rm is not None: cnt = cnt + 1
>>> +
>>> + blob = BoardCfgDesc(args.output_file.name, args.devgrp, args.sw_rev, cnt)
>>> + if args.boardcfg is not None:
>>> + logging.info("#### Board config binary - %s", args.boardcfg.name)
>>> + blob.add_boardcfg(BOARDCFG, args.boardcfg.name)
>>> + if args.boardcfg_sec is not None:
>>> + logging.info("#### Board config security binary - %s", args.boardcfg_sec.name)
>>> + blob.add_boardcfg(BOARDCFG_SEC, args.boardcfg_sec.name)
>>> + if args.boardcfg_pm is not None:
>>> + logging.info("#### Board config PM binary - %s", args.boardcfg_pm.name)
>>> + blob.add_boardcfg(BOARDCFG_PM, args.boardcfg_pm.name)
>>> + if args.boardcfg_rm is not None:
>>> + logging.info("#### Board config RM binary - %s", args.boardcfg_rm.name)
>>> + blob.add_boardcfg(BOARDCFG_RM, args.boardcfg_rm.name)
>>> +
>>> + blob.finalize()
>>> +
>>> +# options -> device, sw_rev, boardcfg, security boardcfg, pm boardcfg, rm boardcfg, output file
>>> +
>>> +# parser for mandatory arguments
>>> +pp = argparse.ArgumentParser(add_help=False)
>>> +pp.add_argument('-l', '--log-level', type=str, default="INFO", choices=["INFO", "DEBUG"])
>>> +pp.add_argument('--sw-rev', type=int, default=1)
>>> +pp.add_argument('-o', '--output-file', type=argparse.FileType('wb'), default="./sysfw-data.bin")
>>> +pp.add_argument('-d', '--devgrp', type=int, default=0)
>>> +pp.add_argument('-b', '--boardcfg', type=argparse.FileType('rb'))
>>> +pp.add_argument('-s', '--boardcfg-sec', type=argparse.FileType('rb'))
>>> +pp.add_argument('-p', '--boardcfg-pm', type=argparse.FileType('rb'))
>>> +pp.add_argument('-r', '--boardcfg-rm', type=argparse.FileType('rb'))
>>> +
>>> +args = pp.parse_args()
>>> +logging.getLogger().setLevel(args.log_level)
>>> +logging.debug(args)
>>> +create_sysfw_blob(args)
>>
>> Working on your reviews, I'm trying to get rid of all external scripts
>> and putting them into btools/etypes which seems fit.
>> * ti_secure_path can be nicely put into a btool
>> * ti_boardcfg can also be an etype that outputs <type>-cfg.bins
>>
>> But... I am not sure about this script above
>> k3_sysfw_boardcfg_blob_creator.py. This script essentially does a more
>> detailed packing of the <type>-cfg.bins that have been generated by
>> binman. Since binman doesn't account for dependencies as of now; I am
>> not sure how to go about it. Any pointers?
>>
>> I could have something like
>>
>> combined-sysfw-cfg.bin {
>> sysfw-boardcfg {
>> ti-boardcfg {
>> config = "board-cfg.yaml";
>> schema = "schema.yaml";
>> }
>> ti-boardcfg {
>> config = "sec-cfg.yaml";
>> ...
>>
>> But is there any way to not have to implement this entry within entry
>> coupled with packaging, which I think might get a little messy?
>
> Yes you can have entries within entries and it should work fine. See
> [1] for an example of that. It is a correct description of how the
> image is put together, so I don't really see a better way.
>
> BTW perhaps 'config' and 'schema' are a bit too generic, but we can
> worry about that later. There is no schema validation for binman at
> present but I suspect I'll be looking at later in the year.
>
> Regarding accounting for dependencies, it is possible to put a
> 'filename' property in a section such that binman outputs the contents
> of the section to a separate file.
>
> Regards,
> SImon
>
> [1] https://patchwork.ozlabs.org/project/uboot/patch/20220110031413.1970836-39-sjg@chromium.org/
Thanks for the help! The referenced patch shows a good guideline of how
to enable this. I am currently trying to implement this, will reach out
in case any confusion arises.
--
Thanking You
Neha Malcom Francis
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 03/21] tools: binman: add ti-secure entry type
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 01/21] ti: tools: config: Add board config class to generate config binaries Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 02/21] tools: sysfw: Add script for generating configuration blobs Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 19:46 ` Simon Glass
2023-01-20 10:18 ` [PATCH 04/21] ti: sysfw: tiboot3: Add support for packaging sysfw.itb and tiboot3.bin Neha Malcom Francis
` (18 subsequent siblings)
21 siblings, 1 reply; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
This entry type is used to create a secured binary
for use with K3 High Security (HS) devices.
This allows us to no longer depend on k3_fit_atf.sh for
A53 SPL and u-boot image generation even for HS devices.
We still depend on the availability of an external
tool provided by the TI_SECURE_DEV_PKG environment
variable to secure the binaries.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
[n-francis@ti.com: enabled signing for all K3 boot binaries for all
different boot flows]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
Makefile | 1 +
tools/binman/entries.rst | 15 ++++
tools/binman/etype/ti_secure.py | 133 ++++++++++++++++++++++++++++++++
tools/binman/ftest.py | 8 ++
4 files changed, 157 insertions(+)
create mode 100644 tools/binman/etype/ti_secure.py
diff --git a/Makefile b/Makefile
index eb354c045c..c568a6e59a 100644
--- a/Makefile
+++ b/Makefile
@@ -1329,6 +1329,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
$(foreach f,$(BINMAN_INDIRS),-I $(f)) \
-a atf-bl31-path=${BL31} \
-a tee-os-path=${TEE} \
+ -a ti-secure-dev-pkg-path=${TI_SECURE_DEV_PKG} \
-a opensbi-path=${OPENSBI} \
-a default-dt=$(default_dt) \
-a scp-path=$(SCP) \
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 2b32c131ed..bf363434a2 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -2361,3 +2361,18 @@ may be used instead.
+Entry: ti-secure: Entry containing a Secured binary blob
+--------------------------------------------------------
+
+Properties / Entry arguments:
+ - filename: Filename of file to sign and read into entry
+
+Texas Instruments High-Security (HS) devices need secure binaries to be
+provided. This entry uses an external tool to append a x509 certificate
+to the file provided in the filename property and places it in the entry.
+
+The path for the external tool is fetched from TI_SECURE_DEV_PKG
+environment variable.
+
+
+
diff --git a/tools/binman/etype/ti_secure.py b/tools/binman/etype/ti_secure.py
new file mode 100644
index 0000000000..5447bb61df
--- /dev/null
+++ b/tools/binman/etype/ti_secure.py
@@ -0,0 +1,133 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (c) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+
+# Support for signed binaries for TI K3 platform
+
+from collections import OrderedDict
+import os
+
+from binman.entry import Entry, EntryArg
+
+from dtoc import fdt_util
+from patman import tools
+
+class Entry_ti_secure(Entry):
+ """An entry which contains a signed x509 binary for signing TI
+ General Purpose as well as High-Security devices.
+
+ Properties / Entry arguments:
+ - filename: filename of binary file to be secured
+
+ Output files:
+ - filename_x509 - output file generated by secure x509 signing script (which
+ used as entry contents)
+ """
+ def __init__(self, section, etype, node):
+ super().__init__(section, etype, node)
+ self.filename = fdt_util.GetString(self._node, 'filename')
+ self.key = fdt_util.GetString(self._node, 'key', "")
+ self.core = fdt_util.GetInt(self._node, 'core', 16)
+ self.load_addr = fdt_util.GetInt(self._node, 'load', 0x41c00000)
+ self.sw_rev = fdt_util.GetInt(self._node, 'sw-rev')
+ self.cert3 = fdt_util.GetBool(self._node, 'sysfw-cert', False)
+ self.secure = fdt_util.GetBool(self._node, 'secure', False)
+ self.combined = fdt_util.GetBool(self._node, 'combined', False)
+ self.split_dm = fdt_util.GetBool(self._node, 'split-dm', False)
+ self.sysfw_filename = fdt_util.GetString(self._node, 'sysfw-filename')
+ self.sysfw_load_addr = fdt_util.GetInt(self._node, 'sysfw-load')
+ self.sysfw_data_filename = fdt_util.GetString(self._node, 'sysfw-data-filename')
+ self.sysfw_data_load_addr = fdt_util.GetInt(self._node, 'sysfw-data-load')
+ self.sysfw_inner_cert = fdt_util.GetString(self._node, 'sysfw-inner-cert', "")
+ self.dm_data_filename = fdt_util.GetString(self._node, 'dm-data-filename')
+ self.dm_data_load_addr = fdt_util.GetInt(self._node, 'dm-data-load')
+ self.sysfw_inner_cert_filename = fdt_util.GetString(self._node, 'sysfw-inner-cert-filename')
+ self.sysfw_inner_cert_load_addr = fdt_util.GetInt(self._node, 'sysfw-inner-cert-load')
+ self.toolpresent = False
+ if not self.filename:
+ self.Raise("ti_secure must have a 'filename' property")
+ self.toolspath, = self.GetEntryArgsOrProps(
+ [EntryArg('ti-secure-dev-pkg-path', str)])
+ if not self.toolspath:
+ print("WARNING: TI_SECURE_DEV_PKG environment " \
+ "variable must be defined for TI GP and HS devices! " +
+ self.filename + " was NOT signed!")
+ return
+
+ if self.cert3 == True:
+ self.tool = self.toolspath + "/scripts/gen_x509_cert3.sh"
+ self.core = "m3"
+ elif self.secure == True:
+ self.tool = self.toolspath + "/scripts/secure-binary-image.sh"
+ elif self.combined:
+ self.tool = self.toolspath + "/scripts/gen_x509_combined_cert.sh"
+ else:
+ self.tool = self.toolspath + "/scripts/gen_x509_cert.sh"
+ self.toolpresent = os.path.exists(self.tool)
+ if not self.toolpresent:
+ print(self.tool + " not found. " +
+ self.filename + " was NOT signed! ")
+
+ if self.key == "" and not self.secure:
+ self.key = self.toolspath + "/keys/ti-degenerate-key.pem"
+ self.keypresent = os.path.exists(self.key)
+ if not self.keypresent:
+ print(self.key + " not found. " +
+ self.filename + " was NOT signed! ")
+ else:
+ print("Signing " + self.filename + " with degenerate RSA key...")
+ else:
+ self.key = self.toolspath + self.key
+ print("Signing " + self.filename + " with " + self.key)
+
+ if self.sw_rev is None and not self.secure:
+ self.sw_revfile = self.toolspath + "/keys/swrv.txt"
+ with open(self.sw_revfile) as f:
+ self.sw_rev = int(f.read())
+ self.swrevpresent = os.path.exists(self.sw_rev)
+ if not self.swrevpresent:
+ print(self.sw_rev + " not found. " +
+ "Software revision file not found. Default may not work on HS hardware.")
+ self.sw_rev = 1
+
+ def ObtainContents(self):
+ input_fname = self.filename
+ output_fname = input_fname + "_x509"
+ if self.secure:
+ args = [
+ input_fname, output_fname,
+ ]
+ elif self.combined:
+ args = [
+ '-b', input_fname,
+ '-l', hex(self.load_addr),
+ '-s', self.sysfw_filename,
+ '-m', hex(self.sysfw_load_addr),
+ '-c', self.sysfw_inner_cert,
+ '-d', self.sysfw_data_filename,
+ '-n', hex(self.sysfw_data_load_addr),
+ '-k', self.key,
+ '-r', str(self.sw_rev),
+ '-o', output_fname,
+ ]
+ if self.split_dm:
+ args.extend(['-t', self.dm_data_filename, '-y', hex(self.dm_data_load_addr)])
+ else:
+ args = [
+ '-c', str(self.core),
+ '-b', input_fname,
+ '-o', output_fname,
+ '-l', hex(self.load_addr),
+ '-r', str(self.sw_rev),
+ '-k', self.key,
+ ]
+ if self.cert3 == True:
+ args.insert(0, '-d')
+ if self.toolpresent:
+ stdout = tools.run(self.tool, *args)
+ else:
+ stdout = tools.run('cp', *args)
+ print(output_fname + ' not signed!')
+
+ self.SetContents(tools.read_file(output_fname))
+ return True
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index be0aea49ce..aaa2c610b0 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -93,6 +93,7 @@ SCP_DATA = b'scp'
TEST_FDT1_DATA = b'fdt1'
TEST_FDT2_DATA = b'test-fdt2'
ENV_DATA = b'var1=1\nvar2="2"'
+TI_UNSECURE_DATA = b'this is some unsecure data'
PRE_LOAD_MAGIC = b'UBSH'
PRE_LOAD_VERSION = 0x11223344.to_bytes(4, 'big')
PRE_LOAD_HDR_SIZE = 0x00001000.to_bytes(4, 'big')
@@ -213,6 +214,7 @@ class TestFunctional(unittest.TestCase):
TEST_FDT2_DATA)
TestFunctional._MakeInputFile('env.txt', ENV_DATA)
+ TestFunctional._MakeInputFile('ti_unsecure.bin', TI_UNSECURE_DATA)
# ELF file with two sections in different parts of memory, used for both
# ATF and OP_TEE
@@ -5545,6 +5547,12 @@ fdt fdtmap Extract the devicetree blob from the fdtmap
err)
+ def testPackTisecure(self):
+ """Test that an image with a TI secured binary can be created"""
+ data = self._DoReadFile('187_ti_secure.dts')
+ securedata = tools.ReadFile('ti_unsecure.bin_HS')
+ self.assertEquals(data, securedata)
+
def testFitSplitElfMissing(self):
"""Test an split-elf FIT with a missing ELF file"""
if not elf.ELF_TOOLS:
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH 03/21] tools: binman: add ti-secure entry type
2023-01-20 10:18 ` [PATCH 03/21] tools: binman: add ti-secure entry type Neha Malcom Francis
@ 2023-01-20 19:46 ` Simon Glass
0 siblings, 0 replies; 31+ messages in thread
From: Simon Glass @ 2023-01-20 19:46 UTC (permalink / raw)
To: Neha Malcom Francis
Cc: u-boot, trini, afd, vigneshr, rogerq, alpernebiyasak, nm, bb
Hi Neha,
\
On Fri, 20 Jan 2023 at 03:19, Neha Malcom Francis <n-francis@ti.com> wrote:
>
> This entry type is used to create a secured binary
> for use with K3 High Security (HS) devices.
>
> This allows us to no longer depend on k3_fit_atf.sh for
> A53 SPL and u-boot image generation even for HS devices.
>
> We still depend on the availability of an external
> tool provided by the TI_SECURE_DEV_PKG environment
> variable to secure the binaries.
>
> Signed-off-by: Roger Quadros <rogerq@kernel.org>
> [n-francis@ti.com: enabled signing for all K3 boot binaries for all
> different boot flows]
> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> ---
> Makefile | 1 +
> tools/binman/entries.rst | 15 ++++
> tools/binman/etype/ti_secure.py | 133 ++++++++++++++++++++++++++++++++
> tools/binman/ftest.py | 8 ++
> 4 files changed, 157 insertions(+)
> create mode 100644 tools/binman/etype/ti_secure.py
>
Sorry, I have rather a lot of comments, so will do a round of just the
major ones for this version.
> diff --git a/Makefile b/Makefile
> index eb354c045c..c568a6e59a 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -1329,6 +1329,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
> $(foreach f,$(BINMAN_INDIRS),-I $(f)) \
> -a atf-bl31-path=${BL31} \
> -a tee-os-path=${TEE} \
> + -a ti-secure-dev-pkg-path=${TI_SECURE_DEV_PKG} \
Cam we use ti-secure-path ? The 'dev' and 'pkg' seem to be noise.
> -a opensbi-path=${OPENSBI} \
> -a default-dt=$(default_dt) \
> -a scp-path=$(SCP) \
> diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
> index 2b32c131ed..bf363434a2 100644
> --- a/tools/binman/entries.rst
> +++ b/tools/binman/entries.rst
> @@ -2361,3 +2361,18 @@ may be used instead.
>
>
>
> +Entry: ti-secure: Entry containing a Secured binary blob
> +--------------------------------------------------------
> +
> +Properties / Entry arguments:
> + - filename: Filename of file to sign and read into entry
> +
> +Texas Instruments High-Security (HS) devices need secure binaries to be
> +provided. This entry uses an external tool to append a x509 certificate
> +to the file provided in the filename property and places it in the entry.
> +
> +The path for the external tool is fetched from TI_SECURE_DEV_PKG
> +environment variable.
> +
> +
> +
> diff --git a/tools/binman/etype/ti_secure.py b/tools/binman/etype/ti_secure.py
> new file mode 100644
> index 0000000000..5447bb61df
> --- /dev/null
> +++ b/tools/binman/etype/ti_secure.py
> @@ -0,0 +1,133 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +# Copyright (c) 2022 Texas Instruments Incorporated - https://www.ti.com/
> +#
> +
> +# Support for signed binaries for TI K3 platform
> +
> +from collections import OrderedDict
> +import os
> +
> +from binman.entry import Entry, EntryArg
> +
> +from dtoc import fdt_util
> +from patman import tools
> +
> +class Entry_ti_secure(Entry):
So shouldn't this be Entry_blob ?
> + """An entry which contains a signed x509 binary for signing TI
> + General Purpose as well as High-Security devices.
First line of comment must be the summary. Then add a blank line and
the extra detail. See how this is done elsewhere
> +
> + Properties / Entry arguments:
> + - filename: filename of binary file to be secured
Please describe all the properties
> +
> + Output files:
> + - filename_x509 - output file generated by secure x509 signing script (which
> + used as entry contents)
> + """
> + def __init__(self, section, etype, node):
> + super().__init__(section, etype, node)
> + self.filename = fdt_util.GetString(self._node, 'filename')
> + self.key = fdt_util.GetString(self._node, 'key', "")
If key is '' does it work?
Please use single quotes consistently except for function comments.
> + self.core = fdt_util.GetInt(self._node, 'core', 16)
> + self.load_addr = fdt_util.GetInt(self._node, 'load', 0x41c00000)
> + self.sw_rev = fdt_util.GetInt(self._node, 'sw-rev')
> + self.cert3 = fdt_util.GetBool(self._node, 'sysfw-cert', False)
try to use the same name for the property as the DT one if you can
> + self.secure = fdt_util.GetBool(self._node, 'secure', False)
> + self.combined = fdt_util.GetBool(self._node, 'combined', False)
> + self.split_dm = fdt_util.GetBool(self._node, 'split-dm', False)
> + self.sysfw_filename = fdt_util.GetString(self._node, 'sysfw-filename')
> + self.sysfw_load_addr = fdt_util.GetInt(self._node, 'sysfw-load')
> + self.sysfw_data_filename = fdt_util.GetString(self._node, 'sysfw-data-filename')
> + self.sysfw_data_load_addr = fdt_util.GetInt(self._node, 'sysfw-data-load')
> + self.sysfw_inner_cert = fdt_util.GetString(self._node, 'sysfw-inner-cert', "")
> + self.dm_data_filename = fdt_util.GetString(self._node, 'dm-data-filename')
> + self.dm_data_load_addr = fdt_util.GetInt(self._node, 'dm-data-load')
> + self.sysfw_inner_cert_filename = fdt_util.GetString(self._node, 'sysfw-inner-cert-filename')
> + self.sysfw_inner_cert_load_addr = fdt_util.GetInt(self._node, 'sysfw-inner-cert-load')
> + self.toolpresent = False
> + if not self.filename:
> + self.Raise("ti_secure must have a 'filename' property")
This is handled by putting something like this in __init__
self.required_props = ['filename']
> + self.toolspath, = self.GetEntryArgsOrProps(
> + [EntryArg('ti-secure-dev-pkg-path', str)])
> + if not self.toolspath:
> + print("WARNING: TI_SECURE_DEV_PKG environment " \
> + "variable must be defined for TI GP and HS devices! " +
> + self.filename + " was NOT signed!")
> + return
This is handled by the bintool being 'missing'.
See how the other bintools are implemented. Create a bintool for your tool.
> +
> + if self.cert3 == True:
> + self.tool = self.toolspath + "/scripts/gen_x509_cert3.sh"
> + self.core = "m3"
> + elif self.secure == True:
> + self.tool = self.toolspath + "/scripts/secure-binary-image.sh"
> + elif self.combined:
> + self.tool = self.toolspath + "/scripts/gen_x509_combined_cert.sh"
> + else:
> + self.tool = self.toolspath + "/scripts/gen_x509_cert.sh"
These need to be bintools too, or perhaps other entry types. I'm not sure...
> + self.toolpresent = os.path.exists(self.tool)
> + if not self.toolpresent:
> + print(self.tool + " not found. " +
> + self.filename + " was NOT signed! ")
> +
> + if self.key == "" and not self.secure:
> + self.key = self.toolspath + "/keys/ti-degenerate-key.pem"
> + self.keypresent = os.path.exists(self.key)
> + if not self.keypresent:
> + print(self.key + " not found. " +
> + self.filename + " was NOT signed! ")
> + else:
> + print("Signing " + self.filename + " with degenerate RSA key...")
> + else:
> + self.key = self.toolspath + self.key
> + print("Signing " + self.filename + " with " + self.key)
You can't use 'print' in binman. You can use things like tout.info()
to emit info.
> +
> + if self.sw_rev is None and not self.secure:
> + self.sw_revfile = self.toolspath + "/keys/swrv.txt"
> + with open(self.sw_revfile) as f:
> + self.sw_rev = int(f.read())
> + self.swrevpresent = os.path.exists(self.sw_rev)
> + if not self.swrevpresent:
> + print(self.sw_rev + " not found. " +
> + "Software revision file not found. Default may not work on HS hardware.")
> + self.sw_rev = 1
> +
> + def ObtainContents(self):
> + input_fname = self.filename
> + output_fname = input_fname + "_x509"
> + if self.secure:
> + args = [
> + input_fname, output_fname,
> + ]
> + elif self.combined:
> + args = [
> + '-b', input_fname,
> + '-l', hex(self.load_addr),
> + '-s', self.sysfw_filename,
> + '-m', hex(self.sysfw_load_addr),
> + '-c', self.sysfw_inner_cert,
> + '-d', self.sysfw_data_filename,
> + '-n', hex(self.sysfw_data_load_addr),
> + '-k', self.key,
> + '-r', str(self.sw_rev),
> + '-o', output_fname,
> + ]
> + if self.split_dm:
> + args.extend(['-t', self.dm_data_filename, '-y', hex(self.dm_data_load_addr)])
> + else:
> + args = [
> + '-c', str(self.core),
> + '-b', input_fname,
> + '-o', output_fname,
> + '-l', hex(self.load_addr),
> + '-r', str(self.sw_rev),
> + '-k', self.key,
> + ]
> + if self.cert3 == True:
nit: use:
if self.cert3:
> + args.insert(0, '-d')
> + if self.toolpresent:
> + stdout = tools.run(self.tool, *args)
> + else:
> + stdout = tools.run('cp', *args)
> + print(output_fname + ' not signed!')
> +
> + self.SetContents(tools.read_file(output_fname))
> + return True
> diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
> index be0aea49ce..aaa2c610b0 100644
> --- a/tools/binman/ftest.py
> +++ b/tools/binman/ftest.py
> @@ -93,6 +93,7 @@ SCP_DATA = b'scp'
> TEST_FDT1_DATA = b'fdt1'
> TEST_FDT2_DATA = b'test-fdt2'
> ENV_DATA = b'var1=1\nvar2="2"'
> +TI_UNSECURE_DATA = b'this is some unsecure data'
> PRE_LOAD_MAGIC = b'UBSH'
> PRE_LOAD_VERSION = 0x11223344.to_bytes(4, 'big')
> PRE_LOAD_HDR_SIZE = 0x00001000.to_bytes(4, 'big')
> @@ -213,6 +214,7 @@ class TestFunctional(unittest.TestCase):
> TEST_FDT2_DATA)
>
> TestFunctional._MakeInputFile('env.txt', ENV_DATA)
> + TestFunctional._MakeInputFile('ti_unsecure.bin', TI_UNSECURE_DATA)
>
> # ELF file with two sections in different parts of memory, used for both
> # ATF and OP_TEE
> @@ -5545,6 +5547,12 @@ fdt fdtmap Extract the devicetree blob from the fdtmap
> err)
>
>
> + def testPackTisecure(self):
> + """Test that an image with a TI secured binary can be created"""
> + data = self._DoReadFile('187_ti_secure.dts')
> + securedata = tools.ReadFile('ti_unsecure.bin_HS')
> + self.assertEquals(data, securedata)
> +
The test needs to cover the tool being missing.
> def testFitSplitElfMissing(self):
> """Test an split-elf FIT with a missing ELF file"""
> if not elf.ELF_TOOLS:
> --
> 2.34.1
>
Regards,
Simon
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 04/21] ti: sysfw: tiboot3: Add support for packaging sysfw.itb and tiboot3.bin
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (2 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 03/21] tools: binman: add ti-secure entry type Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 05/21] j721e: schema: yaml: Add general schema and J721E board config files Neha Malcom Francis
` (17 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Board config binary artifacts must be populated in the R5 output
directory to be used by binman to package sysfw.itb and tiboot3.bin.
For devices that follow combined flow, these board configuration
binaries must again be packaged into a combined board configuration
blobs to be used by binman to package tiboot3.bin.
Modify config.mk to generate all the board configuration binaries
as well as the combined blob binaries.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/mach-k3/config.mk | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index 9306f2627d..138b44a3fa 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -39,6 +39,37 @@ $(warning "WARNING: Software revision file not found. Default may not work on HS
endif
endif
+O ?= .
+
+# Board config binary artifacts necessary for packaging of tiboot3.bin
+# and sysfw.itb by binman, currently for general purpose devices and
+# devices that require sysfw.itb in ROM boot image. Currently set up
+# for J721E
+ifdef CONFIG_BINMAN
+
+CONFIG_YAML = $(srctree)/board/ti/$(BOARD)/config.yaml
+SCHEMA_YAML = $(srctree)/board/ti/common/schema.yaml
+board-cfg.bin pm-cfg.bin rm-cfg.bin sec-cfg.bin:
+ $(PYTHON3) $(srctree)/tools/tibcfg_gen.py -c $(CONFIG_YAML) -s $(SCHEMA_YAML)
+INPUTS-y += board-cfg.bin
+INPUTS-y += pm-cfg.bin
+INPUTS-y += rm-cfg.bin
+INPUTS-y += sec-cfg.bin
+
+combined-sysfw-cfg.bin: board-cfg.bin pm-cfg.bin rm-cfg.bin sec-cfg.bin
+ $(PYTHON3) $(srctree)/tools/k3_sysfw_boardcfg_blob_creator.py -b board-cfg.bin -s sec-cfg.bin -p pm-cfg.bin -r rm-cfg.bin -o $(@)
+INPUTS-y += combined-sysfw-cfg.bin
+
+combined-tifs-cfg.bin: board-cfg.bin pm-cfg.bin rm-cfg.bin sec-cfg.bin
+ $(PYTHON3) $(srctree)/tools/k3_sysfw_boardcfg_blob_creator.py -b board-cfg.bin -s sec-cfg.bin -p pm-cfg.bin -r rm-cfg.bin -o $(@)
+INPUTS-y += combined-tifs-cfg.bin
+
+combined-dm-cfg.bin: pm-cfg.bin rm-cfg.bin
+ $(PYTHON3) $(srctree)/tools/k3_sysfw_boardcfg_blob_creator.py -p pm-cfg.bin -r rm-cfg.bin -o $(@)
+INPUTS-y += combined-dm-cfg.bin
+
+endif
+
# tiboot3.bin is mandated by ROM and ROM only supports R5 boot.
# So restrict tiboot3.bin creation for CPU_V7R.
ifdef CONFIG_CPU_V7R
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 05/21] j721e: schema: yaml: Add general schema and J721E board config files
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (3 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 04/21] ti: sysfw: tiboot3: Add support for packaging sysfw.itb and tiboot3.bin Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 06/21] j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
` (16 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Schema file in YAML must be provided in board/ti/common for validating
input config files and packaging system firmware. The schema includes
entries for rm-cfg, board-cfg, pm-cfg and sec-cfg.
Board config file must be provided in board/ti/<devicename> in YAML.
These can then be consumed for generation of binaries to package system
firmware. Added YAML config for J721E in particular.
Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/common/schema.yaml | 355 ++++
board/ti/j721e/config.yaml | 3162 +++++++++++++++++++++++++++++++++++
2 files changed, 3517 insertions(+)
create mode 100644 board/ti/common/schema.yaml
create mode 100644 board/ti/j721e/config.yaml
diff --git a/board/ti/common/schema.yaml b/board/ti/common/schema.yaml
new file mode 100644
index 0000000000..070ff797e0
--- /dev/null
+++ b/board/ti/common/schema.yaml
@@ -0,0 +1,355 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Config schema for TI K3 devices
+#
+
+---
+
+definitions:
+ u8:
+ type: integer
+ minimum: 0
+ maximum: 0xff
+ u16:
+ type: integer
+ minimum: 0
+ maximum: 0xffff
+ u32:
+ type: integer
+ minimum: 0
+ maximum: 0xffffffff
+
+
+
+type: object
+properties:
+ pm-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+ board-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+ control:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ main_isolation_enable:
+ $ref: "#/definitions/u8"
+ main_isolation_hostid:
+ $ref: "#/definitions/u16"
+
+
+ secproxy:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ scaling_factor:
+ $ref: "#/definitions/u8"
+ scaling_profile:
+ $ref: "#/definitions/u8"
+ disable_main_nav_secure_proxy:
+ $ref: "#/definitions/u8"
+
+ msmc:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ msmc_cache_size:
+ $ref: "#/definitions/u8"
+ debug_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ trace_dst_enables:
+ $ref: "#/definitions/u16"
+ trace_src_enables:
+ $ref: "#/definitions/u16"
+
+ sec-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+
+ processor_acl_list:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ proc_acl_entries:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ processor_id:
+ $ref: "#/definitions/u8"
+ proc_access_master:
+ $ref: "#/definitions/u8"
+ proc_access_secondary:
+ type: array
+ minItems: 3
+ maxItems: 3
+ items:
+ $ref: "#/definitions/u8"
+ host_hierarchy:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ host_hierarchy_entries:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ host_id:
+ $ref: "#/definitions/u8"
+ supervisor_host_id:
+ $ref: "#/definitions/u8"
+
+ otp_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ otp_entry:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ host_id:
+ $ref: "#/definitions/u8"
+ host_perms:
+ $ref: "#/definitions/u8"
+ write_host_id:
+ $ref: "#/definitions/u8"
+
+ dkek_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ allowed_hosts:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+ allow_dkek_export_tisci:
+ $ref: "#/definitions/u8"
+ rsvd:
+ type: array
+ minItems: 3
+ maxItems: 3
+ items:
+ $ref: "#/definitions/u8"
+
+ sa2ul_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ rsvd:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+ sec_dbg_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ allow_jtag_unlock:
+ $ref: "#/definitions/u8"
+ allow_wildcard_unlock:
+ $ref: "#/definitions/u8"
+ allowed_debug_level_rsvd:
+ $ref: "#/definitions/u8"
+ rsvd:
+ $ref: "#/definitions/u8"
+ min_cert_rev:
+ $ref: "#/definitions/u32"
+ jtag_unlock_hosts:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+
+
+ sec_handover_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ handover_msg_sender:
+ $ref: "#/definitions/u8"
+ handover_to_host_id:
+ $ref: "#/definitions/u8"
+ rsvd:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+
+ rm-cfg:
+ type: object
+ properties:
+ rm_boardcfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+
+ host_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ host_cfg_entries:
+ type: array
+ minItems: 0
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ host_id:
+ $ref: "#/definitions/u8"
+ allowed_atype:
+ $ref: "#/definitions/u8"
+ allowed_qos:
+ $ref: "#/definitions/u16"
+ allowed_orderid:
+ $ref: "#/definitions/u32"
+ allowed_priority:
+ $ref: "#/definitions/u16"
+ allowed_sched_priority:
+ $ref: "#/definitions/u8"
+ resasg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ resasg_entries_size:
+ $ref: "#/definitions/u16"
+ reserved:
+ $ref: "#/definitions/u16"
+
+ resasg_entries:
+ type: array
+ minItems: 0
+ maxItems: 418
+ items:
+ type: object
+ properties:
+ start_resource:
+ $ref: "#/definitions/u16"
+ num_resource:
+ $ref: "#/definitions/u16"
+ type:
+ $ref: "#/definitions/u16"
+ host_id:
+ $ref: "#/definitions/u8"
+ reserved:
+ $ref: "#/definitions/u8"
diff --git a/board/ti/j721e/config.yaml b/board/ti/j721e/config.yaml
new file mode 100644
index 0000000000..710517404f
--- /dev/null
+++ b/board/ti/j721e/config.yaml
@@ -0,0 +1,3162 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for J721E EVM
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size: 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ write_host_id: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci: 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size: 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
+ allowed_debug_level_rsvd: 0
+ rsvd: 0
+ min_cert_rev: 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender: 0
+ handover_to_host_id: 0
+ rsvd: [0, 0, 0, 0]
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size: 356
+ host_cfg_entries:
+ - #1
+ host_id: 3
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #2
+ host_id: 5
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #3
+ host_id: 12
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #4
+ host_id: 13
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #5
+ host_id: 21
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #6
+ host_id: 26
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #7
+ host_id: 28
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #8
+ host_id: 35
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #9
+ host_id: 37
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #10
+ host_id: 40
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #11
+ host_id: 42
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #12
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #13
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #14
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #15
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #16
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #17
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #18
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #19
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #20
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #21
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #22
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #23
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #24
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #25
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #26
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #27
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #28
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #29
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #30
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #31
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #32
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size: 8
+ resasg_entries_size: 3344
+ reserved: 0
+ resasg_entries:
+ -
+ start_resource: 4
+ num_resource: 93
+ type: 7744
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 93
+ type: 7808
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 7872
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 8192
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 32
+ num_resource: 32
+ type: 8192
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 24
+ type: 8320
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 24
+ type: 8320
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 8384
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 8384
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 8384
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 8384
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 8384
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 8384
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 32
+ num_resource: 4
+ type: 8384
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 36
+ num_resource: 4
+ type: 8384
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 40
+ num_resource: 12
+ type: 8384
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 52
+ num_resource: 12
+ type: 8384
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 128
+ type: 8576
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 128
+ num_resource: 128
+ type: 8576
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 128
+ type: 8640
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 128
+ num_resource: 128
+ type: 8640
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 48
+ type: 8704
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 8768
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 8768
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 6
+ type: 8768
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 22
+ num_resource: 6
+ type: 8768
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 2
+ type: 8768
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 30
+ num_resource: 2
+ type: 8768
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 13258
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 20480
+ num_resource: 1024
+ type: 13261
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 13322
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 22528
+ num_resource: 1024
+ type: 13325
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 38
+ num_resource: 86
+ type: 13386
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 124
+ num_resource: 32
+ type: 13386
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 156
+ num_resource: 12
+ type: 13386
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 168
+ num_resource: 12
+ type: 13386
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 180
+ num_resource: 12
+ type: 13386
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 192
+ num_resource: 12
+ type: 13386
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 204
+ num_resource: 12
+ type: 13386
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 216
+ num_resource: 28
+ type: 13386
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 244
+ num_resource: 8
+ type: 13386
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 252
+ num_resource: 4
+ type: 13386
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 38
+ num_resource: 1024
+ type: 13389
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 1062
+ num_resource: 512
+ type: 13389
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 1574
+ num_resource: 32
+ type: 13389
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 1606
+ num_resource: 32
+ type: 13389
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 1638
+ num_resource: 256
+ type: 13389
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 1894
+ num_resource: 256
+ type: 13389
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 2150
+ num_resource: 256
+ type: 13389
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 2406
+ num_resource: 256
+ type: 13389
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 2662
+ num_resource: 256
+ type: 13389
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 2918
+ num_resource: 512
+ type: 13389
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 3430
+ num_resource: 256
+ type: 13389
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 3686
+ num_resource: 922
+ type: 13389
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 13440
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13440
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 4
+ type: 13440
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 12
+ num_resource: 4
+ type: 13440
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 13440
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 13440
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 13440
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 13440
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 32
+ num_resource: 4
+ type: 13440
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 36
+ num_resource: 12
+ type: 13440
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 48
+ num_resource: 4
+ type: 13440
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 52
+ num_resource: 12
+ type: 13440
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 13504
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 440
+ num_resource: 150
+ type: 13505
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 590
+ num_resource: 40
+ type: 13505
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 630
+ num_resource: 6
+ type: 13505
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 636
+ num_resource: 6
+ type: 13505
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 642
+ num_resource: 10
+ type: 13505
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 652
+ num_resource: 10
+ type: 13505
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 662
+ num_resource: 32
+ type: 13505
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 694
+ num_resource: 38
+ type: 13505
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 732
+ num_resource: 12
+ type: 13505
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 744
+ num_resource: 182
+ type: 13505
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 926
+ num_resource: 40
+ type: 13505
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 966
+ num_resource: 8
+ type: 13505
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 316
+ num_resource: 8
+ type: 13506
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 324
+ num_resource: 2
+ type: 13506
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 324
+ num_resource: 0
+ type: 13506
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 326
+ num_resource: 2
+ type: 13506
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 328
+ num_resource: 2
+ type: 13506
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 330
+ num_resource: 2
+ type: 13506
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 332
+ num_resource: 2
+ type: 13506
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 334
+ num_resource: 8
+ type: 13506
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 342
+ num_resource: 2
+ type: 13506
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 344
+ num_resource: 4
+ type: 13506
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 348
+ num_resource: 1
+ type: 13506
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 349
+ num_resource: 28
+ type: 13506
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 377
+ num_resource: 20
+ type: 13506
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 397
+ num_resource: 4
+ type: 13506
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 401
+ num_resource: 4
+ type: 13506
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 405
+ num_resource: 4
+ type: 13506
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 409
+ num_resource: 8
+ type: 13506
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 417
+ num_resource: 6
+ type: 13506
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 423
+ num_resource: 16
+ type: 13506
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 439
+ num_resource: 1
+ type: 13506
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 13507
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 13507
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 0
+ type: 13507
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 26
+ num_resource: 2
+ type: 13507
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 2
+ type: 13507
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 30
+ num_resource: 2
+ type: 13507
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 32
+ num_resource: 2
+ type: 13507
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 34
+ num_resource: 8
+ type: 13507
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 42
+ num_resource: 2
+ type: 13507
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 44
+ num_resource: 4
+ type: 13507
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 48
+ num_resource: 1
+ type: 13507
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 49
+ num_resource: 28
+ type: 13507
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 77
+ num_resource: 20
+ type: 13507
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 97
+ num_resource: 4
+ type: 13507
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 101
+ num_resource: 4
+ type: 13507
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 105
+ num_resource: 4
+ type: 13507
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 109
+ num_resource: 8
+ type: 13507
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 117
+ num_resource: 6
+ type: 13507
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 123
+ num_resource: 10
+ type: 13507
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 133
+ num_resource: 6
+ type: 13507
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 139
+ num_resource: 1
+ type: 13507
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 140
+ num_resource: 16
+ type: 13508
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 156
+ num_resource: 6
+ type: 13508
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 162
+ num_resource: 6
+ type: 13508
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 168
+ num_resource: 2
+ type: 13508
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 170
+ num_resource: 2
+ type: 13508
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 172
+ num_resource: 96
+ type: 13508
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 268
+ num_resource: 32
+ type: 13508
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 304
+ num_resource: 0
+ type: 13509
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 304
+ num_resource: 4
+ type: 13509
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 304
+ num_resource: 0
+ type: 13509
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 308
+ num_resource: 6
+ type: 13509
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 314
+ num_resource: 2
+ type: 13509
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 300
+ num_resource: 0
+ type: 13510
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 300
+ num_resource: 2
+ type: 13510
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 300
+ num_resource: 0
+ type: 13510
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 302
+ num_resource: 2
+ type: 13510
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13511
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13511
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13511
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 6
+ type: 13511
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 14
+ num_resource: 2
+ type: 13511
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13512
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 13512
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13512
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 13512
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 5
+ type: 13514
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 7
+ num_resource: 1
+ type: 13514
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 3
+ type: 13515
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 3
+ num_resource: 2
+ type: 13515
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 5
+ num_resource: 1
+ type: 13515
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 6
+ num_resource: 1
+ type: 13515
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 7
+ num_resource: 3
+ type: 13515
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 13515
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 13515
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 13515
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 3
+ type: 13515
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 22
+ num_resource: 6
+ type: 13515
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 3
+ type: 13515
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 31
+ num_resource: 1
+ type: 13515
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 140
+ num_resource: 16
+ type: 13568
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 156
+ num_resource: 16
+ type: 13568
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 172
+ num_resource: 128
+ type: 13568
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 13569
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 49152
+ num_resource: 1024
+ type: 13570
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 13571
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 13578
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 13578
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 0
+ type: 13578
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 26
+ num_resource: 2
+ type: 13578
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 2
+ type: 13578
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 30
+ num_resource: 2
+ type: 13578
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 32
+ num_resource: 2
+ type: 13578
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 34
+ num_resource: 8
+ type: 13578
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 42
+ num_resource: 2
+ type: 13578
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 44
+ num_resource: 4
+ type: 13578
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 48
+ num_resource: 1
+ type: 13578
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 49
+ num_resource: 28
+ type: 13578
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 77
+ num_resource: 20
+ type: 13578
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 97
+ num_resource: 4
+ type: 13578
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 101
+ num_resource: 4
+ type: 13578
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 105
+ num_resource: 4
+ type: 13578
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 109
+ num_resource: 8
+ type: 13578
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 117
+ num_resource: 6
+ type: 13578
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 123
+ num_resource: 16
+ type: 13578
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 139
+ num_resource: 1
+ type: 13578
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13579
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13579
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13579
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 6
+ type: 13579
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 14
+ num_resource: 2
+ type: 13579
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13580
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 13580
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13580
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 13580
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 13581
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 13581
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 0
+ type: 13581
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 26
+ num_resource: 2
+ type: 13581
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 2
+ type: 13581
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 30
+ num_resource: 2
+ type: 13581
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 32
+ num_resource: 2
+ type: 13581
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 34
+ num_resource: 8
+ type: 13581
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 42
+ num_resource: 2
+ type: 13581
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 44
+ num_resource: 4
+ type: 13581
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 48
+ num_resource: 1
+ type: 13581
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 49
+ num_resource: 28
+ type: 13581
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 77
+ num_resource: 20
+ type: 13581
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 97
+ num_resource: 4
+ type: 13581
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 101
+ num_resource: 4
+ type: 13581
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 105
+ num_resource: 4
+ type: 13581
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 109
+ num_resource: 8
+ type: 13581
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 117
+ num_resource: 6
+ type: 13581
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 123
+ num_resource: 10
+ type: 13581
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 133
+ num_resource: 6
+ type: 13581
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 139
+ num_resource: 1
+ type: 13581
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 140
+ num_resource: 16
+ type: 13582
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 156
+ num_resource: 6
+ type: 13582
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 162
+ num_resource: 6
+ type: 13582
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 168
+ num_resource: 2
+ type: 13582
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 170
+ num_resource: 2
+ type: 13582
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 172
+ num_resource: 96
+ type: 13582
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 268
+ num_resource: 32
+ type: 13582
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13583
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13583
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 13583
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 6
+ type: 13583
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 14
+ num_resource: 2
+ type: 13583
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13584
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 13584
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13584
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 13584
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 100
+ type: 13632
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 110
+ num_resource: 32
+ type: 13632
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 142
+ num_resource: 46
+ type: 13632
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 196
+ num_resource: 28
+ type: 13632
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 228
+ num_resource: 28
+ type: 13632
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 260
+ num_resource: 28
+ type: 13632
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 292
+ num_resource: 28
+ type: 13632
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 320
+ num_resource: 24
+ type: 13632
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 352
+ num_resource: 24
+ type: 13632
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 400
+ num_resource: 4
+ type: 13632
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 404
+ num_resource: 4
+ type: 13632
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 32
+ type: 14922
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 48
+ num_resource: 16
+ type: 14922
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 64
+ num_resource: 64
+ type: 14922
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 128
+ num_resource: 4
+ type: 14922
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 132
+ num_resource: 16
+ type: 14922
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 148
+ num_resource: 16
+ type: 14922
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 164
+ num_resource: 8
+ type: 14922
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 172
+ num_resource: 8
+ type: 14922
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 180
+ num_resource: 8
+ type: 14922
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 188
+ num_resource: 24
+ type: 14922
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 212
+ num_resource: 8
+ type: 14922
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 220
+ num_resource: 36
+ type: 14922
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 16400
+ num_resource: 128
+ type: 14925
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 16528
+ num_resource: 128
+ type: 14925
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 16656
+ num_resource: 256
+ type: 14925
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 16912
+ num_resource: 64
+ type: 14925
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 16976
+ num_resource: 128
+ type: 14925
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 17104
+ num_resource: 128
+ type: 14925
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 17232
+ num_resource: 64
+ type: 14925
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 17296
+ num_resource: 64
+ type: 14925
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 17360
+ num_resource: 64
+ type: 14925
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 17424
+ num_resource: 128
+ type: 14925
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 17552
+ num_resource: 128
+ type: 14925
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 17680
+ num_resource: 240
+ type: 14925
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 1
+ num_resource: 4
+ type: 14976
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 5
+ num_resource: 4
+ type: 14976
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 9
+ num_resource: 4
+ type: 14976
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 4
+ type: 14976
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 17
+ num_resource: 4
+ type: 14976
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 21
+ num_resource: 4
+ type: 14976
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 25
+ num_resource: 4
+ type: 14976
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 29
+ num_resource: 4
+ type: 14976
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 33
+ num_resource: 4
+ type: 14976
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 37
+ num_resource: 16
+ type: 14976
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 53
+ num_resource: 4
+ type: 14976
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 57
+ num_resource: 7
+ type: 14976
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15040
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 96
+ num_resource: 20
+ type: 15041
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 116
+ num_resource: 8
+ type: 15041
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 124
+ num_resource: 32
+ type: 15041
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 156
+ num_resource: 12
+ type: 15041
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 168
+ num_resource: 8
+ type: 15041
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 176
+ num_resource: 8
+ type: 15041
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 184
+ num_resource: 8
+ type: 15041
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 192
+ num_resource: 8
+ type: 15041
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 200
+ num_resource: 8
+ type: 15041
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 208
+ num_resource: 16
+ type: 15041
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 224
+ num_resource: 8
+ type: 15041
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 232
+ num_resource: 20
+ type: 15041
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 50
+ num_resource: 4
+ type: 15042
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 54
+ num_resource: 2
+ type: 15042
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 54
+ num_resource: 0
+ type: 15042
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 56
+ num_resource: 0
+ type: 15042
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 56
+ num_resource: 1
+ type: 15042
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 57
+ num_resource: 1
+ type: 15042
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 58
+ num_resource: 1
+ type: 15042
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 59
+ num_resource: 1
+ type: 15042
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 60
+ num_resource: 1
+ type: 15042
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 61
+ num_resource: 1
+ type: 15042
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 62
+ num_resource: 1
+ type: 15042
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 63
+ num_resource: 9
+ type: 15042
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 72
+ num_resource: 6
+ type: 15042
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 78
+ num_resource: 3
+ type: 15042
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 81
+ num_resource: 2
+ type: 15042
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 83
+ num_resource: 1
+ type: 15042
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 84
+ num_resource: 1
+ type: 15042
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 85
+ num_resource: 1
+ type: 15042
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 86
+ num_resource: 1
+ type: 15042
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 87
+ num_resource: 1
+ type: 15042
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 88
+ num_resource: 2
+ type: 15042
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 90
+ num_resource: 1
+ type: 15042
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 91
+ num_resource: 2
+ type: 15042
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 4
+ type: 15043
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 6
+ num_resource: 2
+ type: 15043
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 6
+ num_resource: 0
+ type: 15043
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 0
+ type: 15043
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 1
+ type: 15043
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 9
+ num_resource: 1
+ type: 15043
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 1
+ type: 15043
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 11
+ num_resource: 1
+ type: 15043
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 12
+ num_resource: 1
+ type: 15043
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 1
+ type: 15043
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 14
+ num_resource: 1
+ type: 15043
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15043
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 6
+ type: 15043
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 30
+ num_resource: 3
+ type: 15043
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 33
+ num_resource: 2
+ type: 15043
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 15043
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 36
+ num_resource: 1
+ type: 15043
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 37
+ num_resource: 1
+ type: 15043
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 38
+ num_resource: 1
+ type: 15043
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 39
+ num_resource: 1
+ type: 15043
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 40
+ num_resource: 2
+ type: 15043
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 42
+ num_resource: 1
+ type: 15043
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 43
+ num_resource: 3
+ type: 15043
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 48
+ num_resource: 0
+ type: 15045
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 48
+ num_resource: 2
+ type: 15045
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15047
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 15047
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 5
+ type: 15050
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 7
+ num_resource: 1
+ type: 15050
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 3
+ type: 15051
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 3
+ num_resource: 2
+ type: 15051
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 5
+ num_resource: 3
+ type: 15051
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 3
+ type: 15051
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 11
+ num_resource: 3
+ type: 15051
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 14
+ num_resource: 3
+ type: 15051
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 17
+ num_resource: 3
+ type: 15051
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 20
+ num_resource: 3
+ type: 15051
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 23
+ num_resource: 3
+ type: 15051
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 26
+ num_resource: 3
+ type: 15051
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 29
+ num_resource: 3
+ type: 15051
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 48
+ num_resource: 8
+ type: 15104
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 56
+ num_resource: 4
+ type: 15104
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 60
+ num_resource: 8
+ type: 15104
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 68
+ num_resource: 4
+ type: 15104
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 72
+ num_resource: 4
+ type: 15104
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 76
+ num_resource: 4
+ type: 15104
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 80
+ num_resource: 8
+ type: 15104
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 88
+ num_resource: 4
+ type: 15104
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 92
+ num_resource: 4
+ type: 15104
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15105
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 56320
+ num_resource: 256
+ type: 15106
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15107
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 4
+ type: 15114
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 6
+ num_resource: 2
+ type: 15114
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 6
+ num_resource: 0
+ type: 15114
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 0
+ type: 15114
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 1
+ type: 15114
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 9
+ num_resource: 1
+ type: 15114
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 1
+ type: 15114
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 11
+ num_resource: 1
+ type: 15114
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 12
+ num_resource: 1
+ type: 15114
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 1
+ type: 15114
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 14
+ num_resource: 1
+ type: 15114
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15114
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 6
+ type: 15114
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 30
+ num_resource: 3
+ type: 15114
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 33
+ num_resource: 2
+ type: 15114
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 15114
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 36
+ num_resource: 1
+ type: 15114
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 37
+ num_resource: 1
+ type: 15114
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 38
+ num_resource: 1
+ type: 15114
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 39
+ num_resource: 1
+ type: 15114
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 40
+ num_resource: 2
+ type: 15114
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 42
+ num_resource: 1
+ type: 15114
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 43
+ num_resource: 2
+ type: 15114
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15115
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 15115
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 4
+ type: 15117
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 6
+ num_resource: 2
+ type: 15117
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 6
+ num_resource: 0
+ type: 15117
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 0
+ type: 15117
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 1
+ type: 15117
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 9
+ num_resource: 1
+ type: 15117
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 1
+ type: 15117
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 11
+ num_resource: 1
+ type: 15117
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 12
+ num_resource: 1
+ type: 15117
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 1
+ type: 15117
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 14
+ num_resource: 1
+ type: 15117
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15117
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 6
+ type: 15117
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 30
+ num_resource: 3
+ type: 15117
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 33
+ num_resource: 2
+ type: 15117
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 15117
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 36
+ num_resource: 1
+ type: 15117
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 37
+ num_resource: 1
+ type: 15117
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 38
+ num_resource: 1
+ type: 15117
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 39
+ num_resource: 1
+ type: 15117
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 40
+ num_resource: 2
+ type: 15117
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 42
+ num_resource: 1
+ type: 15117
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 43
+ num_resource: 3
+ type: 15117
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15119
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 15119
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 12
+ num_resource: 20
+ type: 15168
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 36
+ num_resource: 28
+ type: 15168
+ host_id: 5
+ reserved: 0
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 06/21] j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (4 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 05/21] j721e: schema: yaml: Add general schema and J721E board config files Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 07/21] j7200: yaml: Add J7200 board config files Neha Malcom Francis
` (15 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
By providing entries in the binman node of the device tree, binman will
be able to find and package board config artifacts generated by
TIBoardConfig with sysfw.bin and generate the final image sysfw.itb.
It will also pick out the R5 SPL and sign it with the help of TI signing
entry and generate the final tiboot3.bin.
Entries for A72 build have been added to k3-j721e-binman.dtsi to
generate tispl.bin and u-boot.img.
Support has been added for both HS(SR 1.1) and GP images where the
encrypted system firmware binary must be signed along with the signed
certificate binary.
tiboot3.bin and sysfw-j721e_sr1_1-hs.itb: For HS devices
tiboot3.bin_unsigned and sysfw-j721e-gp-evm.itb: For GP devices
<filename>.bin/img: For HS devices
<filename>.bin_unsigned/img_unsigned: For GP devices
Intention of patch is to move signing and packaging to binman,
thus making makefile target only if binman is not enabled.
It is to be noted that the bootflow followed by J721E requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
sysfw.itb:
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OPTEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-j721e-binman.dtsi | 605 ++++++++++++++++++
.../k3-j721e-common-proc-board-u-boot.dtsi | 1 +
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 1 +
arch/arm/mach-k3/config.mk | 4 +
board/ti/j721e/Kconfig | 2 +
scripts/Makefile.spl | 2 +
6 files changed, 615 insertions(+)
create mode 100644 arch/arm/dts/k3-j721e-binman.dtsi
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi
new file mode 100644
index 0000000000..ea97adafa5
--- /dev/null
+++ b/arch/arm/dts/k3-j721e-binman.dtsi
@@ -0,0 +1,605 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_J721E_R5_EVM
+
+&binman {
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure {
+ filename = "spl/u-boot-spl.bin";
+ core = <16>;
+ load = <CONFIG_SPL_TEXT_BASE>;
+ key = "/keys/custMpk.pem";
+ };
+ };
+ ti-fs-cert.bin {
+ filename = "ti-fs-cert.bin";
+ ti-fs-firmware-j721e_sr1_1-hs-cert.bin {
+ filename = "ti-fs-firmware-j721e_sr1_1-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ sysfw {
+ filename = "sysfw.bin";
+ ti-secure {
+ filename = "ti-fs-cert.bin";
+ core = <0>;
+ load = <0x40000>;
+ key = "/keys/custMpk.pem";
+ sysfw-cert;
+ };
+ ti-fs-firmware-j721e_sr1_1-hs-enc.bin {
+ filename = "ti-fs-firmware-j721e_sr1_1-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ itb {
+ filename = "sysfw-j721e_sr1_1-hs.itb";
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "board-cfg.bin";
+ secure;
+ };
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "pm-cfg.bin";
+ secure;
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "rm-cfg.bin";
+ secure;
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "sec-cfg.bin";
+ secure;
+ };
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure {
+ filename = "spl/u-boot-spl.bin";
+ core = <16>;
+ load = <CONFIG_SPL_TEXT_BASE>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ };
+ };
+ ti-fs.bin {
+ filename = "ti-fs.bin";
+ ti-fs-firmware-j721e-gp.bin {
+ filename = "ti-fs-firmware-j721e-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ sysfw_gp {
+ filename = "sysfw.bin_gp";
+ ti-secure {
+ filename = "ti-fs.bin";
+ core = <0>;
+ load = <0x40000>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ };
+ };
+ itb_gp {
+ filename = "sysfw-j721e-gp-evm.itb";
+ symlink = "sysfw.itb";
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin_gp";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "board-cfg.bin";
+ };
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "pm-cfg.bin";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "rm-cfg.bin";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sec-cfg.bin";
+ };
+ };
+ };
+ };
+ };
+};
+#endif
+
+#ifdef CONFIG_TARGET_J721E_A72_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_J721E_EVM_DTB "spl/dts/k3-j721e-common-proc-board.dtb"
+#define SPL_J721E_TPS_DTB "spl/dts/k3-j721e-tps65917-proc-board.dtb"
+#define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define J721E_EVM_DTB "arch/arm/dts/k3-j721e-common-proc-board.dtb"
+#define J721E_TPS_DTB "arch/arm/dts/k3-j721e-tps65917-proc-board.dtb"
+#define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ filename = SPL_NODTB;
+ secure;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_J721E_EVM_DTB;
+ secure;
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721e-tps65917-proc-board";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_J721E_TPS_DTB;
+ secure;
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_J721E_SK_DTB;
+ secure;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j721e-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+
+ conf-1 {
+ description = "k3-j721e-tps65917-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for j721e board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ filename = UBOOT_NODTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = J721E_EVM_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721e-tps65917-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = J721E_TPS_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = J721E_SK_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j721e-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ conf-1 {
+ description = "k3-j721e-tps65917-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_J721E_EVM_DTB;
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_J721E_SK_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j721e-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for j721e board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = J721E_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = J721E_SK_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j721e-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index b2b81f804d..ccd5ac3696 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/net/ti-dp83867.h>
+#include "k3-j721e-binman.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index ab9d6e65d8..999a74bf9d 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -8,6 +8,7 @@
#include "k3-j721e-som-p0.dtsi"
#include "k3-j721e-ddr-evm-lp4-4266.dtsi"
#include "k3-j721e-ddr.dtsi"
+#include "k3-j721e-binman.dtsi"
#include <dt-bindings/phy/phy-cadence.h>
/ {
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index 138b44a3fa..a47e5e7e90 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -72,6 +72,7 @@ endif
# tiboot3.bin is mandated by ROM and ROM only supports R5 boot.
# So restrict tiboot3.bin creation for CPU_V7R.
+ifndef CONFIG_BINMAN
ifdef CONFIG_CPU_V7R
image_check: $(obj)/u-boot-spl.bin FORCE
@if [ $(IMAGE_SIZE) -gt $(MAX_SIZE) ]; then \
@@ -88,6 +89,7 @@ tiboot3.bin: image_check FORCE
INPUTS-y += tiboot3.bin
endif
+endif
ifdef CONFIG_ARM64
@@ -95,6 +97,7 @@ ifeq ($(CONFIG_SOC_K3_J721E),)
export DM := /dev/null
endif
+ifndef CONFIG_BINMAN
ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
SPL_ITS := u-boot-spl-k3_HS.its
$(SPL_ITS): export IS_HS=1
@@ -103,6 +106,7 @@ else
SPL_ITS := u-boot-spl-k3.its
INPUTS-y += tispl.bin
endif
+endif
ifeq ($(CONFIG_SPL_OF_LIST),)
LIST_OF_DTB := $(CONFIG_DEFAULT_DEVICE_TREE)
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index d19d30d59e..03fc2e0b55 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -14,6 +14,7 @@ config TARGET_J721E_A72_EVM
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
config TARGET_J721E_R5_EVM
bool "TI K3 based J721E EVM running on R5"
@@ -24,6 +25,7 @@ config TARGET_J721E_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 15ac87286d..a7811609bf 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -593,6 +593,8 @@ $(obj)/$(SPL_BIN).multidtb.fit.lzo: $(obj)/$(SPL_BIN).multidtb.fit
@lzop -f9 $< > $@
ifdef CONFIG_ARCH_K3
+ifndef CONFIG_BINMAN
tispl.bin: $(obj)/u-boot-spl-nodtb.bin $(SHRUNK_ARCH_DTB) $(SPL_ITS) FORCE
$(call if_changed,mkfitimage)
endif
+endif
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 07/21] j7200: yaml: Add J7200 board config files
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (5 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 06/21] j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 08/21] j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
` (14 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Added YAML config for J7200
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/mach-k3/config.mk | 5 +
board/ti/j721e/config_j7200.yaml | 2467 ++++++++++++++++++++++++++++++
2 files changed, 2472 insertions(+)
create mode 100644 board/ti/j721e/config_j7200.yaml
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index a47e5e7e90..e521fa8686 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -47,7 +47,12 @@ O ?= .
# for J721E
ifdef CONFIG_BINMAN
+ifndef CONFIG_TARGET_J7200_R5_EVM
CONFIG_YAML = $(srctree)/board/ti/$(BOARD)/config.yaml
+else
+CONFIG_YAML = $(srctree)/board/ti/$(BOARD)/config_j7200.yaml
+endif
+
SCHEMA_YAML = $(srctree)/board/ti/common/schema.yaml
board-cfg.bin pm-cfg.bin rm-cfg.bin sec-cfg.bin:
$(PYTHON3) $(srctree)/tools/tibcfg_gen.py -c $(CONFIG_YAML) -s $(SCHEMA_YAML)
diff --git a/board/ti/j721e/config_j7200.yaml b/board/ti/j721e/config_j7200.yaml
new file mode 100644
index 0000000000..4d0002325f
--- /dev/null
+++ b/board/ti/j721e/config_j7200.yaml
@@ -0,0 +1,2467 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for J7200
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x10
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x5A
+ allow_wildcard_unlock : 0x5A
+ allowed_debug_level_rsvd : 0
+ rsvd : 0
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 3
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 5
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 12
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 13
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #5
+ host_id: 35
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #6
+ host_id: 37
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #7
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #8
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #9
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #10
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #11
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #12
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #13
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #14
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #15
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #16
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #17
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #18
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #19
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #20
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #21
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #22
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #23
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #24
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #25
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #26
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #27
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #28
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #29
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #30
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #31
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #32
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 2048
+ reserved : 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 8192
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 32
+ type: 8192
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 24
+ type: 8320
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 24
+ type: 8320
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 8384
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 8384
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 8384
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 8
+ type: 8384
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 16
+ type: 8384
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 16
+ type: 8384
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 48
+ type: 8704
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 8768
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 8768
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 8768
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 8
+ type: 8768
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 13258
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 20480
+ num_resource: 1024
+ type: 13261
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 13322
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 22528
+ num_resource: 1024
+ type: 13325
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 86
+ type: 13386
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 104
+ num_resource: 32
+ type: 13386
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 136
+ num_resource: 16
+ type: 13386
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 152
+ num_resource: 16
+ type: 13386
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 168
+ num_resource: 32
+ type: 13386
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 200
+ num_resource: 24
+ type: 13386
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 224
+ num_resource: 32
+ type: 13386
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 1024
+ type: 13389
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1042
+ num_resource: 512
+ type: 13389
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 1554
+ num_resource: 128
+ type: 13389
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 1682
+ num_resource: 128
+ type: 13389
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 1810
+ num_resource: 256
+ type: 13389
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 2066
+ num_resource: 512
+ type: 13389
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 2578
+ num_resource: 2030
+ type: 13389
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 13440
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13440
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 4
+ type: 13440
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 4
+ type: 13440
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 16
+ type: 13440
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 16
+ type: 13440
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 16
+ type: 13440
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 13504
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 120
+ num_resource: 200
+ type: 13505
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 320
+ num_resource: 40
+ type: 13505
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 360
+ num_resource: 32
+ type: 13505
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 392
+ num_resource: 32
+ type: 13505
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 424
+ num_resource: 256
+ type: 13505
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 680
+ num_resource: 256
+ type: 13505
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 936
+ num_resource: 38
+ type: 13505
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 64
+ num_resource: 4
+ type: 13506
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 68
+ num_resource: 2
+ type: 13506
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 70
+ num_resource: 2
+ type: 13506
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 2
+ type: 13506
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 74
+ num_resource: 2
+ type: 13506
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 76
+ num_resource: 2
+ type: 13506
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 78
+ num_resource: 20
+ type: 13506
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 98
+ num_resource: 4
+ type: 13506
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 102
+ num_resource: 8
+ type: 13506
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 110
+ num_resource: 8
+ type: 13506
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 2
+ type: 13506
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13507
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 2
+ type: 13507
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 2
+ type: 13507
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 13507
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 2
+ type: 13507
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 2
+ type: 13507
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 20
+ type: 13507
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 38
+ num_resource: 4
+ type: 13507
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 42
+ num_resource: 8
+ type: 13507
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 8
+ type: 13507
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 58
+ num_resource: 2
+ type: 13507
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 62
+ num_resource: 0
+ type: 13509
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 62
+ num_resource: 1
+ type: 13509
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 62
+ num_resource: 0
+ type: 13509
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 63
+ num_resource: 1
+ type: 13509
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 60
+ num_resource: 0
+ type: 13510
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 60
+ num_resource: 2
+ type: 13510
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 0
+ type: 13511
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 13511
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 0
+ type: 13511
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 13511
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13512
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 13512
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 13514
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 13514
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 3
+ type: 13515
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 2
+ type: 13515
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 1
+ type: 13515
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 1
+ type: 13515
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 16
+ type: 13515
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 8
+ type: 13515
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 31
+ num_resource: 1
+ type: 13515
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 60
+ num_resource: 8
+ type: 13568
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 68
+ num_resource: 8
+ type: 13568
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 76
+ num_resource: 8
+ type: 13568
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 84
+ num_resource: 66
+ type: 13568
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 13569
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 49152
+ num_resource: 1024
+ type: 13570
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 13571
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13578
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 2
+ type: 13578
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 2
+ type: 13578
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 13578
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 2
+ type: 13578
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 2
+ type: 13578
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 20
+ type: 13578
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 38
+ num_resource: 4
+ type: 13578
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 42
+ num_resource: 8
+ type: 13578
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 8
+ type: 13578
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 58
+ num_resource: 2
+ type: 13578
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 0
+ type: 13579
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 13579
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 0
+ type: 13579
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 13579
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13580
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 13580
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 13581
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 2
+ type: 13581
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 2
+ type: 13581
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 13581
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 2
+ type: 13581
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 2
+ type: 13581
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 20
+ type: 13581
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 38
+ num_resource: 4
+ type: 13581
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 42
+ num_resource: 8
+ type: 13581
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 8
+ type: 13581
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 58
+ num_resource: 2
+ type: 13581
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 0
+ type: 13583
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 13583
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 0
+ type: 13583
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 13583
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 13584
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 13584
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 128
+ type: 13632
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 138
+ num_resource: 54
+ type: 13632
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 196
+ num_resource: 28
+ type: 13632
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 228
+ num_resource: 28
+ type: 13632
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 400
+ num_resource: 4
+ type: 13632
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 404
+ num_resource: 4
+ type: 13632
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 32
+ type: 14922
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 47
+ num_resource: 16
+ type: 14922
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 63
+ num_resource: 64
+ type: 14922
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 127
+ num_resource: 32
+ type: 14922
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 159
+ num_resource: 16
+ type: 14922
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 175
+ num_resource: 16
+ type: 14922
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 191
+ num_resource: 65
+ type: 14922
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 16399
+ num_resource: 128
+ type: 14925
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16527
+ num_resource: 128
+ type: 14925
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 16655
+ num_resource: 256
+ type: 14925
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 16911
+ num_resource: 128
+ type: 14925
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 17039
+ num_resource: 128
+ type: 14925
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 17167
+ num_resource: 128
+ type: 14925
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 17295
+ num_resource: 625
+ type: 14925
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 8
+ type: 14976
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 4
+ type: 14976
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 16
+ type: 14976
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 29
+ num_resource: 16
+ type: 14976
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 45
+ num_resource: 8
+ type: 14976
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 53
+ num_resource: 8
+ type: 14976
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 61
+ num_resource: 3
+ type: 14976
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15040
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 96
+ num_resource: 32
+ type: 15041
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 16
+ type: 15041
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 144
+ num_resource: 32
+ type: 15041
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 176
+ num_resource: 32
+ type: 15041
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 208
+ num_resource: 16
+ type: 15041
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 224
+ num_resource: 16
+ type: 15041
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 240
+ num_resource: 12
+ type: 15041
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 3
+ type: 15042
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 53
+ num_resource: 2
+ type: 15042
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 55
+ num_resource: 2
+ type: 15042
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 57
+ num_resource: 2
+ type: 15042
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 59
+ num_resource: 2
+ type: 15042
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 61
+ num_resource: 2
+ type: 15042
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 63
+ num_resource: 9
+ type: 15042
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 4
+ type: 15042
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 76
+ num_resource: 4
+ type: 15042
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 80
+ num_resource: 4
+ type: 15042
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 84
+ num_resource: 4
+ type: 15042
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 88
+ num_resource: 4
+ type: 15042
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 92
+ num_resource: 1
+ type: 15042
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 3
+ type: 15043
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 2
+ type: 15043
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 2
+ type: 15043
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 2
+ type: 15043
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 2
+ type: 15043
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 2
+ type: 15043
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15043
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 15043
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 15043
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 4
+ type: 15043
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 4
+ type: 15043
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 4
+ type: 15043
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 2
+ type: 15043
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 0
+ type: 15045
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 0
+ type: 15045
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 1
+ type: 15045
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 49
+ num_resource: 1
+ type: 15045
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15047
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15047
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15047
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 1
+ type: 15047
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 15050
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 15050
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 3
+ type: 15051
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 2
+ type: 15051
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 6
+ type: 15051
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 6
+ type: 15051
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 17
+ num_resource: 5
+ type: 15051
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 5
+ type: 15051
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 5
+ type: 15051
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 8
+ type: 15104
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 56
+ num_resource: 4
+ type: 15104
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 60
+ num_resource: 8
+ type: 15104
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 68
+ num_resource: 4
+ type: 15104
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 8
+ type: 15104
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 80
+ num_resource: 4
+ type: 15104
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 84
+ num_resource: 12
+ type: 15104
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15105
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 56320
+ num_resource: 256
+ type: 15106
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15107
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 3
+ type: 15114
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 2
+ type: 15114
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 2
+ type: 15114
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 2
+ type: 15114
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 2
+ type: 15114
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 2
+ type: 15114
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15114
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 15114
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 15114
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 4
+ type: 15114
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 4
+ type: 15114
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 4
+ type: 15114
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 1
+ type: 15114
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15115
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15115
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15115
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 1
+ type: 15115
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 3
+ type: 15117
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 2
+ type: 15117
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 2
+ type: 15117
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 2
+ type: 15117
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 2
+ type: 15117
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 2
+ type: 15117
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15117
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 15117
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 15117
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 4
+ type: 15117
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 4
+ type: 15117
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 4
+ type: 15117
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 2
+ type: 15117
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15119
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15119
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15119
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 1
+ type: 15119
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 20
+ type: 15168
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 28
+ type: 15168
+ host_id: 5
+ reserved: 0
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 08/21] j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (6 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 07/21] j7200: yaml: Add J7200 board config files Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 09/21] am65x: yaml: Add AM65x board config files Neha Malcom Francis
` (13 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Support added for HS and GP boot binaries for J7200.
tiboot3.bin, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, tispl.bin_unsigned and u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed by J7200 requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OPTEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-j7200-binman.dtsi | 377 ++++++++++++++++++
.../k3-j7200-common-proc-board-u-boot.dtsi | 2 +
board/ti/j721e/Kconfig | 2 +
3 files changed, 381 insertions(+)
create mode 100644 arch/arm/dts/k3-j7200-binman.dtsi
diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi
new file mode 100644
index 0000000000..0fdddfa3ce
--- /dev/null
+++ b/arch/arm/dts/k3-j7200-binman.dtsi
@@ -0,0 +1,377 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_J7200_R5_EVM
+
+&binman {
+ ti-fs-cert {
+ filename = "ti-fs-cert.bin";
+ ti-fs-firmware-j7200-hs-cert.bin {
+ filename = "ti-fs-firmware-j7200-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ ti-fs-enc {
+ filename = "ti-fs-enc.bin";
+ ti-fs-firmware-j7200-hs-enc.bin {
+ filename = "ti-fs-firmware-j7200-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure {
+ combined;
+ split-dm;
+ filename = "spl/u-boot-spl.bin";
+ load = <0x41c00000>;
+ sysfw-filename = "ti-fs-enc.bin";
+ sysfw-load = <0x40000>;
+ sysfw-inner-cert = "ti-fs-cert.bin";
+ sysfw-data-filename = "combined-tifs-cfg.bin";
+ sysfw-data-load = <0x7f000>;
+ dm-data-filename = "combined-dm-cfg.bin";
+ dm-data-load = <0x41c80000>;
+ key = "/keys/custMpk.pem";
+ sw-rev = <1>;
+ };
+ };
+};
+
+&binman {
+ ti-fs-gp {
+ filename = "ti-fs-gp.bin";
+ ti-fs-firmware-j7200-gp.bin {
+ filename = "ti-fs-firmware-j7200-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure {
+ combined;
+ split-dm;
+ filename = "spl/u-boot-spl.bin";
+ load = <0x41c00000>;
+ sysfw-filename = "ti-fs-gp.bin";
+ sysfw-load = <0x40000>;
+ sysfw-data-filename = "combined-tifs-cfg.bin";
+ sysfw-data-load = <0x7f000>;
+ dm-data-filename = "combined-dm-cfg.bin";
+ dm-data-load = <0x41c80000>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ };
+ };
+};
+
+#endif
+
+#ifdef CONFIG_TARGET_J7200_A72_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_J7200_EVM_DTB "spl/dts/k3-j7200-common-proc-board.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define J7200_EVM_DTB "arch/arm/dts/k3-j7200-common-proc-board.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ filename = SPL_NODTB;
+ secure;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j7200-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_J7200_EVM_DTB;
+ secure;
+ };
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j7200-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for J7200 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ filename = UBOOT_NODTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j7200-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = J7200_EVM_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j7200-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j7200-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_J7200_EVM_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j7200-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for J7200 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j7200-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = J7200_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j7200-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
index ce52ffcf96..6ebeed2386 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include "k3-j7200-binman.dtsi"
+
/ {
chosen {
stdout-path = "serial2:115200n8";
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index 03fc2e0b55..5255099efd 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -36,6 +36,7 @@ config TARGET_J7200_A72_EVM
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
config TARGET_J7200_R5_EVM
bool "TI K3 based J7200 EVM running on R5"
@@ -46,6 +47,7 @@ config TARGET_J7200_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 09/21] am65x: yaml: Add AM65x board config files
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (7 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 08/21] j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 10/21] am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
` (12 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Added YAML config for AM65x
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/am65x/config.yaml | 2469 ++++++++++++++++++++++++++++++++++++
1 file changed, 2469 insertions(+)
create mode 100644 board/ti/am65x/config.yaml
diff --git a/board/ti/am65x/config.yaml b/board/ti/am65x/config.yaml
new file mode 100644
index 0000000000..d02826f226
--- /dev/null
+++ b/board/ti/am65x/config.yaml
@@ -0,0 +1,2469 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM65x
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x10
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x5A
+ allow_wildcard_unlock : 0x5A
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 5
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 13
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #5
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #6
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #7
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #8
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #9
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #10
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #11
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #12
+ host_id: 5
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #13
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #14
+ host_id: 13
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #15
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #16
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #17
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #18
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #19
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #20
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #21
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #22
+ host_id: 5
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #23
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #24
+ host_id: 13
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #25
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #26
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #27
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #28
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #29
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #30
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #31
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #32
+ host_id: 5
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 2080
+ reserved : 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 192
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 4
+ type: 192
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 192
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 192
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 8
+ type: 192
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 9664
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 9664
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 32
+ type: 9664
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 24
+ type: 9728
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 24
+ type: 9728
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 24
+ type: 9728
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 20
+ type: 16384
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 16384
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 16384
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 16384
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 16384
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 20800
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 20800
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 16
+ type: 20800
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 8
+ type: 20800
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 21888
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 21888
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 4
+ type: 21888
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 4
+ type: 21888
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 4
+ type: 21888
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 80
+ type: 24138
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 96
+ num_resource: 30
+ type: 24138
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 126
+ num_resource: 50
+ type: 24138
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 126
+ num_resource: 50
+ type: 24138
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 176
+ num_resource: 50
+ type: 24138
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 226
+ num_resource: 30
+ type: 24138
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 1024
+ type: 24141
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1040
+ num_resource: 512
+ type: 24141
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 1552
+ num_resource: 512
+ type: 24141
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 1552
+ num_resource: 512
+ type: 24141
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 2064
+ num_resource: 512
+ type: 24141
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 2576
+ num_resource: 2032
+ type: 24141
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 24586
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 20480
+ num_resource: 1024
+ type: 24589
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 24650
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 22528
+ num_resource: 1024
+ type: 24653
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 64
+ type: 24704
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 80
+ num_resource: 40
+ type: 24704
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 120
+ num_resource: 4
+ type: 24704
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 120
+ num_resource: 4
+ type: 24704
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 124
+ num_resource: 4
+ type: 24704
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 24
+ type: 24704
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 12
+ type: 24896
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 4
+ type: 24896
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 17
+ num_resource: 16
+ type: 24896
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 17
+ num_resource: 16
+ type: 24896
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 33
+ num_resource: 16
+ type: 24896
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 49
+ num_resource: 15
+ type: 24896
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 25024
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 304
+ num_resource: 100
+ type: 25025
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 404
+ num_resource: 50
+ type: 25025
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 454
+ num_resource: 256
+ type: 25025
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 454
+ num_resource: 256
+ type: 25025
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 710
+ num_resource: 32
+ type: 25025
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 742
+ num_resource: 26
+ type: 25025
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 160
+ num_resource: 12
+ type: 25026
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 172
+ num_resource: 4
+ type: 25026
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 172
+ num_resource: 4
+ type: 25026
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 172
+ num_resource: 0
+ type: 25026
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 176
+ num_resource: 2
+ type: 25026
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 178
+ num_resource: 52
+ type: 25026
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 230
+ num_resource: 8
+ type: 25026
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 238
+ num_resource: 32
+ type: 25026
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 238
+ num_resource: 32
+ type: 25026
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 270
+ num_resource: 14
+ type: 25026
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 284
+ num_resource: 18
+ type: 25026
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 12
+ type: 25027
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 25027
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 25027
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 0
+ type: 25027
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 25027
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 38
+ type: 25027
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 64
+ num_resource: 8
+ type: 25027
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 32
+ type: 25027
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 32
+ type: 25027
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 104
+ num_resource: 14
+ type: 25027
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 2
+ type: 25027
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 120
+ num_resource: 4
+ type: 25028
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 124
+ num_resource: 4
+ type: 25028
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 12
+ type: 25028
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 12
+ type: 25028
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 140
+ num_resource: 12
+ type: 25028
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 154
+ num_resource: 0
+ type: 25029
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 154
+ num_resource: 0
+ type: 25029
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 154
+ num_resource: 0
+ type: 25029
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 154
+ num_resource: 0
+ type: 25029
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 154
+ num_resource: 2
+ type: 25029
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 156
+ num_resource: 2
+ type: 25029
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 156
+ num_resource: 2
+ type: 25029
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 158
+ num_resource: 2
+ type: 25029
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 0
+ type: 25031
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 0
+ type: 25031
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 0
+ type: 25031
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 0
+ type: 25031
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 3
+ type: 25031
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 2
+ type: 25031
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 2
+ type: 25031
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 2
+ type: 25031
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 25034
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 25034
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 25035
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 25035
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 25035
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 25035
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 8
+ type: 25035
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 150
+ num_resource: 64
+ type: 25088
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 214
+ num_resource: 8
+ type: 25088
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 222
+ num_resource: 64
+ type: 25088
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 222
+ num_resource: 64
+ type: 25088
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 286
+ num_resource: 8
+ type: 25088
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 294
+ num_resource: 6
+ type: 25088
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 25089
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 49152
+ num_resource: 1024
+ type: 25090
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 25091
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 12
+ type: 25098
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 25098
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 25098
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 0
+ type: 25098
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 25098
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 52
+ type: 25098
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 78
+ num_resource: 8
+ type: 25098
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 86
+ num_resource: 32
+ type: 25098
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 86
+ num_resource: 32
+ type: 25098
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 14
+ type: 25098
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 132
+ num_resource: 18
+ type: 25098
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 0
+ type: 25099
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 0
+ type: 25099
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 0
+ type: 25099
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 0
+ type: 25099
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 25099
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 2
+ type: 25099
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 2
+ type: 25099
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 2
+ type: 25099
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 12
+ type: 25101
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 25101
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 25101
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 0
+ type: 25101
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 25101
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 38
+ type: 25101
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 64
+ num_resource: 8
+ type: 25101
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 32
+ type: 25101
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 32
+ type: 25101
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 104
+ num_resource: 14
+ type: 25101
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 2
+ type: 25101
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 120
+ num_resource: 4
+ type: 25102
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 124
+ num_resource: 4
+ type: 25102
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 12
+ type: 25102
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 12
+ type: 25102
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 140
+ num_resource: 12
+ type: 25102
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 0
+ type: 25103
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 0
+ type: 25103
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 0
+ type: 25103
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 0
+ type: 25103
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 3
+ type: 25103
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 2
+ type: 25103
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 2
+ type: 25103
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 2
+ type: 25103
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 80
+ type: 25162
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 88
+ num_resource: 30
+ type: 25162
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 50
+ type: 25162
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 50
+ type: 25162
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 168
+ num_resource: 50
+ type: 25162
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 218
+ num_resource: 38
+ type: 25162
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 16392
+ num_resource: 512
+ type: 25165
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16904
+ num_resource: 128
+ type: 25165
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 17032
+ num_resource: 256
+ type: 25165
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 17032
+ num_resource: 256
+ type: 25165
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 17288
+ num_resource: 256
+ type: 25165
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 17544
+ num_resource: 376
+ type: 25165
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 28
+ type: 25600
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 28
+ type: 25600
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 28
+ type: 25600
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 25664
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 4
+ type: 25664
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 24
+ type: 25664
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 24
+ type: 25664
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 24
+ type: 25664
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 16
+ type: 25856
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 64
+ num_resource: 4
+ type: 25856
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 68
+ num_resource: 16
+ type: 25856
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 68
+ num_resource: 16
+ type: 25856
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 84
+ num_resource: 8
+ type: 25856
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 92
+ num_resource: 4
+ type: 25856
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 25857
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 56320
+ num_resource: 256
+ type: 25858
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 25859
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 25866
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 25866
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 25866
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 25866
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 2
+ type: 25866
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 12
+ type: 25866
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 4
+ type: 25866
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 10
+ type: 25866
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 10
+ type: 25866
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 12
+ type: 25866
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 25867
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 25867
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 25867
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 25867
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 25869
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 25869
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 25869
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 25869
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 2
+ type: 25869
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 12
+ type: 25869
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 4
+ type: 25869
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 10
+ type: 25869
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 10
+ type: 25869
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 12
+ type: 25869
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 25871
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 25871
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 25871
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 25871
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 25920
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 96
+ num_resource: 32
+ type: 25921
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 8
+ type: 25921
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 136
+ num_resource: 60
+ type: 25921
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 136
+ num_resource: 60
+ type: 25921
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 196
+ num_resource: 60
+ type: 25921
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 2
+ type: 25922
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 4
+ type: 25922
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 4
+ type: 25922
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 0
+ type: 25922
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 56
+ num_resource: 2
+ type: 25922
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 58
+ num_resource: 12
+ type: 25922
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 70
+ num_resource: 4
+ type: 25922
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 74
+ num_resource: 10
+ type: 25922
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 74
+ num_resource: 10
+ type: 25922
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 84
+ num_resource: 12
+ type: 25922
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 25923
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 25923
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 25923
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 25923
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 2
+ type: 25923
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 12
+ type: 25923
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 4
+ type: 25923
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 10
+ type: 25923
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 10
+ type: 25923
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 12
+ type: 25923
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 0
+ type: 25925
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 2
+ type: 25925
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 0
+ type: 25925
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 2
+ type: 25925
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 25927
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 25927
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 25927
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 25927
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 25930
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 25930
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 25931
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 25931
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 25931
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 25931
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 8
+ type: 25931
+ host_id: 128
+ reserved: 0
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 10/21] am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (8 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 09/21] am65x: yaml: Add AM65x board config files Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 11/21] config: am64x: Add board config for AM64x Neha Malcom Francis
` (11 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Support added for HS and GP boot binaries for AM65x.
tiboot3.bin, sysfw.itb, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, sysfw.itb, tispl.bin_unsigned,
u-boot.img_unsigned: For GP devices
Note that the bootflow followed by AM65x requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
sysfw.itb:
* sysfw
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* ATF
* OPTEE
* A53 SPL
* A53 SPL dtbs
u-boot.img:
* A53 U-Boot
* A53 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 1 +
.../dts/k3-am654-r5-base-board-u-boot.dtsi | 1 +
arch/arm/dts/k3-am65x-binman.dtsi | 482 ++++++++++++++++++
board/ti/am65x/Kconfig | 2 +
4 files changed, 486 insertions(+)
create mode 100644 arch/arm/dts/k3-am65x-binman.dtsi
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 0c1305df7e..e4cbc47c2a 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -4,6 +4,7 @@
*/
#include "k3-am654-r5-base-board-u-boot.dtsi"
+#include "k3-am65x-binman.dtsi"
&pru0_0 {
remoteproc-name = "pru0_0";
diff --git a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
index 1d0659ea8f..de45a6a67a 100644
--- a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/net/ti-dp83867.h>
+#include "k3-am65x-binman.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/k3-am65x-binman.dtsi b/arch/arm/dts/k3-am65x-binman.dtsi
new file mode 100644
index 0000000000..68c5e10a60
--- /dev/null
+++ b/arch/arm/dts/k3-am65x-binman.dtsi
@@ -0,0 +1,482 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_AM654_R5_EVM
+
+&binman {
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure {
+ filename = "spl/u-boot-spl.bin";
+ core = <16>;
+ load = <CONFIG_SPL_TEXT_BASE>;
+ key = "/keys/custMpk.pem";
+ };
+ };
+ ti-sci-cert.bin {
+ filename = "ti-sci-cert.bin";
+ ti-sci-firmware-am65x-hs-cert.bin {
+ filename = "ti-sci-firmware-am65x-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ sysfw {
+ filename = "sysfw.bin";
+ ti-secure {
+ filename = "ti-sci-cert.bin";
+ core = <0>;
+ load = <0x40000>;
+ key = "/keys/custMpk.pem";
+ sysfw-cert;
+ };
+ ti-sci-firmware-am65x-hs-enc.bin {
+ filename = "ti-sci-firmware-am65x-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ itb {
+ filename = "sysfw-am65x-hs.itb";
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "board-cfg.bin";
+ secure;
+ };
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "pm-cfg.bin";
+ secure;
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "rm-cfg.bin";
+ secure;
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "sec-cfg.bin";
+ secure;
+ };
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure {
+ filename = "spl/u-boot-spl.bin";
+ core = <16>;
+ load = <CONFIG_SPL_TEXT_BASE>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ };
+ };
+ ti-sci.bin {
+ filename = "ti-sci.bin";
+ ti-sci-firmware-am65x-gp.bin {
+ filename = "ti-sci-firmware-am65x-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ sysfw_gp {
+ filename = "sysfw.bin_gp";
+ ti-secure {
+ filename = "ti-sci.bin";
+ core = <0>;
+ load = <0x40000>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ };
+ };
+ itb_gp {
+ filename = "sysfw-am65x-gp-evm.itb";
+ symlink = "sysfw.itb";
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin_gp";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "board-cfg.bin";
+ };
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "pm-cfg.bin";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "rm-cfg.bin";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sec-cfg.bin";
+ };
+ };
+ };
+ };
+ };
+};
+#endif
+
+#ifdef CONFIG_TARGET_AM654_A53_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_AM654_EVM_DTB "spl/dts/k3-am654-base-board.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define AM654_EVM_DTB "arch/arm/dts/k3-am654-base-board.dtb"
+
+&binman {
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "/dev/null";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ filename = SPL_NODTB;
+ secure;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am654-base-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_AM654_EVM_DTB;
+ secure;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am654-base-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM65 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ filename = UBOOT_NODTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am654-base-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = AM654_EVM_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am654-base-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "/dev/null";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_AM654_EVM_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am654-base-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM65 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am654-base-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM654_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am654-base-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig
index 4765b13ba0..262a8e5ddb 100644
--- a/board/ti/am65x/Kconfig
+++ b/board/ti/am65x/Kconfig
@@ -13,6 +13,7 @@ config TARGET_AM654_A53_EVM
select SOC_K3_AM654
select SYS_DISABLE_DCACHE_OPS
select BOARD_LATE_INIT
+ select BINMAN
imply TI_I2C_BOARD_DETECT
config TARGET_AM654_R5_EVM
@@ -22,6 +23,7 @@ config TARGET_AM654_R5_EVM
select SOC_K3_AM654
select K3_LOAD_SYSFW
select K3_AM654_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 11/21] config: am64x: Add board config for AM64x
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (9 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 10/21] am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 12/21] am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img Neha Malcom Francis
` (10 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Added YAML config for AM64xx
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/am64x/config.yaml | 1805 ++++++++++++++++++++++++++++++++++++
1 file changed, 1805 insertions(+)
create mode 100644 board/ti/am64x/config.yaml
diff --git a/board/ti/am64x/config.yaml b/board/ti/am64x/config.yaml
new file mode 100644
index 0000000000..58a0b1ed16
--- /dev/null
+++ b/board/ti/am64x/config.yaml
@@ -0,0 +1,1805 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM64x
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x5A
+ allow_wildcard_unlock : 0x5A
+ allowed_debug_level_rsvd : 0
+ rsvd : 0
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 30
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 36
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 38
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #5
+ host_id: 41
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #6
+ host_id: 43
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #7
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #8
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #9
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #10
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #11
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #12
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #13
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #14
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #15
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #16
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #17
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #18
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #19
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #20
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #21
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #22
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #23
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #24
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #25
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #26
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #27
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #28
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #29
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #30
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #31
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #32
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 1288
+ reserved : 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 64
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 64
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 64
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 64
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 8
+ type: 64
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 192
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 192
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 2
+ type: 192
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 320
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 320
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 41
+ type: 384
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 50176
+ num_resource: 136
+ type: 1666
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 1667
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 1677
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 1677
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 1677
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 2
+ type: 1677
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 1677
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 1677
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 1
+ type: 1677
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 1
+ type: 1677
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 6
+ type: 1678
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 6
+ type: 1678
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 6
+ type: 1678
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 60
+ num_resource: 2
+ type: 1678
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 62
+ num_resource: 4
+ type: 1678
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 66
+ num_resource: 2
+ type: 1678
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 6
+ type: 1679
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 6
+ type: 1679
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 6
+ type: 1679
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 2
+ type: 1679
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 42
+ num_resource: 4
+ type: 1679
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 46
+ num_resource: 2
+ type: 1679
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 1696
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 1696
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 1696
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 2
+ type: 1696
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 1696
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 1696
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 1
+ type: 1696
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 1
+ type: 1696
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 6
+ type: 1697
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 6
+ type: 1697
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 6
+ type: 1697
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 1697
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 4
+ type: 1697
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 2
+ type: 1697
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 6
+ type: 1698
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 6
+ type: 1698
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 6
+ type: 1698
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 1698
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 4
+ type: 1698
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 2
+ type: 1698
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 36
+ type: 1802
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 14
+ type: 1802
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 14
+ type: 1802
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 58
+ num_resource: 14
+ type: 1802
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 92
+ num_resource: 14
+ type: 1802
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 106
+ num_resource: 14
+ type: 1802
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 168
+ num_resource: 16
+ type: 1802
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 512
+ type: 1805
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 527
+ num_resource: 256
+ type: 1805
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 527
+ num_resource: 256
+ type: 1805
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 783
+ num_resource: 192
+ type: 1805
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 975
+ num_resource: 256
+ type: 1805
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 1231
+ num_resource: 192
+ type: 1805
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 1423
+ num_resource: 96
+ type: 1805
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 1519
+ num_resource: 17
+ type: 1805
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1024
+ type: 1807
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4096
+ num_resource: 42
+ type: 1808
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4608
+ num_resource: 112
+ type: 1809
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5120
+ num_resource: 29
+ type: 1810
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5632
+ num_resource: 176
+ type: 1811
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 6144
+ num_resource: 176
+ type: 1812
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 6656
+ num_resource: 176
+ type: 1813
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8192
+ num_resource: 28
+ type: 1814
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8704
+ num_resource: 28
+ type: 1815
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 9216
+ num_resource: 28
+ type: 1816
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 9728
+ num_resource: 20
+ type: 1817
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 10240
+ num_resource: 20
+ type: 1818
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 10752
+ num_resource: 20
+ type: 1819
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 11264
+ num_resource: 20
+ type: 1820
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 11776
+ num_resource: 20
+ type: 1821
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 12288
+ num_resource: 20
+ type: 1822
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 1923
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 1936
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 3
+ type: 1936
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 3
+ type: 1936
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 2
+ type: 1936
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 4
+ type: 1936
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 2
+ type: 1936
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 1
+ type: 1936
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 64
+ type: 1937
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 64
+ type: 1937
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 88
+ num_resource: 8
+ type: 1939
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 96
+ num_resource: 8
+ type: 1940
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 104
+ num_resource: 8
+ type: 1941
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 112
+ num_resource: 4
+ type: 1942
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 116
+ num_resource: 3
+ type: 1942
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 116
+ num_resource: 3
+ type: 1942
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 119
+ num_resource: 2
+ type: 1942
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 121
+ num_resource: 4
+ type: 1942
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 125
+ num_resource: 2
+ type: 1942
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 127
+ num_resource: 1
+ type: 1942
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 16
+ type: 1943
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 16
+ type: 1943
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 144
+ num_resource: 8
+ type: 1945
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 152
+ num_resource: 8
+ type: 1946
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 152
+ num_resource: 8
+ type: 1947
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 160
+ num_resource: 64
+ type: 1948
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 224
+ num_resource: 64
+ type: 1949
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 1955
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 3
+ type: 1955
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 3
+ type: 1955
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 2
+ type: 1955
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 4
+ type: 1955
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 2
+ type: 1955
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 1
+ type: 1955
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 1956
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 1956
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 25
+ num_resource: 1
+ type: 1958
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 8
+ type: 1959
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 8
+ type: 1960
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 1961
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 3
+ type: 1961
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 3
+ type: 1961
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 2
+ type: 1961
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 4
+ type: 1961
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 2
+ type: 1961
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 1
+ type: 1961
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 1962
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 3
+ type: 1962
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 3
+ type: 1962
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 2
+ type: 1962
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 4
+ type: 1962
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 2
+ type: 1962
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 1
+ type: 1962
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 1
+ type: 1963
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 1
+ type: 1963
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 16
+ type: 1964
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 16
+ type: 1964
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 8
+ type: 1966
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 8
+ type: 1968
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 1969
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 8
+ type: 1970
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 1
+ type: 1971
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 8
+ type: 1972
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 21
+ num_resource: 4
+ type: 1973
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 64
+ type: 1974
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 25
+ num_resource: 4
+ type: 1975
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 112
+ num_resource: 64
+ type: 1976
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 2112
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 2122
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 2
+ type: 2124
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 2
+ type: 2124
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 2
+ type: 2124
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 2124
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 2
+ type: 2124
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 2124
+ host_id: 128
+ reserved: 0
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 12/21] am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (10 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 11/21] config: am64x: Add board config for AM64x Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 13/21] Makefile: Add DM, SYSFW_PATH, SYSFW_HS_INNER_CERT_PATH to BINMAN_INDIRS Neha Malcom Francis
` (9 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Support added for HS and GP boot binaries for AM64x.
tiboot3.bin, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, tispl.bin_unsigned, u-boot.img_unsigned: For GP
devices
Note that the bootflow followed by AM64x requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* sysfw
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* ATF
* OPTEE
* A53 SPL
* A53 SPL dtbs
u-boot.img:
* A53 U-Boot
* A53 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 2 +
arch/arm/dts/k3-am642-r5-evm.dts | 1 +
arch/arm/dts/k3-am64x-binman.dtsi | 440 ++++++++++++++++++++++++++
board/ti/am64x/Kconfig | 2 +
4 files changed, 445 insertions(+)
create mode 100644 arch/arm/dts/k3-am64x-binman.dtsi
diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
index 055215cff8..2d821676f2 100644
--- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include "k3-am64x-binman.dtsi"
+
/ {
chosen {
stdout-path = "serial2:115200n8";
diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts
index 92a6bfdc01..5a578255a9 100644
--- a/arch/arm/dts/k3-am642-r5-evm.dts
+++ b/arch/arm/dts/k3-am642-r5-evm.dts
@@ -8,6 +8,7 @@
#include "k3-am642.dtsi"
#include "k3-am64-evm-ddr4-1600MTs.dtsi"
#include "k3-am64-ddr.dtsi"
+#include "k3-am64x-binman.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/k3-am64x-binman.dtsi b/arch/arm/dts/k3-am64x-binman.dtsi
new file mode 100644
index 0000000000..96bf96c78e
--- /dev/null
+++ b/arch/arm/dts/k3-am64x-binman.dtsi
@@ -0,0 +1,440 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+
+#include <config.h>
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_AM642_R5_EVM
+
+&binman {
+ ti-sci-cert {
+ filename = "ti-sci-cert.bin";
+ ti-sci-firmware-am64x_sr2-hs-cert.bin {
+ filename = "ti-sci-firmware-am64x_sr2-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ ti-sci-enc {
+ filename = "ti-sci-enc.bin";
+ ti-sci-firmware-am64x_sr2-hs-enc.bin {
+ filename = "ti-sci-firmware-am64x_sr2-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure {
+ combined;
+ filename = "spl/u-boot-spl.bin";
+ load = <0x70000000>;
+ sysfw-filename = "ti-sci-enc.bin";
+ sysfw-load = <0x44000>;
+ sysfw-inner-cert = "ti-sci-cert.bin";
+ sysfw-data-filename = "combined-sysfw-cfg.bin";
+ sysfw-data-load = <0x7b000>;
+ key = "/keys/custMpk.pem";
+ swrev = <1>;
+ };
+ };
+};
+
+&binman {
+ ti-sci-gp {
+ filename = "ti-sci-gp.bin";
+ ti-sci-firmware-am64x-gp.bin {
+ filename = "ti-sci-firmware-am64x-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure {
+ combined;
+ filename = "spl/u-boot-spl.bin";
+ load = <0x70000000>;
+ sysfw-filename = "ti-sci-gp.bin";
+ sysfw-load = <0x44000>;
+ sysfw-data-filename = "combined-sysfw-cfg.bin";
+ sysfw-data-load = <0x7b000>;
+ swrev = <CONFIG_K3_X509_SWRV>;
+ };
+ };
+};
+
+#endif
+
+#ifdef CONFIG_TARGET_AM642_A53_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_AM642_EVM_DTB "spl/dts/k3-am642-evm.dtb"
+#define SPL_AM642_SK_DTB "spl/dts/k3-am642-sk.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define AM642_EVM_DTB "arch/arm/dts/k3-am642-evm.dtb"
+#define AM642_SK_DTB "arch/arm/dts/k3-am642-sk.dtb"
+
+&binman {
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "/dev/null";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ filename = SPL_NODTB;
+ secure;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am642-evm";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_AM642_EVM_DTB;
+ secure;
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am642-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_AM642_SK_DTB;
+ secure;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am642-evm";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+
+ conf-1 {
+ description = "k3-am642-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM64 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ filename = UBOOT_NODTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am642-evm";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = AM642_EVM_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am642-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = AM642_SK_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am642-evm";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ conf-1 {
+ description = "k3-am642-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "/dev/null";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am642-evm";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_AM642_EVM_DTB;
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am642-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_AM642_SK_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am642-evm";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+
+ conf-1 {
+ description = "k3-am642-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM64 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am642-evm";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM642_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-2 {
+ description = "k3-am642-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM642_SK_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am642-evm";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+
+ conf-2 {
+ description = "k3-am642-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/board/ti/am64x/Kconfig b/board/ti/am64x/Kconfig
index 8036947e34..001a89f061 100644
--- a/board/ti/am64x/Kconfig
+++ b/board/ti/am64x/Kconfig
@@ -10,6 +10,7 @@ config TARGET_AM642_A53_EVM
bool "TI K3 based AM642 EVM running on A53"
select ARM64
select SOC_K3_AM642
+ select BINMAN
imply BOARD
imply SPL_BOARD
imply TI_I2C_BOARD_DETECT
@@ -23,6 +24,7 @@ config TARGET_AM642_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 13/21] Makefile: Add DM, SYSFW_PATH, SYSFW_HS_INNER_CERT_PATH to BINMAN_INDIRS
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (11 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 12/21] am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 19:46 ` Simon Glass
2023-01-20 10:18 ` [PATCH 14/21] j721s2: yaml: Add board config for J721S2 Neha Malcom Francis
` (8 subsequent siblings)
21 siblings, 1 reply; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
To remain consistent with the build commands utilised for K3 devices,
we add the paths where component binaries are located to BINMAN_INDIRS.
Adding SYSFW_PATH for system firmware binaries, SYSFW_HS_INNER_CERT_PATH
for HS device certificate and DM for Device Manager firmware.
This way, the existing build command does not change even though we
migrate to using binman.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
Makefile | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/Makefile b/Makefile
index c568a6e59a..218cb675fc 100644
--- a/Makefile
+++ b/Makefile
@@ -1317,6 +1317,22 @@ u-boot.ldr: u-boot
# Use 'make BINMAN_VERBOSE=3' to set vebosity level
default_dt := $(if $(DEVICE_TREE),$(DEVICE_TREE),$(CONFIG_DEFAULT_DEVICE_TREE))
+ifneq ($(SYSFW_PATH),)
+override BINMAN_INDIRS += $(dir $(SYSFW_PATH))
+endif
+
+ifneq ($(SYSFW_HS_PATH),)
+override BINMAN_INDIRS += $(dir $(SYSFW_HS_PATH))
+endif
+
+ifneq ($(SYSFW_HS_INNER_CERT_PATH),)
+override BINMAN_INDIRS += $(dir $(SYSFW_HS_INNER_CERT_PATH))
+endif
+
+ifneq ($(DM),)
+override BINMAN_INDIRS += $(dir $(DM))
+endif
+
quiet_cmd_binman = BINMAN $@
cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
$(foreach f,$(BINMAN_TOOLPATHS),--toolpath $(f)) \
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH 13/21] Makefile: Add DM, SYSFW_PATH, SYSFW_HS_INNER_CERT_PATH to BINMAN_INDIRS
2023-01-20 10:18 ` [PATCH 13/21] Makefile: Add DM, SYSFW_PATH, SYSFW_HS_INNER_CERT_PATH to BINMAN_INDIRS Neha Malcom Francis
@ 2023-01-20 19:46 ` Simon Glass
0 siblings, 0 replies; 31+ messages in thread
From: Simon Glass @ 2023-01-20 19:46 UTC (permalink / raw)
To: Neha Malcom Francis
Cc: u-boot, trini, afd, vigneshr, rogerq, alpernebiyasak, nm, bb
Hi Neha,
On Fri, 20 Jan 2023 at 03:19, Neha Malcom Francis <n-francis@ti.com> wrote:
>
> To remain consistent with the build commands utilised for K3 devices,
> we add the paths where component binaries are located to BINMAN_INDIRS.
> Adding SYSFW_PATH for system firmware binaries, SYSFW_HS_INNER_CERT_PATH
> for HS device certificate and DM for Device Manager firmware.
> This way, the existing build command does not change even though we
> migrate to using binman.
>
> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> ---
> Makefile | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/Makefile b/Makefile
> index c568a6e59a..218cb675fc 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -1317,6 +1317,22 @@ u-boot.ldr: u-boot
> # Use 'make BINMAN_VERBOSE=3' to set vebosity level
> default_dt := $(if $(DEVICE_TREE),$(DEVICE_TREE),$(CONFIG_DEFAULT_DEVICE_TREE))
>
> +ifneq ($(SYSFW_PATH),)
> +override BINMAN_INDIRS += $(dir $(SYSFW_PATH))
> +endif
> +
> +ifneq ($(SYSFW_HS_PATH),)
> +override BINMAN_INDIRS += $(dir $(SYSFW_HS_PATH))
> +endif
> +
> +ifneq ($(SYSFW_HS_INNER_CERT_PATH),)
> +override BINMAN_INDIRS += $(dir $(SYSFW_HS_INNER_CERT_PATH))
> +endif
> +
> +ifneq ($(DM),)
> +override BINMAN_INDIRS += $(dir $(DM))
> +endif
> +
> quiet_cmd_binman = BINMAN $@
> cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
> $(foreach f,$(BINMAN_TOOLPATHS),--toolpath $(f)) \
> --
> 2.34.1
>
Let's try to do this another way as it needs to use a bintool for the
tool that you run. See my other comments.
Regards,
Simon
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 14/21] j721s2: yaml: Add board config for J721S2
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (12 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 13/21] Makefile: Add DM, SYSFW_PATH, SYSFW_HS_INNER_CERT_PATH to BINMAN_INDIRS Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 15/21] j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
` (7 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Added YAML config for J721S2
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/j721s2/config.yaml | 3303 +++++++++++++++++++++++++++++++++++
1 file changed, 3303 insertions(+)
create mode 100644 board/ti/j721s2/config.yaml
diff --git a/board/ti/j721s2/config.yaml b/board/ti/j721s2/config.yaml
new file mode 100644
index 0000000000..eb2031f307
--- /dev/null
+++ b/board/ti/j721s2/config.yaml
@@ -0,0 +1,3303 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for J721S2
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x0
+ allow_wildcard_unlock : 0x0
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 5
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 13
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #5
+ host_id: 21
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #6
+ host_id: 23
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #7
+ host_id: 35
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #8
+ host_id: 37
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #9
+ host_id: 40
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #10
+ host_id: 42
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #11
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #12
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #13
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #14
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #15
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #16
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #17
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #18
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #19
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #20
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #21
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #22
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #23
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #24
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #25
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #26
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #27
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #28
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #29
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #30
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #31
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #32
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 3032
+ reserved : 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 18496
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 24
+ type: 18496
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 24
+ type: 18560
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 16
+ type: 18560
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 48
+ type: 18688
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 18752
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 18752
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 6
+ type: 18752
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 6
+ type: 18752
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 2
+ type: 18752
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 2
+ type: 18752
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 20992
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 20992
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 4
+ type: 20992
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 4
+ type: 20992
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 20992
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 8
+ type: 20992
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 12
+ type: 20992
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 12
+ type: 20992
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 21504
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 50176
+ num_resource: 96
+ type: 35138
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 35139
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 16
+ type: 35150
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 16
+ type: 35150
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 35151
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 35151
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 35169
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 16
+ type: 35169
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 35170
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 35170
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 100
+ type: 35264
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 110
+ num_resource: 32
+ type: 35264
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 142
+ num_resource: 21
+ type: 35264
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 163
+ num_resource: 21
+ type: 35264
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 196
+ num_resource: 28
+ type: 35264
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 228
+ num_resource: 28
+ type: 35264
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 260
+ num_resource: 28
+ type: 35264
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 292
+ num_resource: 28
+ type: 35264
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 400
+ num_resource: 4
+ type: 35264
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 404
+ num_resource: 4
+ type: 35264
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 38154
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 20480
+ num_resource: 1024
+ type: 38157
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 38218
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 22528
+ num_resource: 1024
+ type: 38221
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 38272
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 38272
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 4
+ type: 38272
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 4
+ type: 38272
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 12
+ type: 38272
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 38272
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 4
+ type: 38272
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 4
+ type: 38272
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 4
+ type: 38272
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 4
+ type: 38272
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 16
+ type: 38272
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 38464
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 423
+ num_resource: 32
+ type: 38465
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 455
+ num_resource: 32
+ type: 38465
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 487
+ num_resource: 182
+ type: 38465
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 669
+ num_resource: 40
+ type: 38465
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 709
+ num_resource: 10
+ type: 38465
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 719
+ num_resource: 10
+ type: 38465
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 729
+ num_resource: 6
+ type: 38465
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 735
+ num_resource: 6
+ type: 38465
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 878
+ num_resource: 128
+ type: 38465
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1006
+ num_resource: 10
+ type: 38465
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 345
+ num_resource: 6
+ type: 38466
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 351
+ num_resource: 0
+ type: 38466
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 351
+ num_resource: 2
+ type: 38466
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 353
+ num_resource: 2
+ type: 38466
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 355
+ num_resource: 6
+ type: 38466
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 361
+ num_resource: 1
+ type: 38466
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 362
+ num_resource: 1
+ type: 38466
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 363
+ num_resource: 1
+ type: 38466
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 364
+ num_resource: 2
+ type: 38466
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 366
+ num_resource: 2
+ type: 38466
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 368
+ num_resource: 16
+ type: 38466
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 384
+ num_resource: 12
+ type: 38466
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 396
+ num_resource: 4
+ type: 38466
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 400
+ num_resource: 4
+ type: 38466
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 404
+ num_resource: 12
+ type: 38466
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 416
+ num_resource: 1
+ type: 38466
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 417
+ num_resource: 2
+ type: 38466
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 419
+ num_resource: 2
+ type: 38466
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 421
+ num_resource: 2
+ type: 38466
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 6
+ type: 38467
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 0
+ type: 38467
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 2
+ type: 38467
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 38467
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 6
+ type: 38467
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 1
+ type: 38467
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 21
+ num_resource: 1
+ type: 38467
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 1
+ type: 38467
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 2
+ type: 38467
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 25
+ num_resource: 2
+ type: 38467
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 16
+ type: 38467
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 12
+ type: 38467
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 55
+ num_resource: 4
+ type: 38467
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 59
+ num_resource: 4
+ type: 38467
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 63
+ num_resource: 12
+ type: 38467
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 75
+ num_resource: 4
+ type: 38467
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 79
+ num_resource: 2
+ type: 38467
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 81
+ num_resource: 2
+ type: 38467
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 83
+ num_resource: 2
+ type: 38467
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 85
+ num_resource: 16
+ type: 38468
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 101
+ num_resource: 12
+ type: 38468
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 113
+ num_resource: 2
+ type: 38468
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 115
+ num_resource: 2
+ type: 38468
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 117
+ num_resource: 192
+ type: 38468
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 309
+ num_resource: 32
+ type: 38468
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 343
+ num_resource: 1
+ type: 38469
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 344
+ num_resource: 1
+ type: 38469
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 341
+ num_resource: 1
+ type: 38470
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 342
+ num_resource: 1
+ type: 38470
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 38471
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 38471
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 38472
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 1
+ type: 38472
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 5
+ type: 38474
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 1
+ type: 38474
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 3
+ type: 38475
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 2
+ type: 38475
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 3
+ type: 38475
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 3
+ type: 38475
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 6
+ type: 38475
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 17
+ num_resource: 3
+ type: 38475
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 3
+ type: 38475
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 3
+ type: 38475
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 1
+ type: 38475
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 1
+ type: 38475
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 38475
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 82
+ num_resource: 16
+ type: 39104
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 98
+ num_resource: 16
+ type: 39104
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 114
+ num_resource: 110
+ type: 39104
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 39105
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 49152
+ num_resource: 1024
+ type: 39106
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 39107
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 6
+ type: 39114
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 0
+ type: 39114
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 2
+ type: 39114
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 39114
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 6
+ type: 39114
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 1
+ type: 39114
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 21
+ num_resource: 1
+ type: 39114
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 1
+ type: 39114
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 2
+ type: 39114
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 25
+ num_resource: 2
+ type: 39114
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 16
+ type: 39114
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 12
+ type: 39114
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 55
+ num_resource: 4
+ type: 39114
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 59
+ num_resource: 4
+ type: 39114
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 63
+ num_resource: 12
+ type: 39114
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 75
+ num_resource: 1
+ type: 39114
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 76
+ num_resource: 2
+ type: 39114
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 78
+ num_resource: 2
+ type: 39114
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 80
+ num_resource: 2
+ type: 39114
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 39115
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 39115
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 39116
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 1
+ type: 39116
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 6
+ type: 39117
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 0
+ type: 39117
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 2
+ type: 39117
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 39117
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 6
+ type: 39117
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 1
+ type: 39117
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 21
+ num_resource: 1
+ type: 39117
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 1
+ type: 39117
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 2
+ type: 39117
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 25
+ num_resource: 2
+ type: 39117
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 16
+ type: 39117
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 12
+ type: 39117
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 55
+ num_resource: 4
+ type: 39117
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 59
+ num_resource: 4
+ type: 39117
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 63
+ num_resource: 12
+ type: 39117
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 75
+ num_resource: 4
+ type: 39117
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 79
+ num_resource: 2
+ type: 39117
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 81
+ num_resource: 2
+ type: 39117
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 83
+ num_resource: 2
+ type: 39117
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 85
+ num_resource: 16
+ type: 39118
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 101
+ num_resource: 12
+ type: 39118
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 113
+ num_resource: 2
+ type: 39118
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 115
+ num_resource: 2
+ type: 39118
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 117
+ num_resource: 192
+ type: 39118
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 309
+ num_resource: 32
+ type: 39118
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 39119
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 39119
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 39120
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 1
+ type: 39120
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 86
+ type: 39242
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 120
+ num_resource: 32
+ type: 39242
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 152
+ num_resource: 12
+ type: 39242
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 164
+ num_resource: 12
+ type: 39242
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 176
+ num_resource: 28
+ type: 39242
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 204
+ num_resource: 8
+ type: 39242
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 212
+ num_resource: 12
+ type: 39242
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 224
+ num_resource: 12
+ type: 39242
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 236
+ num_resource: 20
+ type: 39242
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 1024
+ type: 39245
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1058
+ num_resource: 512
+ type: 39245
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 1570
+ num_resource: 256
+ type: 39245
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 1826
+ num_resource: 256
+ type: 39245
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 2082
+ num_resource: 512
+ type: 39245
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 2594
+ num_resource: 256
+ type: 39245
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 2850
+ num_resource: 256
+ type: 39245
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 3106
+ num_resource: 256
+ type: 39245
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 3362
+ num_resource: 32
+ type: 39245
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 3394
+ num_resource: 32
+ type: 39245
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 3426
+ num_resource: 1182
+ type: 39245
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 1536
+ num_resource: 16
+ type: 39247
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2048
+ num_resource: 16
+ type: 39248
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2560
+ num_resource: 16
+ type: 39249
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 3072
+ num_resource: 32
+ type: 39250
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 3584
+ num_resource: 32
+ type: 39251
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4096
+ num_resource: 32
+ type: 39252
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 12
+ type: 39424
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 20
+ type: 39424
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 4
+ type: 40000
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 4
+ type: 40000
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 4
+ type: 40000
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 4
+ type: 40000
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 17
+ num_resource: 16
+ type: 40000
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 33
+ num_resource: 4
+ type: 40000
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 37
+ num_resource: 4
+ type: 40000
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 41
+ num_resource: 4
+ type: 40000
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 45
+ num_resource: 4
+ type: 40000
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 49
+ num_resource: 4
+ type: 40000
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 53
+ num_resource: 11
+ type: 40000
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 40064
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 96
+ num_resource: 20
+ type: 40065
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 116
+ num_resource: 8
+ type: 40065
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 124
+ num_resource: 8
+ type: 40065
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 132
+ num_resource: 8
+ type: 40065
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 140
+ num_resource: 16
+ type: 40065
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 156
+ num_resource: 8
+ type: 40065
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 164
+ num_resource: 8
+ type: 40065
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 172
+ num_resource: 8
+ type: 40065
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 180
+ num_resource: 32
+ type: 40065
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 212
+ num_resource: 12
+ type: 40065
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 224
+ num_resource: 28
+ type: 40065
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 4
+ type: 40066
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 0
+ type: 40066
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 1
+ type: 40066
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 55
+ num_resource: 1
+ type: 40066
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 56
+ num_resource: 1
+ type: 40066
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 57
+ num_resource: 1
+ type: 40066
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 58
+ num_resource: 1
+ type: 40066
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 59
+ num_resource: 1
+ type: 40066
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 60
+ num_resource: 2
+ type: 40066
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 62
+ num_resource: 0
+ type: 40066
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 62
+ num_resource: 9
+ type: 40066
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 71
+ num_resource: 6
+ type: 40066
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 77
+ num_resource: 1
+ type: 40066
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 78
+ num_resource: 1
+ type: 40066
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 79
+ num_resource: 2
+ type: 40066
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 81
+ num_resource: 1
+ type: 40066
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 82
+ num_resource: 1
+ type: 40066
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 83
+ num_resource: 1
+ type: 40066
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 84
+ num_resource: 3
+ type: 40066
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 87
+ num_resource: 2
+ type: 40066
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 89
+ num_resource: 4
+ type: 40066
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 4
+ type: 40067
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 0
+ type: 40067
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 1
+ type: 40067
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 1
+ type: 40067
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 1
+ type: 40067
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 1
+ type: 40067
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 1
+ type: 40067
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 1
+ type: 40067
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 40067
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 0
+ type: 40067
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 9
+ type: 40067
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 6
+ type: 40067
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 29
+ num_resource: 1
+ type: 40067
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 1
+ type: 40067
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 31
+ num_resource: 2
+ type: 40067
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 33
+ num_resource: 1
+ type: 40067
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 1
+ type: 40067
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 40067
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 3
+ type: 40067
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 39
+ num_resource: 2
+ type: 40067
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 41
+ num_resource: 5
+ type: 40067
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 0
+ type: 40069
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 2
+ type: 40069
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 40071
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 40071
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 5
+ type: 40074
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 1
+ type: 40074
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 3
+ type: 40075
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 2
+ type: 40075
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 3
+ type: 40075
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 3
+ type: 40075
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 3
+ type: 40075
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 3
+ type: 40075
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 17
+ num_resource: 3
+ type: 40075
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 3
+ type: 40075
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 3
+ type: 40075
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 3
+ type: 40075
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 29
+ num_resource: 3
+ type: 40075
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 8
+ type: 40128
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 56
+ num_resource: 4
+ type: 40128
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 60
+ num_resource: 8
+ type: 40128
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 68
+ num_resource: 4
+ type: 40128
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 4
+ type: 40128
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 76
+ num_resource: 4
+ type: 40128
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 80
+ num_resource: 8
+ type: 40128
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 88
+ num_resource: 4
+ type: 40128
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 92
+ num_resource: 4
+ type: 40128
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 40129
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 56320
+ num_resource: 256
+ type: 40130
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 40131
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 4
+ type: 40138
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 0
+ type: 40138
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 1
+ type: 40138
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 1
+ type: 40138
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 1
+ type: 40138
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 1
+ type: 40138
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 1
+ type: 40138
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 1
+ type: 40138
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 40138
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 0
+ type: 40138
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 9
+ type: 40138
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 6
+ type: 40138
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 29
+ num_resource: 1
+ type: 40138
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 1
+ type: 40138
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 31
+ num_resource: 2
+ type: 40138
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 33
+ num_resource: 1
+ type: 40138
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 1
+ type: 40138
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 40138
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 3
+ type: 40138
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 39
+ num_resource: 2
+ type: 40138
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 41
+ num_resource: 4
+ type: 40138
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 40139
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 40139
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 4
+ type: 40141
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 0
+ type: 40141
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 1
+ type: 40141
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 1
+ type: 40141
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 1
+ type: 40141
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 1
+ type: 40141
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 1
+ type: 40141
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 1
+ type: 40141
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 40141
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 0
+ type: 40141
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 9
+ type: 40141
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 6
+ type: 40141
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 29
+ num_resource: 1
+ type: 40141
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 1
+ type: 40141
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 31
+ num_resource: 2
+ type: 40141
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 33
+ num_resource: 1
+ type: 40141
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 1
+ type: 40141
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 40141
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 3
+ type: 40141
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 39
+ num_resource: 2
+ type: 40141
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 41
+ num_resource: 5
+ type: 40141
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 40143
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 40143
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 32
+ type: 40266
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 16
+ type: 40266
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 70
+ num_resource: 8
+ type: 40266
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 78
+ num_resource: 8
+ type: 40266
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 86
+ num_resource: 24
+ type: 40266
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 110
+ num_resource: 8
+ type: 40266
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 40266
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 134
+ num_resource: 16
+ type: 40266
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 150
+ num_resource: 64
+ type: 40266
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 214
+ num_resource: 4
+ type: 40266
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 218
+ num_resource: 38
+ type: 40266
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 16406
+ num_resource: 128
+ type: 40269
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16534
+ num_resource: 128
+ type: 40269
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 16662
+ num_resource: 64
+ type: 40269
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 16726
+ num_resource: 64
+ type: 40269
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 16790
+ num_resource: 128
+ type: 40269
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16918
+ num_resource: 128
+ type: 40269
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 17046
+ num_resource: 128
+ type: 40269
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 17174
+ num_resource: 128
+ type: 40269
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 17302
+ num_resource: 256
+ type: 40269
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 17558
+ num_resource: 64
+ type: 40269
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 17622
+ num_resource: 298
+ type: 40269
+ host_id: 128
+ reserved: 0
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 15/21] j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (13 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 14/21] j721s2: yaml: Add board config for J721S2 Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 19:46 ` Simon Glass
2023-01-20 10:18 ` [PATCH 16/21] am62: yaml: Add board config for AM62 Neha Malcom Francis
` (6 subsequent siblings)
21 siblings, 1 reply; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Support added for HS and GP boot binaries for J721S2.
tiboot3.bin, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, tispl.bin_unsigned, u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed by J721S2 requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OPTEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-j721s2-binman.dtsi | 377 ++++++++++++++++++
.../k3-j721s2-common-proc-board-u-boot.dtsi | 2 +
.../dts/k3-j721s2-r5-common-proc-board.dts | 1 +
board/ti/j721s2/Kconfig | 2 +
4 files changed, 382 insertions(+)
create mode 100644 arch/arm/dts/k3-j721s2-binman.dtsi
diff --git a/arch/arm/dts/k3-j721s2-binman.dtsi b/arch/arm/dts/k3-j721s2-binman.dtsi
new file mode 100644
index 0000000000..55a03f5cd6
--- /dev/null
+++ b/arch/arm/dts/k3-j721s2-binman.dtsi
@@ -0,0 +1,377 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_J721S2_R5_EVM
+
+&binman {
+ ti-fs-cert {
+ filename = "ti-fs-cert.bin";
+ ti-fs-firmware-j721s2-hs-cert.bin {
+ filename = "ti-fs-firmware-j721s2-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ ti-fs-enc {
+ filename = "ti-fs-enc.bin";
+ ti-fs-firmware-j721s2-hs-enc.bin {
+ filename = "ti-fs-firmware-j721s2-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure {
+ combined;
+ split-dm;
+ filename = "spl/u-boot-spl.bin";
+ load = <0x41c00000>;
+ sysfw-filename = "ti-fs-enc.bin";
+ sysfw-load = <0x40000>;
+ sysfw-inner-cert = "ti-fs-cert.bin";
+ sysfw-data-filename = "combined-tifs-cfg.bin";
+ sysfw-data-load = <0x67000>;
+ dm-data-filename = "combined-dm-cfg.bin";
+ dm-data-load = <0x41c80000>;
+ key = "/keys/custMpk.pem";
+ sw-rev = <1>;
+ };
+ };
+};
+
+&binman {
+ ti-fs-gp {
+ filename = "ti-fs-gp.bin";
+ ti-fs-firmware-j721s2-gp.bin {
+ filename = "ti-fs-firmware-j721s2-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure {
+ combined;
+ split-dm;
+ filename = "spl/u-boot-spl.bin";
+ load = <0x41c00000>;
+ sysfw-filename = "ti-fs-gp.bin";
+ sysfw-load = <0x40000>;
+ sysfw-data-filename = "combined-tifs-cfg.bin";
+ sysfw-data-load = <0x67000>;
+ dm-data-filename = "combined-dm-cfg.bin";
+ dm-data-load = <0x41c80000>;
+ sw-rev = <1>;
+ };
+ };
+};
+
+#endif
+
+#ifdef CONFIG_TARGET_J721S2_A72_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_J721S2_EVM_DTB "spl/dts/k3-j721s2-common-proc-board.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define J721S2_EVM_DTB "arch/arm/dts/k3-j721s2-common-proc-board.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ filename = SPL_NODTB;
+ secure;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j721s2-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_J721S2_EVM_DTB;
+ secure;
+ };
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j721s2-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for J721S2 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ filename = UBOOT_NODTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j721s2-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = J721S2_EVM_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j721s2-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721s2-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_J721S2_EVM_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j721s2-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for J721S2 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721s2-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = J721S2_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j721s2-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
index a17e61eccf..5e64bf3dbb 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include "k3-j721s2-binman.dtsi"
+
/ {
chosen {
stdout-path = "serial2:115200n8";
diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
index 9e3bdec2d5..31ec6c5ac7 100644
--- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
@@ -8,6 +8,7 @@
#include "k3-j721s2-som-p0.dtsi"
#include "k3-j721s2-ddr-evm-lp4-4266.dtsi"
#include "k3-j721s2-ddr.dtsi"
+#include "k3-j721s2-binman.dtsi"
/ {
chosen {
diff --git a/board/ti/j721s2/Kconfig b/board/ti/j721s2/Kconfig
index 6141798333..e4af36ee56 100644
--- a/board/ti/j721s2/Kconfig
+++ b/board/ti/j721s2/Kconfig
@@ -14,6 +14,7 @@ config TARGET_J721S2_A72_EVM
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
config TARGET_J721S2_R5_EVM
bool "TI K3 based J721S2 EVM running on R5"
@@ -24,6 +25,7 @@ config TARGET_J721S2_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH 15/21] j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
2023-01-20 10:18 ` [PATCH 15/21] j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
@ 2023-01-20 19:46 ` Simon Glass
0 siblings, 0 replies; 31+ messages in thread
From: Simon Glass @ 2023-01-20 19:46 UTC (permalink / raw)
To: Neha Malcom Francis
Cc: u-boot, trini, afd, vigneshr, rogerq, alpernebiyasak, nm, bb
Hi,
On Fri, 20 Jan 2023 at 03:19, Neha Malcom Francis <n-francis@ti.com> wrote:
>
> Support added for HS and GP boot binaries for J721S2.
>
> tiboot3.bin, tispl.bin and u-boot.img: For HS devices
> tiboot3.bin_unsigned, tispl.bin_unsigned, u-boot.img_unsigned: For GP
> devices
>
> It is to be noted that the bootflow followed by J721S2 requires:
>
> tiboot3.bin:
> * R5 SPL
> * R5 SPL dtbs
> * TIFS
> * board-cfg
> * pm-cfg
> * sec-cfg
> * rm-cfg
>
> tispl.bin:
> * DM
> * ATF
> * OPTEE
> * A72 SPL
> * A72 SPL dtbs
>
> u-boot.img:
> * A72 U-Boot
> * A72 U-Boot dtbs
>
> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> ---
> arch/arm/dts/k3-j721s2-binman.dtsi | 377 ++++++++++++++++++
> .../k3-j721s2-common-proc-board-u-boot.dtsi | 2 +
> .../dts/k3-j721s2-r5-common-proc-board.dts | 1 +
> board/ti/j721s2/Kconfig | 2 +
> 4 files changed, 382 insertions(+)
> create mode 100644 arch/arm/dts/k3-j721s2-binman.dtsi
>
Please can you use the 'binman:' tag (without "tools:') only for
patches to binman itself.
For example, this one should just have the dts: tag.
Regards,
Simon
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH 16/21] am62: yaml: Add board config for AM62
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (14 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 15/21] j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:18 ` [PATCH 17/21] am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
` (5 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Added YAML config for AM62
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/am62x/config.yaml | 1490 ++++++++++++++++++++++++++++++++++++
board/ti/am65x/config.yaml | 144 ++--
2 files changed, 1562 insertions(+), 72 deletions(-)
create mode 100644 board/ti/am62x/config.yaml
diff --git a/board/ti/am62x/config.yaml b/board/ti/am62x/config.yaml
new file mode 100644
index 0000000000..9dcedcb45d
--- /dev/null
+++ b/board/ti/am62x/config.yaml
@@ -0,0 +1,1490 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x5A
+ allow_wildcard_unlock : 0x5A
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 30
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 36
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #5
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #6
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #7
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #8
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #9
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #10
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #11
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #12
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #13
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #14
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #15
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #16
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #17
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #18
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #19
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #20
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #21
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #22
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #23
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #24
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #25
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #26
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #27
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #28
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #29
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #30
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #31
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #32
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 960
+ reserved : 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 64
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 22
+ type: 64
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 192
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 2
+ type: 192
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 320
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 320
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 26
+ type: 384
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 50176
+ num_resource: 164
+ type: 2434
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 2435
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 2445
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2445
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2445
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 2445
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 6
+ type: 2445
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 18
+ type: 2446
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 6
+ type: 2446
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 6
+ type: 2446
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 78
+ num_resource: 2
+ type: 2446
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 80
+ num_resource: 2
+ type: 2446
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 12
+ type: 2447
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 6
+ type: 2447
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 6
+ type: 2447
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 2
+ type: 2447
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 2
+ type: 2447
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 2464
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2464
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2464
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 2464
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 6
+ type: 2464
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 2465
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2465
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2465
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 2465
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 2
+ type: 2465
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 2466
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 2466
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 2466
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 2
+ type: 2466
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 2
+ type: 2466
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 35
+ type: 2570
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 36
+ type: 2570
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 36
+ type: 2570
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 168
+ num_resource: 8
+ type: 2570
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 512
+ type: 2573
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 525
+ num_resource: 256
+ type: 2573
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 525
+ num_resource: 256
+ type: 2573
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 781
+ num_resource: 128
+ type: 2573
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 909
+ num_resource: 627
+ type: 2573
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1024
+ type: 2575
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4096
+ num_resource: 29
+ type: 2576
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4608
+ num_resource: 99
+ type: 2577
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5120
+ num_resource: 24
+ type: 2578
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5632
+ num_resource: 51
+ type: 2579
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 6144
+ num_resource: 51
+ type: 2580
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 6656
+ num_resource: 51
+ type: 2581
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8192
+ num_resource: 32
+ type: 2582
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8704
+ num_resource: 32
+ type: 2583
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 9216
+ num_resource: 32
+ type: 2584
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 9728
+ num_resource: 22
+ type: 2585
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 10240
+ num_resource: 22
+ type: 2586
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 10752
+ num_resource: 22
+ type: 2587
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 11264
+ num_resource: 28
+ type: 2588
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 11776
+ num_resource: 28
+ type: 2589
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 12288
+ num_resource: 28
+ type: 2590
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 3075
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3088
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3088
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3088
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3088
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3088
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 64
+ type: 3089
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 64
+ type: 3089
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 83
+ num_resource: 8
+ type: 3090
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 91
+ num_resource: 8
+ type: 3091
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 99
+ num_resource: 10
+ type: 3094
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 3094
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 3094
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 112
+ num_resource: 3
+ type: 3094
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 115
+ num_resource: 3
+ type: 3094
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 3095
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 3095
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 3096
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 3097
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 3098
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 3099
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3107
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3107
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3107
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3107
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3107
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 3108
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 3108
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 1
+ type: 3109
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 1
+ type: 3110
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3113
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3113
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3113
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3113
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3113
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3114
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3114
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3114
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3114
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3114
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 3115
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 3115
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 3116
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 3116
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 1
+ type: 3117
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 3118
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 21
+ num_resource: 1
+ type: 3119
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 3120
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 1
+ type: 3121
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 3122
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 1
+ type: 3123
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 3124
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 3264
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 3274
+ host_id: 12
+ reserved: 0
diff --git a/board/ti/am65x/config.yaml b/board/ti/am65x/config.yaml
index d02826f226..a799e08b7e 100644
--- a/board/ti/am65x/config.yaml
+++ b/board/ti/am65x/config.yaml
@@ -481,40 +481,40 @@ rm-cfg:
allowed_priority : 0
allowed_sched_priority : 0
- #10
- host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #11
- host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #12
- host_id: 5
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #13
- host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #14
- host_id: 13
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #15
host_id: 0
allowed_atype : 0
@@ -558,33 +558,33 @@ rm-cfg:
allowed_priority : 0
allowed_sched_priority : 0
- #21
- host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #22
- host_id: 5
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #23
- host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #24
- host_id: 13
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #25
host_id: 0
allowed_atype : 0
@@ -621,26 +621,26 @@ rm-cfg:
allowed_priority : 0
allowed_sched_priority : 0
- #30
- host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #31
- host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #32
- host_id: 5
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
resasg:
subhdr:
magic: 0x7B25
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 17/21] am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (15 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 16/21] am62: yaml: Add board config for AM62 Neha Malcom Francis
@ 2023-01-20 10:18 ` Neha Malcom Francis
2023-01-20 10:19 ` [PATCH 18/21] am62a: yaml: Add board config for AM62ax Neha Malcom Francis
` (4 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:18 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Support added for HS and GP boot binaries for AM62
tiboot3.bin, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, tispl.bin_unsigned, u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed by AM62 requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OPTEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-am625-r5-sk.dts | 1 +
arch/arm/dts/k3-am625-sk-binman.dtsi | 377 +++++++++++++++++++++++++++
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 2 +
board/ti/am62x/Kconfig | 2 +
include/binman_sym.h | 2 +
5 files changed, 384 insertions(+)
create mode 100644 arch/arm/dts/k3-am625-sk-binman.dtsi
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
index d39b334ed0..a63d1b25dd 100644
--- a/arch/arm/dts/k3-am625-r5-sk.dts
+++ b/arch/arm/dts/k3-am625-r5-sk.dts
@@ -9,6 +9,7 @@
#include "k3-am62-ddr.dtsi"
#include "k3-am625-sk-u-boot.dtsi"
+#include "k3-am625-sk-binman.dtsi"
/ {
aliases {
diff --git a/arch/arm/dts/k3-am625-sk-binman.dtsi b/arch/arm/dts/k3-am625-sk-binman.dtsi
new file mode 100644
index 0000000000..ef8bfde042
--- /dev/null
+++ b/arch/arm/dts/k3-am625-sk-binman.dtsi
@@ -0,0 +1,377 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_AM625_R5_EVM
+
+&binman {
+ ti-fs-cert {
+ filename = "ti-fs-cert.bin";
+ ti-fs-firmware-am625-hs-cert.bin {
+ filename = "ti-fs-firmware-am62x-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ ti-fs-enc {
+ filename = "ti-fs-enc.bin";
+ ti-fs-firmware-am625-hs-enc.bin {
+ filename = "ti-fs-firmware-am62x-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure {
+ combined;
+ split-dm;
+ filename = "spl/u-boot-spl.bin";
+ load = <0x43c00000>;
+ sysfw-filename = "ti-fs-enc.bin";
+ sysfw-load = <0x40000>;
+ sysfw-inner-cert = "ti-fs-cert.bin";
+ sysfw-data-filename = "combined-tifs-cfg.bin";
+ sysfw-data-load = <0x67000>;
+ dm-data-filename = "combined-dm-cfg.bin";
+ dm-data-load = <0x43c3a800>;
+ key = "/keys/custMpk.pem";
+ sw-rev = <1>;
+ };
+ };
+};
+
+&binman {
+ ti-fs-gp {
+ filename = "ti-fs-gp.bin";
+ ti-fs-firmware-am625-gp.bin {
+ filename = "ti-fs-firmware-am62x-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure {
+ combined;
+ split-dm;
+ filename = "spl/u-boot-spl.bin";
+ load = <0x43c00000>;
+ sysfw-filename = "ti-fs-gp.bin";
+ sysfw-load = <0x40000>;
+ sysfw-data-filename = "combined-tifs-cfg.bin";
+ sysfw-data-load = <0x67000>;
+ dm-data-filename = "combined-dm-cfg.bin";
+ dm-data-load = <0x43c3a800>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ };
+ };
+};
+
+#endif
+
+#ifdef CONFIG_TARGET_AM625_A53_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_AM625_EVM_DTB "spl/dts/k3-am625-sk.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define AM625_EVM_DTB "arch/arm/dts/k3-am625-sk.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ filename = SPL_NODTB;
+ secure;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am625-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_AM625_EVM_DTB;
+ secure;
+ };
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am625-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM625 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ filename = UBOOT_NODTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am625-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = AM625_EVM_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am625-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am625-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_AM625_EVM_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am625-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM625 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am625-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM625_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am625-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index f275e3b46c..12fc3a5c75 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -4,6 +4,8 @@
* Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include "k3-am625-sk-binman.dtsi"
+
/ {
chosen {
stdout-path = "serial2:115200n8";
diff --git a/board/ti/am62x/Kconfig b/board/ti/am62x/Kconfig
index 87fed44df1..8063d74d6d 100644
--- a/board/ti/am62x/Kconfig
+++ b/board/ti/am62x/Kconfig
@@ -11,6 +11,7 @@ config TARGET_AM625_A53_EVM
bool "TI K3 based AM625 EVM running on A53"
select ARM64
select SOC_K3_AM625
+ select BINMAN
config TARGET_AM625_R5_EVM
bool "TI K3 based AM625 EVM running on R5"
@@ -21,6 +22,7 @@ config TARGET_AM625_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
endchoice
diff --git a/include/binman_sym.h b/include/binman_sym.h
index 528d7e4e90..f274bf6a3d 100644
--- a/include/binman_sym.h
+++ b/include/binman_sym.h
@@ -11,6 +11,8 @@
#ifndef __BINMAN_SYM_H
#define __BINMAN_SYM_H
+#include <linux/types.h>
+
/* BSYM in little endian, keep in sync with tools/binman/elf.py */
#define BINMAN_SYM_MAGIC_VALUE (0x4d595342UL)
#define BINMAN_SYM_MISSING (-1UL)
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 18/21] am62a: yaml: Add board config for AM62ax
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (16 preceding siblings ...)
2023-01-20 10:18 ` [PATCH 17/21] am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
@ 2023-01-20 10:19 ` Neha Malcom Francis
2023-01-20 10:19 ` [PATCH 19/21] am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
` (3 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:19 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Added YAML config for AM62ax
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/am62ax/config.yaml | 1553 +++++++++++++++++++++++++++++++++++
1 file changed, 1553 insertions(+)
create mode 100644 board/ti/am62ax/config.yaml
diff --git a/board/ti/am62ax/config.yaml b/board/ti/am62ax/config.yaml
new file mode 100644
index 0000000000..15f6f0a2da
--- /dev/null
+++ b/board/ti/am62ax/config.yaml
@@ -0,0 +1,1553 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62ax
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x10
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x5A
+ allow_wildcard_unlock : 0x5A
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 30
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 36
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #5
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #6
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #7
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #8
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #9
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #10
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #11
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #12
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #13
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #14
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #15
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #16
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #17
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #18
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #19
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #20
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #21
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #22
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #23
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #24
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #25
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #26
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #27
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #28
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #29
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #30
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #31
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #32
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 1032
+ reserved : 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 64
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 22
+ type: 64
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 192
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 2
+ type: 192
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 320
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 320
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 26
+ type: 384
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 50176
+ num_resource: 164
+ type: 2434
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 2435
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 2445
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2445
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2445
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 2445
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 6
+ type: 2445
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 18
+ type: 2446
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 6
+ type: 2446
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 6
+ type: 2446
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 78
+ num_resource: 2
+ type: 2446
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 80
+ num_resource: 2
+ type: 2446
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 12
+ type: 2447
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 6
+ type: 2447
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 6
+ type: 2447
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 2
+ type: 2447
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 2
+ type: 2447
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 2464
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2464
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2464
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 2464
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 6
+ type: 2464
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 2465
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2465
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2465
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 2465
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 2
+ type: 2465
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 2466
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 2466
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 2466
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 2
+ type: 2466
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 2
+ type: 2466
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 34
+ type: 2570
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 36
+ type: 2570
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 36
+ type: 2570
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 168
+ num_resource: 8
+ type: 2570
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 512
+ type: 2573
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 526
+ num_resource: 256
+ type: 2573
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 526
+ num_resource: 256
+ type: 2573
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 782
+ num_resource: 128
+ type: 2573
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 910
+ num_resource: 626
+ type: 2573
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1024
+ type: 2575
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4096
+ num_resource: 29
+ type: 2576
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4608
+ num_resource: 99
+ type: 2577
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5120
+ num_resource: 24
+ type: 2578
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5632
+ num_resource: 51
+ type: 2579
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 6144
+ num_resource: 51
+ type: 2580
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 6656
+ num_resource: 51
+ type: 2581
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8192
+ num_resource: 32
+ type: 2582
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8704
+ num_resource: 32
+ type: 2583
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 9216
+ num_resource: 32
+ type: 2584
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 9728
+ num_resource: 22
+ type: 2585
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 10240
+ num_resource: 22
+ type: 2586
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 10752
+ num_resource: 22
+ type: 2587
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 11264
+ num_resource: 28
+ type: 2588
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 11776
+ num_resource: 28
+ type: 2589
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 12288
+ num_resource: 28
+ type: 2590
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 3075
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3088
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3088
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3088
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3088
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3088
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 64
+ type: 3089
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 64
+ type: 3089
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 83
+ num_resource: 8
+ type: 3090
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 91
+ num_resource: 8
+ type: 3091
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 99
+ num_resource: 10
+ type: 3094
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 3094
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 3094
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 112
+ num_resource: 3
+ type: 3094
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 115
+ num_resource: 3
+ type: 3094
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 3095
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 3095
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 3096
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 3097
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 3098
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 3099
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3107
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3107
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3107
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3107
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3107
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 3108
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 3108
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 1
+ type: 3109
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 1
+ type: 3110
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3113
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3113
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3113
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3113
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3113
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3114
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3114
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3114
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3114
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3114
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 3115
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 3115
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 3116
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 3116
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 1
+ type: 3117
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 3118
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 21
+ num_resource: 1
+ type: 3119
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 3120
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 1
+ type: 3121
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 3122
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 1
+ type: 3123
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 3124
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 3264
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 3274
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 51200
+ num_resource: 12
+ type: 26178
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 26179
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 6
+ type: 26190
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 6
+ type: 26209
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 32778
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12288
+ num_resource: 128
+ type: 32781
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3072
+ num_resource: 6
+ type: 32796
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 3584
+ num_resource: 6
+ type: 32797
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4096
+ num_resource: 6
+ type: 32798
+ host_id: 128
+ reserved: 0
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 19/21] am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (17 preceding siblings ...)
2023-01-20 10:19 ` [PATCH 18/21] am62a: yaml: Add board config for AM62ax Neha Malcom Francis
@ 2023-01-20 10:19 ` Neha Malcom Francis
2023-01-20 10:19 ` [PATCH 20/21] k3: tools: config.mk: Update makefile and remove scripts Neha Malcom Francis
` (2 subsequent siblings)
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:19 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Support added for HS and GP boot binaries for AM62ax.
tiboot3.bin, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, tispl.bin_unsigned and u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed by AM62ax requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OPTEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-am62a-sk-binman.dtsi | 377 +++++++++++++++++++++++++++
arch/arm/dts/k3-am62a7-r5-sk.dts | 1 +
arch/arm/dts/k3-am62a7-sk.dts | 1 +
board/ti/am62ax/Kconfig | 2 +
4 files changed, 381 insertions(+)
create mode 100644 arch/arm/dts/k3-am62a-sk-binman.dtsi
diff --git a/arch/arm/dts/k3-am62a-sk-binman.dtsi b/arch/arm/dts/k3-am62a-sk-binman.dtsi
new file mode 100644
index 0000000000..a953abda67
--- /dev/null
+++ b/arch/arm/dts/k3-am62a-sk-binman.dtsi
@@ -0,0 +1,377 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_AM62A7_R5_EVM
+
+&binman {
+ ti-fs-cert {
+ filename = "ti-fs-cert.bin";
+ ti-fs-firmware-am62ax-hs-cert.bin {
+ filename = "ti-fs-firmware-am62ax-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ ti-fs-enc {
+ filename = "ti-fs-enc.bin";
+ ti-fs-firmware-am62ax-hs-enc.bin {
+ filename = "ti-fs-firmware-am62ax-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure {
+ combined;
+ split-dm;
+ filename = "spl/u-boot-spl.bin";
+ load = <0x43c00000>;
+ sysfw-filename = "ti-fs-enc.bin";
+ sysfw-load = <0x40000>;
+ sysfw-inner-cert = "ti-fs-cert.bin";
+ sysfw-data-filename = "combined-tifs-cfg.bin";
+ sysfw-data-load = <0x67000>;
+ dm-data-filename = "combined-dm-cfg.bin";
+ dm-data-load = <0x43c3a800>;
+ key = "/keys/custMpk.pem";
+ sw-rev = <1>;
+ };
+ };
+};
+
+&binman {
+ ti-fs-gp {
+ filename = "ti-fs-gp.bin";
+ ti-fs-firmware-am62ax-gp.bin {
+ filename = "ti-fs-firmware-am62ax-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure {
+ combined;
+ split-dm;
+ filename = "spl/u-boot-spl.bin";
+ load = <0x43c00000>;
+ sysfw-filename = "ti-fs-gp.bin";
+ sysfw-load = <0x40000>;
+ sysfw-data-filename = "combined-tifs-cfg.bin";
+ sysfw-data-load = <0x67000>;
+ dm-data-filename = "combined-dm-cfg.bin";
+ dm-data-load = <0x43c3a800>;
+ sw-rev = <1>;
+ };
+ };
+};
+
+#endif
+
+#ifdef CONFIG_TARGET_AM62A7_A53_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_AM62A7_EVM_DTB "spl/dts/k3-am62a7-sk.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define AM62A7_EVM_DTB "arch/arm/dts/k3-am62a7-sk.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ filename = SPL_NODTB;
+ secure;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am62a7-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_AM62A7_EVM_DTB;
+ secure;
+ };
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am62a7-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM62Ax board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ filename = UBOOT_NODTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am62a7-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = AM62A7_EVM_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am62a7-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am62a7-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_AM62A7_EVM_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am62a7-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM62Ax board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am62a7-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM62A7_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am62a7-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-am62a7-r5-sk.dts b/arch/arm/dts/k3-am62a7-r5-sk.dts
index 58b7c8ad05..0420fb8e74 100644
--- a/arch/arm/dts/k3-am62a7-r5-sk.dts
+++ b/arch/arm/dts/k3-am62a7-r5-sk.dts
@@ -7,6 +7,7 @@
#include "k3-am62a7-sk.dts"
#include "k3-am62a-ddr-1866mhz-32bit.dtsi"
#include "k3-am62a-ddr.dtsi"
+#include "k3-am62a-sk-binman.dtsi"
#include "k3-am62a7-sk-u-boot.dtsi"
diff --git a/arch/arm/dts/k3-am62a7-sk.dts b/arch/arm/dts/k3-am62a7-sk.dts
index 576dbce80a..1245b523ea 100644
--- a/arch/arm/dts/k3-am62a7-sk.dts
+++ b/arch/arm/dts/k3-am62a7-sk.dts
@@ -10,6 +10,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include "k3-am62a7.dtsi"
+#include "k3-am62a-sk-binman.dtsi"
/ {
compatible = "ti,am62a7-sk", "ti,am62a7";
diff --git a/board/ti/am62ax/Kconfig b/board/ti/am62ax/Kconfig
index 2c18cd49b5..804e67fbe8 100644
--- a/board/ti/am62ax/Kconfig
+++ b/board/ti/am62ax/Kconfig
@@ -11,6 +11,7 @@ config TARGET_AM62A7_A53_EVM
bool "TI K3 based AM62A7 EVM running on A53"
select ARM64
select SOC_K3_AM62A7
+ select BINMAN
imply BOARD
imply SPL_BOARD
imply TI_I2C_BOARD_DETECT
@@ -24,6 +25,7 @@ config TARGET_AM62A7_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 20/21] k3: tools: config.mk: Update makefile and remove scripts
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (18 preceding siblings ...)
2023-01-20 10:19 ` [PATCH 19/21] am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
@ 2023-01-20 10:19 ` Neha Malcom Francis
2023-01-20 10:19 ` [PATCH 21/21] doc: board: ti: Update documentation for binman flow Neha Malcom Francis
2023-01-20 19:46 ` [PATCH 00/21] Migration to using binman to generate bootloader Simon Glass
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:19 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Since binman is used to package bootloader images for all K3 devices, we
do not have to rely on the earlier methods to package them.
config.mk has been edited to only have binman required make commands.
Scripts that were used to generate x509 certificate for tiboot3.bin and
generate tispl.bin have also been removed.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/mach-k3/config.mk | 92 -------------
tools/k3_fit_atf.sh | 123 -----------------
tools/k3_gen_x509_cert.sh | 262 -------------------------------------
3 files changed, 477 deletions(-)
delete mode 100755 tools/k3_fit_atf.sh
delete mode 100755 tools/k3_gen_x509_cert.sh
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index e521fa8686..a01f4383b4 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -11,34 +11,6 @@ ifeq ($(shell which openssl),)
$(error "No openssl in $(PATH), consider installing openssl")
endif
-IMAGE_SIZE= $(shell cat $(obj)/u-boot-spl.bin | wc -c)
-MAX_SIZE= $(shell printf "%d" $(CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE))
-
-ifeq ($(CONFIG_SYS_K3_KEY), "")
-KEY=""
-# On HS use real key or warn if not available
-ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
-ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/keys/custMpk.pem),)
-KEY=$(TI_SECURE_DEV_PKG)/keys/custMpk.pem
-else
-$(warning "WARNING: signing key not found. Random key will NOT work on HS hardware!")
-endif
-endif
-else
-KEY=$(patsubst "%",$(srctree)/%,$(CONFIG_SYS_K3_KEY))
-endif
-
-# X509 SWRV default
-SWRV = $(CONFIG_K3_X509_SWRV)
-# On HS use SECDEV provided software revision or warn if not available
-ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
-ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/keys/swrv.txt),)
-SWRV= $(shell cat $(TI_SECURE_DEV_PKG)/keys/swrv.txt)
-else
-$(warning "WARNING: Software revision file not found. Default may not work on HS hardware.")
-endif
-endif
-
O ?= .
# Board config binary artifacts necessary for packaging of tiboot3.bin
@@ -74,68 +46,4 @@ combined-dm-cfg.bin: pm-cfg.bin rm-cfg.bin
INPUTS-y += combined-dm-cfg.bin
endif
-
-# tiboot3.bin is mandated by ROM and ROM only supports R5 boot.
-# So restrict tiboot3.bin creation for CPU_V7R.
-ifndef CONFIG_BINMAN
-ifdef CONFIG_CPU_V7R
-image_check: $(obj)/u-boot-spl.bin FORCE
- @if [ $(IMAGE_SIZE) -gt $(MAX_SIZE) ]; then \
- echo "===============================================" >&2; \
- echo "ERROR: Final Image too big. " >&2; \
- echo "$< size = $(IMAGE_SIZE), max size = $(MAX_SIZE)" >&2; \
- echo "===============================================" >&2; \
- exit 1; \
- fi
-
-tiboot3.bin: image_check FORCE
- $(srctree)/tools/k3_gen_x509_cert.sh -c 16 -b $(obj)/u-boot-spl.bin \
- -o $@ -l $(CONFIG_SPL_TEXT_BASE) -r $(SWRV) -k $(KEY)
-
-INPUTS-y += tiboot3.bin
-endif
-endif
-
-ifdef CONFIG_ARM64
-
-ifeq ($(CONFIG_SOC_K3_J721E),)
-export DM := /dev/null
endif
-
-ifndef CONFIG_BINMAN
-ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
-SPL_ITS := u-boot-spl-k3_HS.its
-$(SPL_ITS): export IS_HS=1
-INPUTS-y += tispl.bin_HS
-else
-SPL_ITS := u-boot-spl-k3.its
-INPUTS-y += tispl.bin
-endif
-endif
-
-ifeq ($(CONFIG_SPL_OF_LIST),)
-LIST_OF_DTB := $(CONFIG_DEFAULT_DEVICE_TREE)
-else
-LIST_OF_DTB := $(CONFIG_SPL_OF_LIST)
-endif
-
-quiet_cmd_k3_mkits = MKITS $@
-cmd_k3_mkits = \
- $(srctree)/tools/k3_fit_atf.sh \
- $(CONFIG_K3_ATF_LOAD_ADDR) \
- $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(LIST_OF_DTB))) > $@
-
-$(SPL_ITS): FORCE
- $(call cmd,k3_mkits)
-endif
-
-else
-
-ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
-INPUTS-y += u-boot.img_HS
-else
-INPUTS-y += u-boot.img
-endif
-endif
-
-include $(srctree)/arch/arm/mach-k3/config_secure.mk
diff --git a/tools/k3_fit_atf.sh b/tools/k3_fit_atf.sh
deleted file mode 100755
index 7bc07ad074..0000000000
--- a/tools/k3_fit_atf.sh
+++ /dev/null
@@ -1,123 +0,0 @@
-#!/bin/sh
-# SPDX-License-Identifier: GPL-2.0+
-#
-# script to generate FIT image source for K3 Family boards with
-# ATF, OPTEE, SPL and multiple device trees (given on the command line).
-# Inspired from board/sunxi/mksunxi_fit_atf.sh
-#
-# usage: $0 <atf_load_addr> <dt_name> [<dt_name> [<dt_name] ...]
-
-[ -z "$ATF" ] && ATF="bl31.bin"
-
-if [ ! -f $ATF ]; then
- echo "WARNING ATF file $ATF NOT found, resulting binary is non-functional" >&2
- ATF=/dev/null
-fi
-
-[ -z "$TEE" ] && TEE="bl32.bin"
-
-if [ ! -f $TEE ]; then
- echo "WARNING OPTEE file $TEE NOT found, resulting might be non-functional" >&2
- TEE=/dev/null
-fi
-
-[ -z "$DM" ] && DM="dm.bin"
-
-if [ ! -e $DM ]; then
- echo "WARNING DM file $DM NOT found, resulting might be non-functional" >&2
- DM=/dev/null
-fi
-
-if [ ! -z "$IS_HS" ]; then
- HS_APPEND=_HS
-fi
-
-cat << __HEADER_EOF
-/dts-v1/;
-
-/ {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
- images {
- atf {
- description = "ARM Trusted Firmware";
- data = /incbin/("$ATF");
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <$1>;
- entry = <$1>;
- };
- tee {
- description = "OPTEE";
- data = /incbin/("$TEE");
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- };
- dm {
- description = "DM binary";
- data = /incbin/("$DM");
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
- };
- spl {
- description = "SPL (64-bit)";
- data = /incbin/("spl/u-boot-spl-nodtb.bin$HS_APPEND");
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <0x80080000>;
- entry = <0x80080000>;
- };
-__HEADER_EOF
-
-# shift through ATF load address in the command line arguments
-shift
-
-for dtname in $*
-do
- cat << __FDT_IMAGE_EOF
- $(basename $dtname) {
- description = "$(basename $dtname .dtb)";
- data = /incbin/("$dtname$HS_APPEND");
- type = "flat_dt";
- arch = "arm";
- compression = "none";
- };
-__FDT_IMAGE_EOF
-done
-
-cat << __CONF_HEADER_EOF
- };
- configurations {
- default = "$(basename $1)";
-
-__CONF_HEADER_EOF
-
-for dtname in $*
-do
- cat << __CONF_SECTION_EOF
- $(basename $dtname) {
- description = "$(basename $dtname .dtb)";
- firmware = "atf";
- loadables = "tee", "dm", "spl";
- fdt = "$(basename $dtname)";
- };
-__CONF_SECTION_EOF
-done
-
-cat << __ITS_EOF
- };
-};
-__ITS_EOF
diff --git a/tools/k3_gen_x509_cert.sh b/tools/k3_gen_x509_cert.sh
deleted file mode 100755
index d9cde07417..0000000000
--- a/tools/k3_gen_x509_cert.sh
+++ /dev/null
@@ -1,262 +0,0 @@
-#!/bin/bash
-# SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
-#
-# Script to add K3 specific x509 cetificate to a binary.
-#
-
-# Variables
-OUTPUT=tiboot3.bin
-TEMP_X509=x509-temp.cert
-CERT=certificate.bin
-RAND_KEY=eckey.pem
-LOADADDR=0x41c00000
-BOOTCORE_OPTS=0
-BOOTCORE=16
-DEBUG_TYPE=0
-SWRV=1
-
-gen_degen_template() {
-cat << 'EOF' > degen-template.txt
-
-asn1=SEQUENCE:rsa_key
-
-[rsa_key]
-version=INTEGER:0
-modulus=INTEGER:0xDEGEN_MODULUS
-pubExp=INTEGER:1
-privExp=INTEGER:1
-p=INTEGER:0xDEGEN_P
-q=INTEGER:0xDEGEN_Q
-e1=INTEGER:1
-e2=INTEGER:1
-coeff=INTEGER:0xDEGEN_COEFF
-EOF
-}
-
-# Generate x509 Template
-gen_template() {
-cat << 'EOF' > x509-template.txt
- [ req ]
- distinguished_name = req_distinguished_name
- x509_extensions = v3_ca
- prompt = no
- dirstring_type = nobmp
-
- [ req_distinguished_name ]
- C = US
- ST = TX
- L = Dallas
- O = Texas Instruments Incorporated
- OU = Processors
- CN = TI support
- emailAddress = support@ti.com
-
- [ v3_ca ]
- basicConstraints = CA:true
- 1.3.6.1.4.1.294.1.1 = ASN1:SEQUENCE:boot_seq
- 1.3.6.1.4.1.294.1.2 = ASN1:SEQUENCE:image_integrity
- 1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv
-# 1.3.6.1.4.1.294.1.4 = ASN1:SEQUENCE:encryption
- 1.3.6.1.4.1.294.1.8 = ASN1:SEQUENCE:debug
-
- [ boot_seq ]
- certType = INTEGER:TEST_CERT_TYPE
- bootCore = INTEGER:TEST_BOOT_CORE
- bootCoreOpts = INTEGER:TEST_BOOT_CORE_OPTS
- destAddr = FORMAT:HEX,OCT:TEST_BOOT_ADDR
- imageSize = INTEGER:TEST_IMAGE_LENGTH
-
- [ image_integrity ]
- shaType = OID:2.16.840.1.101.3.4.2.3
- shaValue = FORMAT:HEX,OCT:TEST_IMAGE_SHA_VAL
-
- [ swrv ]
- swrv = INTEGER:TEST_SWRV
-
-# [ encryption ]
-# initalVector = FORMAT:HEX,OCT:TEST_IMAGE_ENC_IV
-# randomString = FORMAT:HEX,OCT:TEST_IMAGE_ENC_RS
-# iterationCnt = INTEGER:TEST_IMAGE_KEY_DERIVE_INDEX
-# salt = FORMAT:HEX,OCT:TEST_IMAGE_KEY_DERIVE_SALT
-
- [ debug ]
- debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000
- debugType = INTEGER:TEST_DEBUG_TYPE
- coreDbgEn = INTEGER:0
- coreDbgSecEn = INTEGER:0
-EOF
-}
-
-parse_key() {
- sed '/ /s/://g' key.txt | \
- awk '!/ / {printf("\n%s\n", $0)}; / / {printf("%s", $0)}' | \
- sed 's/ //g' | \
- awk "/$1:/{getline; print}"
-}
-
-gen_degen_key() {
-# Generate a 4096 bit RSA Key
- openssl genrsa -out key.pem 1024 >>/dev/null 2>&1
- openssl rsa -in key.pem -text -out key.txt >>/dev/null 2>&1
- DEGEN_MODULUS=$( parse_key 'modulus' )
- DEGEN_P=$( parse_key 'prime1' )
- DEGEN_Q=$( parse_key 'prime2' )
- DEGEN_COEFF=$( parse_key 'coefficient' )
- gen_degen_template
-
- sed -e "s/DEGEN_MODULUS/$DEGEN_MODULUS/"\
- -e "s/DEGEN_P/$DEGEN_P/" \
- -e "s/DEGEN_Q/$DEGEN_Q/" \
- -e "s/DEGEN_COEFF/$DEGEN_COEFF/" \
- degen-template.txt > degenerateKey.txt
-
- openssl asn1parse -genconf degenerateKey.txt -out degenerateKey.der >>/dev/null 2>&1
- openssl rsa -in degenerateKey.der -inform DER -outform PEM -out $RAND_KEY >>/dev/null 2>&1
- KEY=$RAND_KEY
- rm key.pem key.txt degen-template.txt degenerateKey.txt degenerateKey.der
-}
-
-declare -A options_help
-usage() {
- if [ -n "$*" ]; then
- echo "ERROR: $*"
- fi
- echo -n "Usage: $0 "
- for option in "${!options_help[@]}"
- do
- arg=`echo ${options_help[$option]}|cut -d ':' -f1`
- if [ -n "$arg" ]; then
- arg=" $arg"
- fi
- echo -n "[-$option$arg] "
- done
- echo
- echo -e "\nWhere:"
- for option in "${!options_help[@]}"
- do
- arg=`echo ${options_help[$option]}|cut -d ':' -f1`
- txt=`echo ${options_help[$option]}|cut -d ':' -f2`
- tb="\t\t\t"
- if [ -n "$arg" ]; then
- arg=" $arg"
- tb="\t"
- fi
- echo -e " -$option$arg:$tb$txt"
- done
- echo
- echo "Examples of usage:-"
- echo "# Example of signing the SYSFW binary with rsa degenerate key"
- echo " $0 -c 0 -b ti-sci-firmware-am6x.bin -o sysfw.bin -l 0x40000"
- echo "# Example of signing the SPL binary with rsa degenerate key"
- echo " $0 -c 16 -b spl/u-boot-spl.bin -o tiboot3.bin -l 0x41c00000"
-}
-
-options_help[b]="bin_file:Bin file that needs to be signed"
-options_help[k]="key_file:file with key inside it. If not provided script generates a rsa degenerate key."
-options_help[o]="output_file:Name of the final output file. default to $OUTPUT"
-options_help[c]="core_id:target core id on which the image would be running. Default to $BOOTCORE"
-options_help[l]="loadaddr: Target load address of the binary in hex. Default to $LOADADDR"
-options_help[d]="debug_type: Debug type, set to 4 to enable early JTAG. Default to $DEBUG_TYPE"
-options_help[r]="SWRV: Software Rev for X509 certificate"
-
-while getopts "b:k:o:c:l:d:h:r:" opt
-do
- case $opt in
- b)
- BIN=$OPTARG
- ;;
- k)
- KEY=$OPTARG
- ;;
- o)
- OUTPUT=$OPTARG
- ;;
- l)
- LOADADDR=$OPTARG
- ;;
- c)
- BOOTCORE=$OPTARG
- ;;
- d)
- DEBUG_TYPE=$OPTARG
- ;;
- r)
- SWRV=$OPTARG
- ;;
- h)
- usage
- exit 0
- ;;
- \?)
- usage "Invalid Option '-$OPTARG'"
- exit 1
- ;;
- :)
- usage "Option '-$OPTARG' Needs an argument."
- exit 1
- ;;
- esac
-done
-
-if [ "$#" -eq 0 ]; then
- usage "Arguments missing"
- exit 1
-fi
-
-if [ -z "$BIN" ]; then
- usage "Bin file missing in arguments"
- exit 1
-fi
-
-# Generate rsa degenerate key if user doesn't provide a key
-if [ -z "$KEY" ]; then
- gen_degen_key
-fi
-
-if [ $BOOTCORE == 0 ]; then # BOOTCORE M3, loaded by ROM
- CERTTYPE=2
-elif [ $BOOTCORE == 16 ]; then # BOOTCORE R5, loaded by ROM
- CERTTYPE=1
-else # Non BOOTCORE, loaded by SYSFW
- BOOTCORE_OPTS_VER=$(printf "%01x" 1)
- # Add input args option for SET and CLR flags.
- BOOTCORE_OPTS_SETFLAG=$(printf "%08x" 0)
- BOOTCORE_OPTS_CLRFLAG=$(printf "%08x" 0x100) # Clear FLAG_ARMV8_AARCH32
- BOOTCORE_OPTS="0x$BOOTCORE_OPTS_VER$BOOTCORE_OPTS_SETFLAG$BOOTCORE_OPTS_CLRFLAG"
- # Set the cert type to zero.
- # We are not using public/private key store now
- CERTTYPE=$(printf "0x%08x" 0)
-fi
-
-SHA_VAL=`openssl dgst -sha512 -hex $BIN | sed -e "s/^.*= //g"`
-BIN_SIZE=`cat $BIN | wc -c`
-ADDR=`printf "%08x" $LOADADDR`
-
-gen_cert() {
- #echo "Certificate being generated :"
- #echo " LOADADDR = 0x$ADDR"
- #echo " IMAGE_SIZE = $BIN_SIZE"
- #echo " CERT_TYPE = $CERTTYPE"
- #echo " DEBUG_TYPE = $DEBUG_TYPE"
- #echo " SWRV = $SWRV"
- sed -e "s/TEST_IMAGE_LENGTH/$BIN_SIZE/" \
- -e "s/TEST_IMAGE_SHA_VAL/$SHA_VAL/" \
- -e "s/TEST_CERT_TYPE/$CERTTYPE/" \
- -e "s/TEST_BOOT_CORE_OPTS/$BOOTCORE_OPTS/" \
- -e "s/TEST_BOOT_CORE/$BOOTCORE/" \
- -e "s/TEST_BOOT_ADDR/$ADDR/" \
- -e "s/TEST_DEBUG_TYPE/$DEBUG_TYPE/" \
- -e "s/TEST_SWRV/$SWRV/" \
- x509-template.txt > $TEMP_X509
- openssl req -new -x509 -key $KEY -nodes -outform DER -out $CERT -config $TEMP_X509 -sha512
-}
-
-gen_template
-gen_cert
-cat $CERT $BIN > $OUTPUT
-
-# Remove all intermediate files
-rm $TEMP_X509 $CERT x509-template.txt
-if [ "$KEY" == "$RAND_KEY" ]; then
- rm $RAND_KEY
-fi
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH 21/21] doc: board: ti: Update documentation for binman flow
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (19 preceding siblings ...)
2023-01-20 10:19 ` [PATCH 20/21] k3: tools: config.mk: Update makefile and remove scripts Neha Malcom Francis
@ 2023-01-20 10:19 ` Neha Malcom Francis
2023-01-20 19:46 ` [PATCH 00/21] Migration to using binman to generate bootloader Simon Glass
21 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-20 10:19 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb
Earlier documentation specified builds for generating bootloader images
using an external TI repository k3-image-gen and shell scripts within
U-Boot. Modify this to using the binman flow so that user understands
how to build the final boot images.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
doc/board/ti/am62x_sk.rst | 22 ++++++++---------
doc/board/ti/j721e_evm.rst | 35 +++++++++++---------------
doc/board/ti/k3.rst | 50 ++++++++++++--------------------------
3 files changed, 40 insertions(+), 67 deletions(-)
diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst
index b1b7d99bef..adf9962307 100644
--- a/doc/board/ti/am62x_sk.rst
+++ b/doc/board/ti/am62x_sk.rst
@@ -115,26 +115,26 @@ Below is the pictorial representation of boot flow:
Sources:
--------
-1. SYSFW:
- Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
- Branch: master
-
-2. ATF:
+1. ATF:
Tree: https://github.com/ARM-software/arm-trusted-firmware.git
Branch: master
-3. OPTEE:
+2. OPTEE:
Tree: https://github.com/OP-TEE/optee_os.git
Branch: master
-4. U-Boot:
+3. U-Boot:
Tree: https://source.denx.de/u-boot/u-boot
Branch: master
-5. TI Linux Firmware:
+4. TI Linux Firmware:
Tree: git://git.ti.com/processor-firmware/ti-linux-firmware.git
Branch: ti-linux-firmware
+5. TI Security Development Tools
+ Tree: https://git.ti.com/git/security-development-tools/core-secdev-k3.git
+ Branch: master
+
Build procedure:
----------------
1. ATF:
@@ -156,9 +156,7 @@ Build procedure:
.. code-block:: text
$ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- am62x_evm_r5_defconfig O=/tmp/r5
- $ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- O=/tmp/r5
- $ cd <k3-image-gen>
- $ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- SOC=am62x SBL=/tmp/r5/spl/u-boot-spl.bin SYSFW_PATH=<path to ti-linux-firmware>/ti-sysfw/ti-fs-firmware-am62x-gp.bin
+ $ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- O=/tmp/r5 SYSFW_PATH=<path to ti-linux-firmware>/ti-sysfw/ti-fs-firmware-am62x-gp.bin TI_SECURE_DEV_PKG=<path/to/security-development-tools
Use the tiboot3.bin generated from last command
@@ -167,7 +165,7 @@ Use the tiboot3.bin generated from last command
.. code-block:: text
$ make ARCH=arm CROSS_COMPILE=aarch64-none-linux-gnu- am62x_evm_a53_defconfig O=/tmp/a53
- $ make ARCH=arm CROSS_COMPILE=aarch64-none-linux-gnu- ATF=<path to ATF dir>/build/k3/lite/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<path to ti-linux-firmware>/ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f O=/tmp/a53
+ $ make ARCH=arm CROSS_COMPILE=aarch64-none-linux-gnu- BL31=<path to ATF dir>/build/k3/lite/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<path to ti-linux-firmware>/ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f O=/tmp/a53 TI_SECURE_DEV_PKG=<path/to/security-development-tools
Target Images
--------------
diff --git a/doc/board/ti/j721e_evm.rst b/doc/board/ti/j721e_evm.rst
index e898601c41..93540f0cb2 100644
--- a/doc/board/ti/j721e_evm.rst
+++ b/doc/board/ti/j721e_evm.rst
@@ -130,67 +130,60 @@ support. Below is the pictorial representation of boot flow:
Sources:
--------
-1. SYSFW:
- Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
- Branch: master
-
-2. ATF:
+1. ATF:
Tree: https://github.com/ARM-software/arm-trusted-firmware.git
Branch: master
-3. OPTEE:
+2. OPTEE:
Tree: https://github.com/OP-TEE/optee_os.git
Branch: master
-4. DM Firmware:
+3. DM Firmware:
Tree: git://git.ti.com/processor-firmware/ti-linux-firmware.git
Branch: ti-linux-firmware
-5. U-Boot:
+4. U-Boot:
Tree: https://source.denx.de/u-boot/u-boot
Branch: master
+5. TI Security Development Tools
+ Tree: https://git.ti.com/git/security-development-tools/core-secdev-k3.git
+ Branch: master
+
Build procedure:
----------------
-1. SYSFW:
-
-.. code-block:: bash
-
- make CROSS_COMPILE=arm-linux-gnueabihf- SOC=j721e
-
-2. ATF:
+1. ATF:
.. code-block:: bash
make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed
-3. OPTEE:
+2. OPTEE:
.. code-block:: bash
make PLATFORM=k3-j721e CFG_ARM64_core=y
-4. U-Boot:
+3. U-Boot:
* 4.1 R5:
.. code-block:: bash
make CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=build/r5
- make CROSS_COMPILE=arm-linux-gnueabihf- O=build/r5
+ make CROSS_COMPILE=arm-linux-gnueabihf- O=build/r5 TI_SECURE_DEV_PKG=/path/to/security-development-tools
* 4.2 A72:
.. code-block:: bash
make CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=build/a72
- make CROSS_COMPILE=aarch64-linux-gnu- ATF=<ATF dir>/build/k3/generic/release/bl31.bin TEE=<OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<DM firmware>/ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f O=build/a72
+ make CROSS_COMPILE=aarch64-linux-gnu- BL31=<ATF dir>/build/k3/generic/release/bl31.bin TEE=<OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<DM firmware>/ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f O=build/a72 TI_SECURE_DEV_PKG=/path/to/security-development-tools
Target Images
--------------
Copy the below images to an SD card and boot:
- - sysfw.itb from step 1
- - tiboot3.bin from step 4.1
+ - tiboot3.bin and sysfw.itb from step 4.1
- tispl.bin, u-boot.img from 4.2
Image formats:
diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst
index b49a60caf1..3c965a8ea0 100644
--- a/doc/board/ti/k3.rst
+++ b/doc/board/ti/k3.rst
@@ -114,11 +114,6 @@ online
| **source:** https://source.denx.de/u-boot/u-boot.git
| **branch:** master
-* **K3 Image Gen**
-
- | **source:** https://git.ti.com/git/k3-image-gen/k3-image-gen.git
- | **branch:** master
-
* **ARM Trusted Firmware (ATF)**
| **source:** https://github.com/ARM-software/arm-trusted-firmware.git
@@ -168,35 +163,20 @@ Building tiboot3.bin
1. To generate the U-Boot SPL for the wakeup domain, use the following
commands, substituting :code:`{SOC}` for the name of your device (eg:
- am62x)
+ am62x) to package the various firmware and the wakeup UBoot SPL into
+ the final `tiboot3.bin` binary. (or the `sysfw.itb` if your device
+ uses the split binary flow)
+
.. code-block:: bash
# inside u-boot source
make ARCH=arm O=build/wkup CROSS_COMPILE=$CC32 {SOC}_evm_r5_defconfig
- make ARCH=arm O=build/wkup CROSS_COMPILE=$CC32
-
-2. Next we will use the K3 Image Gen scripts to package the various
- firmware and the wakeup UBoot SPL into the final `tiboot3.bin`
- binary. (or the `sysfw.itb` if your device uses the split binary
- flow)
-
-.. code-block:: bash
-
- # inside k3-image-gen source
- make CROSS_COMPILE=$CC32 SOC={SOC} SOC_TYPE={hs,gp} \
+ make ARCH=arm O=build/wkup CROSS_COMPILE=$CC32 \
TI_SECURE_DEV_PKG=<path/to/securit-development-tools> \
- SYSFW_PATH=<path/to/ti-sysfw/ti-fs-firmware-{SOC}-{hs|gp}.bin> \
+ SYSFW_PATH=<path/to/ti-sysfw/ti-{sci|fs}-firmware-{SOC}-{hs|gp}.bin> \
SYSFW_HS_INNER_CERT_PATH=<path/to/ti-sysfw/ti-fs-firmware-{SOC}-hs-cert.bin
-For devices that use the *combined binary flow*, you will also need to
-supply the location of the SPL we created in step 1 above, so it can be
-packaged into the final `tiboot3.bin`.
-
-.. code-block:: bash
-
- SBL=<path/to/wakeup/u-boot-spl.bin>
-
At this point you should have all the needed binaries to boot the wakeup
domain of your K3 SoC.
@@ -207,7 +187,7 @@ domain of your K3 SoC.
**Split Binary Boot Flow** (eg: j721e, am65x)
| `u-boot/build/wkup/tiboot3.bin`
- | `k3-image-gen/sysfw-{SOC}-evm.bin`
+ | `u-boot/build/wkup/sysfw-{SOC}-evm.bin`
.. note ::
@@ -222,20 +202,21 @@ The `tispl.bin` is a standard fitImage combining the firmware need for
the main domain to function properly as well as Device Management (DM)
firmware if your device using a split firmware.
-3. We will first need ATF, as it's the first thing to run on the 'big'
+2. We will first need ATF, as it's the first thing to run on the 'big'
application cores on the main domain.
.. code-block:: bash
# inside arm-trusted-firmware source
make CROSS_COMPILE=$CC64 ARCH=aarch64 PLAT=k3 \
- TARGET_BOARD={lite|generic} \
+ TARGET_BOARD={lite|generic|j784s4} \
SPD=opteed \
-Typically all `j7*` devices will use `TARGET_BOARD=generic` while all
-Sitara (`am6*`) devices use the `lite` option.
+Typically all `j7*` devices will use `TARGET_BOARD=generic` or `TARGET_BOARD
+=j784s4` (if it is a J784S4 device), while all Sitara (`am6*`) devices
+use the `lite` option.
-4. The Open Portable Trusted Execution Environment (OPTEE) is designed
+3. The Open Portable Trusted Execution Environment (OPTEE) is designed
to run as a companion to a non-secure Linux kernel for Cortex-A cores
using the TrustZone technology built into the core.
@@ -245,7 +226,7 @@ Sitara (`am6*`) devices use the `lite` option.
make CROSS_COMPILE=$CC32 CROSS_COMPILE64=$CC64 \
PLATFORM=k3 CFG_ARM64_core=y
-5. Finally, after ATF has initialized the main domain and OPTEE has
+4. Finally, after ATF has initialized the main domain and OPTEE has
finished, we can jump back into U-Boot again, this time running on a
64bit core in the main domain.
@@ -254,7 +235,8 @@ Sitara (`am6*`) devices use the `lite` option.
# inside u-boot source
make ARCH=arm O=build/main CROSS_COMPILE=$CC64 {SOC}_evm_a{53,72}_defconfig
make ARCH=arm O=build/main CROSS_COMPILE=$CC64 \
- ATF=<path/to/atf/bl31.bin \
+ TI_SECURE_DEV_PKG=<path/to/securit-development-tools> \
+ BL31=<path/to/atf/bl31.bin \
TEE=<path/to/optee/tee-pager_v2.bin
If your device uses a split firmware, you will also need to supply the
--
2.34.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH 00/21] Migration to using binman to generate bootloader
2023-01-20 10:18 [PATCH 00/21] Migration to using binman to generate bootloader Neha Malcom Francis
` (20 preceding siblings ...)
2023-01-20 10:19 ` [PATCH 21/21] doc: board: ti: Update documentation for binman flow Neha Malcom Francis
@ 2023-01-20 19:46 ` Simon Glass
2023-01-23 12:31 ` Neha Malcom Francis
21 siblings, 1 reply; 31+ messages in thread
From: Simon Glass @ 2023-01-20 19:46 UTC (permalink / raw)
To: Neha Malcom Francis
Cc: u-boot, trini, afd, vigneshr, rogerq, alpernebiyasak, nm, bb
Hi Neha,
On Fri, 20 Jan 2023 at 03:19, Neha Malcom Francis <n-francis@ti.com> wrote:
>
> This series aims to eliminate the use of additional custom repositories
> such as k3-image-gen (K3 Image Generation) repo that was plumbed into
> the U-Boot build flow to generate boot images for TI K3 platform devices.
> And instead, we move towards using binman that aligns better with the
> community standard build flow.
>
> This series uses binman for all K3 platforms supported on U-Boot currently;
> both HS (High Security) and GP (General Purpose) devices.
>
> Background on using k3-image-gen:
> * TI K3 devices require a SYSFW (System Firmware) image consisting
> of a signed system firmware image and board configuration binaries,
> this is needed to bring up system firmware during U-Boot R5 SPL
> startup.
> * Board configuration data contain board-specific information
> such as resource management, power management and security.
>
> Series intends to use binman to take over the packaging and signing for
> the R5 bootloader images tiboot3.bin (and sysfw.itb, for non-combined
> boot flow) instead of k3-image-gen.
>
> Series also packages the A72/A53 bootloader images (tispl.bin and
> u-boot.img) using ATF, OPTEE and DM (Device Manager)
>
> Neha Malcom Francis (21):
> ti: tools: config: Add board config class to generate config binaries
> tools: sysfw: Add script for generating configuration blobs
> tools: binman: add ti-secure entry type
> ti: sysfw: tiboot3: Add support for packaging sysfw.itb and
> tiboot3.bin
> j721e: schema: yaml: Add general schema and J721E board config files
> j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin,
> u-boot.img
> j7200: yaml: Add J7200 board config files
> j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
> am65x: yaml: Add AM65x board config files
> am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin,
> u-boot.img
> config: am64x: Add board config for AM64x
> am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img
> Makefile: Add DM, SYSFW_PATH, SYSFW_HS_INNER_CERT_PATH to
> BINMAN_INDIRS
> j721s2: yaml: Add board config for J721S2
> j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
> am62: yaml: Add board config for AM62
> am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
> am62a: yaml: Add board config for AM62ax
> am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
> k3: tools: config.mk: Update makefile and remove scripts
> doc: board: ti: Update documentation for binman flow
>
> Makefile | 17 +
> arch/arm/dts/k3-am625-r5-sk.dts | 1 +
> arch/arm/dts/k3-am625-sk-binman.dtsi | 377 ++
> arch/arm/dts/k3-am625-sk-u-boot.dtsi | 2 +
> arch/arm/dts/k3-am62a-sk-binman.dtsi | 377 ++
> arch/arm/dts/k3-am62a7-r5-sk.dts | 1 +
> arch/arm/dts/k3-am62a7-sk.dts | 1 +
> arch/arm/dts/k3-am642-evm-u-boot.dtsi | 2 +
> arch/arm/dts/k3-am642-r5-evm.dts | 1 +
> arch/arm/dts/k3-am64x-binman.dtsi | 440 +++
> arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 1 +
> .../dts/k3-am654-r5-base-board-u-boot.dtsi | 1 +
> arch/arm/dts/k3-am65x-binman.dtsi | 482 +++
> arch/arm/dts/k3-j7200-binman.dtsi | 377 ++
> .../k3-j7200-common-proc-board-u-boot.dtsi | 2 +
> arch/arm/dts/k3-j721e-binman.dtsi | 605 +++
> .../k3-j721e-common-proc-board-u-boot.dtsi | 1 +
> .../arm/dts/k3-j721e-r5-common-proc-board.dts | 1 +
> arch/arm/dts/k3-j721s2-binman.dtsi | 377 ++
> .../k3-j721s2-common-proc-board-u-boot.dtsi | 2 +
> .../dts/k3-j721s2-r5-common-proc-board.dts | 1 +
> arch/arm/mach-k3/config.mk | 102 +-
> board/ti/am62ax/Kconfig | 2 +
> board/ti/am62ax/config.yaml | 1553 ++++++++
> board/ti/am62x/Kconfig | 2 +
> board/ti/am62x/config.yaml | 1490 ++++++++
> board/ti/am64x/Kconfig | 2 +
> board/ti/am64x/config.yaml | 1805 +++++++++
> board/ti/am65x/Kconfig | 2 +
> board/ti/am65x/config.yaml | 2469 ++++++++++++
> board/ti/common/schema.yaml | 355 ++
> board/ti/j721e/Kconfig | 4 +
> board/ti/j721e/config.yaml | 3162 ++++++++++++++++
> board/ti/j721e/config_j7200.yaml | 2467 ++++++++++++
> board/ti/j721s2/Kconfig | 2 +
> board/ti/j721s2/config.yaml | 3303 +++++++++++++++++
> doc/board/ti/am62x_sk.rst | 22 +-
> doc/board/ti/j721e_evm.rst | 35 +-
> doc/board/ti/k3.rst | 50 +-
Please move all of that into a separate patch. The binman changes
should be in their own 'binman:' patch, with tests and docs related
just to binman.
> include/binman_sym.h | 2 +
> scripts/Makefile.spl | 2 +
> test/py/requirements.txt | 1 +
> tools/binman/entries.rst | 15 +
> tools/binman/etype/ti_secure.py | 133 +
> tools/binman/ftest.py | 8 +
> tools/k3_fit_atf.sh | 123 -
> tools/k3_gen_x509_cert.sh | 262 --
> tools/k3_sysfw_boardcfg_blob_creator.py | 116 +
> tools/tibcfg_gen.py | 117 +
> 49 files changed, 20146 insertions(+), 529 deletions(-)
> create mode 100644 arch/arm/dts/k3-am625-sk-binman.dtsi
> create mode 100644 arch/arm/dts/k3-am62a-sk-binman.dtsi
> create mode 100644 arch/arm/dts/k3-am64x-binman.dtsi
> create mode 100644 arch/arm/dts/k3-am65x-binman.dtsi
> create mode 100644 arch/arm/dts/k3-j7200-binman.dtsi
> create mode 100644 arch/arm/dts/k3-j721e-binman.dtsi
> create mode 100644 arch/arm/dts/k3-j721s2-binman.dtsi
> create mode 100644 board/ti/am62ax/config.yaml
> create mode 100644 board/ti/am62x/config.yaml
> create mode 100644 board/ti/am64x/config.yaml
> create mode 100644 board/ti/am65x/config.yaml
> create mode 100644 board/ti/common/schema.yaml
> create mode 100644 board/ti/j721e/config.yaml
> create mode 100644 board/ti/j721e/config_j7200.yaml
> create mode 100644 board/ti/j721s2/config.yaml
> create mode 100644 tools/binman/etype/ti_secure.py
> delete mode 100755 tools/k3_fit_atf.sh
> delete mode 100755 tools/k3_gen_x509_cert.sh
> create mode 100755 tools/k3_sysfw_boardcfg_blob_creator.py
> create mode 100644 tools/tibcfg_gen.py
>
> --
> 2.34.1
>
It is great to see this and thank you for working on it.
My general comments are:
- we need to avoid adding new scripts (they should go into binman) so
please let me know what is needed there and how we can adjust it
- needs some work in testing - e.g. 'binman test' and 'binman test -T'
need to pass without errors
Regards,
Simon
^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH 00/21] Migration to using binman to generate bootloader
2023-01-20 19:46 ` [PATCH 00/21] Migration to using binman to generate bootloader Simon Glass
@ 2023-01-23 12:31 ` Neha Malcom Francis
0 siblings, 0 replies; 31+ messages in thread
From: Neha Malcom Francis @ 2023-01-23 12:31 UTC (permalink / raw)
To: Simon Glass; +Cc: u-boot, trini, afd, vigneshr, rogerq, alpernebiyasak, nm, bb
Hi Simon
On 21/01/23 01:16, Simon Glass wrote:
> Hi Neha,
>
> On Fri, 20 Jan 2023 at 03:19, Neha Malcom Francis <n-francis@ti.com> wrote:
>>
>> This series aims to eliminate the use of additional custom repositories
>> such as k3-image-gen (K3 Image Generation) repo that was plumbed into
>> the U-Boot build flow to generate boot images for TI K3 platform devices.
>> And instead, we move towards using binman that aligns better with the
>> community standard build flow.
>>
>> This series uses binman for all K3 platforms supported on U-Boot currently;
>> both HS (High Security) and GP (General Purpose) devices.
>>
>> Background on using k3-image-gen:
>> * TI K3 devices require a SYSFW (System Firmware) image consisting
>> of a signed system firmware image and board configuration binaries,
>> this is needed to bring up system firmware during U-Boot R5 SPL
>> startup.
>> * Board configuration data contain board-specific information
>> such as resource management, power management and security.
>>
>> Series intends to use binman to take over the packaging and signing for
>> the R5 bootloader images tiboot3.bin (and sysfw.itb, for non-combined
>> boot flow) instead of k3-image-gen.
>>
>> Series also packages the A72/A53 bootloader images (tispl.bin and
>> u-boot.img) using ATF, OPTEE and DM (Device Manager)
>>
>> Neha Malcom Francis (21):
>> ti: tools: config: Add board config class to generate config binaries
>> tools: sysfw: Add script for generating configuration blobs
>> tools: binman: add ti-secure entry type
>> ti: sysfw: tiboot3: Add support for packaging sysfw.itb and
>> tiboot3.bin
>> j721e: schema: yaml: Add general schema and J721E board config files
>> j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin,
>> u-boot.img
>> j7200: yaml: Add J7200 board config files
>> j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
>> am65x: yaml: Add AM65x board config files
>> am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin,
>> u-boot.img
>> config: am64x: Add board config for AM64x
>> am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img
>> Makefile: Add DM, SYSFW_PATH, SYSFW_HS_INNER_CERT_PATH to
>> BINMAN_INDIRS
>> j721s2: yaml: Add board config for J721S2
>> j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
>> am62: yaml: Add board config for AM62
>> am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
>> am62a: yaml: Add board config for AM62ax
>> am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
>> k3: tools: config.mk: Update makefile and remove scripts
>> doc: board: ti: Update documentation for binman flow
>>
>> Makefile | 17 +
>> arch/arm/dts/k3-am625-r5-sk.dts | 1 +
>> arch/arm/dts/k3-am625-sk-binman.dtsi | 377 ++
>> arch/arm/dts/k3-am625-sk-u-boot.dtsi | 2 +
>> arch/arm/dts/k3-am62a-sk-binman.dtsi | 377 ++
>> arch/arm/dts/k3-am62a7-r5-sk.dts | 1 +
>> arch/arm/dts/k3-am62a7-sk.dts | 1 +
>> arch/arm/dts/k3-am642-evm-u-boot.dtsi | 2 +
>> arch/arm/dts/k3-am642-r5-evm.dts | 1 +
>> arch/arm/dts/k3-am64x-binman.dtsi | 440 +++
>> arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 1 +
>> .../dts/k3-am654-r5-base-board-u-boot.dtsi | 1 +
>> arch/arm/dts/k3-am65x-binman.dtsi | 482 +++
>> arch/arm/dts/k3-j7200-binman.dtsi | 377 ++
>> .../k3-j7200-common-proc-board-u-boot.dtsi | 2 +
>> arch/arm/dts/k3-j721e-binman.dtsi | 605 +++
>> .../k3-j721e-common-proc-board-u-boot.dtsi | 1 +
>> .../arm/dts/k3-j721e-r5-common-proc-board.dts | 1 +
>> arch/arm/dts/k3-j721s2-binman.dtsi | 377 ++
>> .../k3-j721s2-common-proc-board-u-boot.dtsi | 2 +
>> .../dts/k3-j721s2-r5-common-proc-board.dts | 1 +
>> arch/arm/mach-k3/config.mk | 102 +-
>> board/ti/am62ax/Kconfig | 2 +
>> board/ti/am62ax/config.yaml | 1553 ++++++++
>> board/ti/am62x/Kconfig | 2 +
>> board/ti/am62x/config.yaml | 1490 ++++++++
>> board/ti/am64x/Kconfig | 2 +
>> board/ti/am64x/config.yaml | 1805 +++++++++
>> board/ti/am65x/Kconfig | 2 +
>> board/ti/am65x/config.yaml | 2469 ++++++++++++
>> board/ti/common/schema.yaml | 355 ++
>> board/ti/j721e/Kconfig | 4 +
>> board/ti/j721e/config.yaml | 3162 ++++++++++++++++
>> board/ti/j721e/config_j7200.yaml | 2467 ++++++++++++
>> board/ti/j721s2/Kconfig | 2 +
>> board/ti/j721s2/config.yaml | 3303 +++++++++++++++++
>> doc/board/ti/am62x_sk.rst | 22 +-
>> doc/board/ti/j721e_evm.rst | 35 +-
>> doc/board/ti/k3.rst | 50 +-
>
> Please move all of that into a separate patch. The binman changes
> should be in their own 'binman:' patch, with tests and docs related
> just to binman.
>
>> include/binman_sym.h | 2 +
>> scripts/Makefile.spl | 2 +
>> test/py/requirements.txt | 1 +
>> tools/binman/entries.rst | 15 +
>> tools/binman/etype/ti_secure.py | 133 +
>> tools/binman/ftest.py | 8 +
>> tools/k3_fit_atf.sh | 123 -
>> tools/k3_gen_x509_cert.sh | 262 --
>> tools/k3_sysfw_boardcfg_blob_creator.py | 116 +
>> tools/tibcfg_gen.py | 117 +
>> 49 files changed, 20146 insertions(+), 529 deletions(-)
>> create mode 100644 arch/arm/dts/k3-am625-sk-binman.dtsi
>> create mode 100644 arch/arm/dts/k3-am62a-sk-binman.dtsi
>> create mode 100644 arch/arm/dts/k3-am64x-binman.dtsi
>> create mode 100644 arch/arm/dts/k3-am65x-binman.dtsi
>> create mode 100644 arch/arm/dts/k3-j7200-binman.dtsi
>> create mode 100644 arch/arm/dts/k3-j721e-binman.dtsi
>> create mode 100644 arch/arm/dts/k3-j721s2-binman.dtsi
>> create mode 100644 board/ti/am62ax/config.yaml
>> create mode 100644 board/ti/am62x/config.yaml
>> create mode 100644 board/ti/am64x/config.yaml
>> create mode 100644 board/ti/am65x/config.yaml
>> create mode 100644 board/ti/common/schema.yaml
>> create mode 100644 board/ti/j721e/config.yaml
>> create mode 100644 board/ti/j721e/config_j7200.yaml
>> create mode 100644 board/ti/j721s2/config.yaml
>> create mode 100644 tools/binman/etype/ti_secure.py
>> delete mode 100755 tools/k3_fit_atf.sh
>> delete mode 100755 tools/k3_gen_x509_cert.sh
>> create mode 100755 tools/k3_sysfw_boardcfg_blob_creator.py
>> create mode 100644 tools/tibcfg_gen.py
>>
>> --
>> 2.34.1
>>
>
> It is great to see this and thank you for working on it.
>
> My general comments are:
>
> - we need to avoid adding new scripts (they should go into binman) so
> please let me know what is needed there and how we can adjust it
> - needs some work in testing - e.g. 'binman test' and 'binman test -T'
> need to pass without errors
>
> Regards,
> Simon
Thanks for the review comments! I am working on it and will reach out if
I need any help.
--
Thanking You
Neha Malcom Francis
^ permalink raw reply [flat|nested] 31+ messages in thread