From: moudy ho <moudy.ho@mediatek.com> To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, "Rob Herring" <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Matthias Brugger <matthias.bgg@gmail.com>, Chun-Kuang Hu <chunkuang.hu@kernel.org> Cc: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <Project_Global_Chrome_Upstream_Group@mediatek.com>, Roy-CW.Yeh <roy-cw.yeh@mediatek.com> Subject: Re: [PATCH v1 4/6] soc: mediatek: mmsys: add config api for RSZ switching and DCM Date: Wed, 5 Oct 2022 09:48:37 +0800 [thread overview] Message-ID: <c7bcc52c1530de4b3e8d96b6adc3322e5755378c.camel@mediatek.com> (raw) In-Reply-To: <4471ec11-40f6-3d93-e6a7-c746a427e8ca@collabora.com> On Tue, 2022-10-04 at 14:17 +0200, AngeloGioacchino Del Regno wrote: > Il 04/10/22 11:33, Moudy Ho ha scritto: > > From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com> > > > > Due to MT8195 HW design, some RSZs have additional settings that > > need to be configured in MMSYS. > > > > Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com> > > Hello Moudy, > > please remember that you have to add your Signed-off-by tag to all of > the commits > that you're sending, even if you're not the author, otherwise they > are not > acceptable. > Hi Angelo, Thanks for the reminder, I'll add the required tags and resend the entire patch. Regards, Moudy > > --- > > drivers/soc/mediatek/mt8195-mmsys.h | 8 ++++++ > > drivers/soc/mediatek/mtk-mmsys.c | 40 > > ++++++++++++++++++++++++++ > > include/linux/soc/mediatek/mtk-mmsys.h | 4 +++ > > 3 files changed, 52 insertions(+) > > > > diff --git a/drivers/soc/mediatek/mt8195-mmsys.h > > b/drivers/soc/mediatek/mt8195-mmsys.h > > index abfe94a30248..e0cf13d09763 100644 > > --- a/drivers/soc/mediatek/mt8195-mmsys.h > > +++ b/drivers/soc/mediatek/mt8195-mmsys.h > > @@ -75,6 +75,14 @@ > > #define MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0 > > (2 << 16) > > #define MT8195_SOUT_DSC_WRAP1_OUT_TO_VPP_MERGE > > (3 << 16) > > > > +/* VPPSYS1 */ > > +#define MT8195_SVPP1_HW_DCM_1ST_DIS0 > > 0x150 > > +#define MT8195_SVPP1_HW_DCM_1ST_DIS1 > > 0x160 > > +#define MT8195_SVPP1_HW_DCM_2ND_DIS0 > > 0x1a0 > > +#define MT8195_SVPP1_HW_DCM_2ND_DIS1 > > 0x1b0 > > +#define MT8195_SVPP2_BUF_BF_RSZ_SWITCH > > 0xf48 > > +#define MT8195_SVPP3_BUF_BF_RSZ_SWITCH > > 0xf74 > > + > > static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] > > = { > > { > > DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0, > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c > > b/drivers/soc/mediatek/mtk-mmsys.c > > index c4d15f99f853..c98cfcb7db38 100644 > > --- a/drivers/soc/mediatek/mtk-mmsys.c > > +++ b/drivers/soc/mediatek/mtk-mmsys.c > > @@ -261,6 +261,46 @@ void mtk_mmsys_ddp_dpi_fmt_config(struct > > device *dev, u32 val) > > } > > EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_dpi_fmt_config); > > > > +void mtk_mmsys_merge_config(struct device *dev, u32 id, bool > > enable) > > void mtk_mmsys_merge_config(struct device *dev, u32 svpp_id, bool > enable) > > or > > void mtk_mmsys_vpp_merge_config(struct device *dev, u32 id, bool > enable) > > ...adding that "svpp" or "vpp" word makes the function easier to > understand :-) > > > +{ > > + u32 reg; > > + > > + switch (id) { > > + case 2: > > + reg = MT8195_SVPP2_BUF_BF_RSZ_SWITCH; > > + break; > > + case 3: > > + reg = MT8195_SVPP3_BUF_BF_RSZ_SWITCH; > > + break; > > + default: > > + dev_err(dev, "Invalid id %d\n", id); > > + return; > > + } > > + > > + mtk_mmsys_update_bits(dev_get_drvdata(dev), reg, ~0, enable); > > +} > > +EXPORT_SYMBOL_GPL(mtk_mmsys_merge_config); > > + > > +void mtk_mmsys_rsz_dcm_config(struct device *dev, bool enable) > > ...would be the same here, but only about the function name, so I'd > go with > changing the name for both. > > > +{ > > + u32 val = 0; > > + > > + if (enable) > > + val = BIT(25); > > No magic bits please, add a definition for them > > > + mtk_mmsys_update_bits(dev_get_drvdata(dev), > > + MT8195_SVPP1_HW_DCM_1ST_DIS0, BIT(25), > > val); > > + mtk_mmsys_update_bits(dev_get_drvdata(dev), > > + MT8195_SVPP1_HW_DCM_2ND_DIS0, BIT(25), > > val); > > + > > + if (enable) > > + val = (BIT(4) | BIT(5)); > > same here > > > + mtk_mmsys_update_bits(dev_get_drvdata(dev), > > + MT8195_SVPP1_HW_DCM_1ST_DIS1, (BIT(4) | > > BIT(5)), val); > > + mtk_mmsys_update_bits(dev_get_drvdata(dev), > > + MT8195_SVPP1_HW_DCM_2ND_DIS1, (BIT(4) | > > BIT(5)), val); > > +} > > +EXPORT_SYMBOL_GPL(mtk_mmsys_rsz_dcm_config); > > + > > static int mtk_mmsys_reset_update(struct reset_controller_dev > > *rcdev, unsigned long id, > > bool assert) > > { > > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h > > b/include/linux/soc/mediatek/mtk-mmsys.h > > index d2b02bb43768..2d5c7fe920b0 100644 > > --- a/include/linux/soc/mediatek/mtk-mmsys.h > > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > > @@ -67,4 +67,8 @@ void mtk_mmsys_ddp_disconnect(struct device *dev, > > > > void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val); > > > > +void mtk_mmsys_merge_config(struct device *dev, u32 id, bool > > enable); > > + > > +void mtk_mmsys_rsz_dcm_config(struct device *dev, bool enable); > > + > > #endif /* __MTK_MMSYS_H */ > >
WARNING: multiple messages have this Message-ID (diff)
From: moudy ho <moudy.ho@mediatek.com> To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, "Rob Herring" <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Matthias Brugger <matthias.bgg@gmail.com>, Chun-Kuang Hu <chunkuang.hu@kernel.org> Cc: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <Project_Global_Chrome_Upstream_Group@mediatek.com>, Roy-CW.Yeh <roy-cw.yeh@mediatek.com> Subject: Re: [PATCH v1 4/6] soc: mediatek: mmsys: add config api for RSZ switching and DCM Date: Wed, 5 Oct 2022 09:48:37 +0800 [thread overview] Message-ID: <c7bcc52c1530de4b3e8d96b6adc3322e5755378c.camel@mediatek.com> (raw) In-Reply-To: <4471ec11-40f6-3d93-e6a7-c746a427e8ca@collabora.com> On Tue, 2022-10-04 at 14:17 +0200, AngeloGioacchino Del Regno wrote: > Il 04/10/22 11:33, Moudy Ho ha scritto: > > From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com> > > > > Due to MT8195 HW design, some RSZs have additional settings that > > need to be configured in MMSYS. > > > > Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com> > > Hello Moudy, > > please remember that you have to add your Signed-off-by tag to all of > the commits > that you're sending, even if you're not the author, otherwise they > are not > acceptable. > Hi Angelo, Thanks for the reminder, I'll add the required tags and resend the entire patch. Regards, Moudy > > --- > > drivers/soc/mediatek/mt8195-mmsys.h | 8 ++++++ > > drivers/soc/mediatek/mtk-mmsys.c | 40 > > ++++++++++++++++++++++++++ > > include/linux/soc/mediatek/mtk-mmsys.h | 4 +++ > > 3 files changed, 52 insertions(+) > > > > diff --git a/drivers/soc/mediatek/mt8195-mmsys.h > > b/drivers/soc/mediatek/mt8195-mmsys.h > > index abfe94a30248..e0cf13d09763 100644 > > --- a/drivers/soc/mediatek/mt8195-mmsys.h > > +++ b/drivers/soc/mediatek/mt8195-mmsys.h > > @@ -75,6 +75,14 @@ > > #define MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0 > > (2 << 16) > > #define MT8195_SOUT_DSC_WRAP1_OUT_TO_VPP_MERGE > > (3 << 16) > > > > +/* VPPSYS1 */ > > +#define MT8195_SVPP1_HW_DCM_1ST_DIS0 > > 0x150 > > +#define MT8195_SVPP1_HW_DCM_1ST_DIS1 > > 0x160 > > +#define MT8195_SVPP1_HW_DCM_2ND_DIS0 > > 0x1a0 > > +#define MT8195_SVPP1_HW_DCM_2ND_DIS1 > > 0x1b0 > > +#define MT8195_SVPP2_BUF_BF_RSZ_SWITCH > > 0xf48 > > +#define MT8195_SVPP3_BUF_BF_RSZ_SWITCH > > 0xf74 > > + > > static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] > > = { > > { > > DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0, > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c > > b/drivers/soc/mediatek/mtk-mmsys.c > > index c4d15f99f853..c98cfcb7db38 100644 > > --- a/drivers/soc/mediatek/mtk-mmsys.c > > +++ b/drivers/soc/mediatek/mtk-mmsys.c > > @@ -261,6 +261,46 @@ void mtk_mmsys_ddp_dpi_fmt_config(struct > > device *dev, u32 val) > > } > > EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_dpi_fmt_config); > > > > +void mtk_mmsys_merge_config(struct device *dev, u32 id, bool > > enable) > > void mtk_mmsys_merge_config(struct device *dev, u32 svpp_id, bool > enable) > > or > > void mtk_mmsys_vpp_merge_config(struct device *dev, u32 id, bool > enable) > > ...adding that "svpp" or "vpp" word makes the function easier to > understand :-) > > > +{ > > + u32 reg; > > + > > + switch (id) { > > + case 2: > > + reg = MT8195_SVPP2_BUF_BF_RSZ_SWITCH; > > + break; > > + case 3: > > + reg = MT8195_SVPP3_BUF_BF_RSZ_SWITCH; > > + break; > > + default: > > + dev_err(dev, "Invalid id %d\n", id); > > + return; > > + } > > + > > + mtk_mmsys_update_bits(dev_get_drvdata(dev), reg, ~0, enable); > > +} > > +EXPORT_SYMBOL_GPL(mtk_mmsys_merge_config); > > + > > +void mtk_mmsys_rsz_dcm_config(struct device *dev, bool enable) > > ...would be the same here, but only about the function name, so I'd > go with > changing the name for both. > > > +{ > > + u32 val = 0; > > + > > + if (enable) > > + val = BIT(25); > > No magic bits please, add a definition for them > > > + mtk_mmsys_update_bits(dev_get_drvdata(dev), > > + MT8195_SVPP1_HW_DCM_1ST_DIS0, BIT(25), > > val); > > + mtk_mmsys_update_bits(dev_get_drvdata(dev), > > + MT8195_SVPP1_HW_DCM_2ND_DIS0, BIT(25), > > val); > > + > > + if (enable) > > + val = (BIT(4) | BIT(5)); > > same here > > > + mtk_mmsys_update_bits(dev_get_drvdata(dev), > > + MT8195_SVPP1_HW_DCM_1ST_DIS1, (BIT(4) | > > BIT(5)), val); > > + mtk_mmsys_update_bits(dev_get_drvdata(dev), > > + MT8195_SVPP1_HW_DCM_2ND_DIS1, (BIT(4) | > > BIT(5)), val); > > +} > > +EXPORT_SYMBOL_GPL(mtk_mmsys_rsz_dcm_config); > > + > > static int mtk_mmsys_reset_update(struct reset_controller_dev > > *rcdev, unsigned long id, > > bool assert) > > { > > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h > > b/include/linux/soc/mediatek/mtk-mmsys.h > > index d2b02bb43768..2d5c7fe920b0 100644 > > --- a/include/linux/soc/mediatek/mtk-mmsys.h > > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > > @@ -67,4 +67,8 @@ void mtk_mmsys_ddp_disconnect(struct device *dev, > > > > void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val); > > > > +void mtk_mmsys_merge_config(struct device *dev, u32 id, bool > > enable); > > + > > +void mtk_mmsys_rsz_dcm_config(struct device *dev, bool enable); > > + > > #endif /* __MTK_MMSYS_H */ > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-10-05 1:49 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-10-04 9:33 [PATCH v1 0/6] add support for MT8195 VPPSYS on MMSYS and MUTEX Moudy Ho 2022-10-04 9:33 ` Moudy Ho 2022-10-04 9:33 ` [PATCH v1 1/6] dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS Moudy Ho 2022-10-04 9:33 ` Moudy Ho 2022-10-05 7:58 ` Krzysztof Kozlowski 2022-10-05 7:58 ` Krzysztof Kozlowski 2022-10-04 9:33 ` [PATCH v1 2/6] dts: arm64: mt8195: add MMSYS and MUTEX configuration for VPPSYS Moudy Ho 2022-10-04 9:33 ` Moudy Ho 2022-10-04 11:46 ` Allen-KH Cheng (程冠勳) 2022-10-04 11:46 ` Allen-KH Cheng (程冠勳) 2022-10-05 1:53 ` moudy ho 2022-10-05 1:53 ` moudy ho 2022-10-05 7:57 ` Krzysztof Kozlowski 2022-10-05 7:57 ` Krzysztof Kozlowski 2022-10-04 9:33 ` [PATCH v1 3/6] soc: mediatek: mmsys: add support for MT8195 VPPSYS Moudy Ho 2022-10-04 9:33 ` Moudy Ho 2022-10-04 12:17 ` AngeloGioacchino Del Regno 2022-10-04 12:17 ` AngeloGioacchino Del Regno 2022-10-05 2:43 ` moudy ho 2022-10-05 2:43 ` moudy ho 2022-10-04 9:33 ` [PATCH v1 4/6] soc: mediatek: mmsys: add config api for RSZ switching and DCM Moudy Ho 2022-10-04 9:33 ` Moudy Ho 2022-10-04 12:17 ` AngeloGioacchino Del Regno 2022-10-04 12:17 ` AngeloGioacchino Del Regno 2022-10-05 1:48 ` moudy ho [this message] 2022-10-05 1:48 ` moudy ho 2022-10-04 9:33 ` [PATCH v1 5/6] soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1 Moudy Ho 2022-10-04 9:33 ` Moudy Ho 2022-10-04 12:38 ` AngeloGioacchino Del Regno 2022-10-04 12:38 ` AngeloGioacchino Del Regno 2022-10-05 2:59 ` moudy ho 2022-10-05 2:59 ` moudy ho 2022-10-04 9:33 ` [PATCH v1 6/6] soc: mediatek: mutex: support MT8195 VPPSYS Moudy Ho 2022-10-04 9:33 ` Moudy Ho
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